Commit 7aec3566 authored by Mike Frysinger's avatar Mike Frysinger Committed by Linus Torvalds

Blackfin SPI Driver: unify duplicated code in dma read/write paths

For DMA TX/RX operation in pump_transfers, DMA contriguration code in TX
and RX paths are almost the same.  This patch unify the duplicated DMA
code to make it more readable.
Signed-off-by: default avatarMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: default avatarBryan Wu <cooloney@kernel.org>
Acked-by: default avatarDavid Brownell <dbrownell@users.sourceforge.net>
Cc: David Brownell <david-b@pacbell.net>
Signed-off-by: default avatarAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
parent 04b95d2f
...@@ -756,18 +756,19 @@ static void pump_transfers(unsigned long data) ...@@ -756,18 +756,19 @@ static void pump_transfers(unsigned long data)
if (!full_duplex && drv_data->cur_chip->enable_dma if (!full_duplex && drv_data->cur_chip->enable_dma
&& drv_data->len > 6) { && drv_data->len > 6) {
unsigned long dma_start_addr;
disable_dma(drv_data->dma_channel); disable_dma(drv_data->dma_channel);
clear_dma_irqstat(drv_data->dma_channel); clear_dma_irqstat(drv_data->dma_channel);
bfin_spi_disable(drv_data); bfin_spi_disable(drv_data);
/* config dma channel */ /* config dma channel */
dev_dbg(&drv_data->pdev->dev, "doing dma transfer\n"); dev_dbg(&drv_data->pdev->dev, "doing dma transfer\n");
set_dma_x_count(drv_data->dma_channel, drv_data->len);
if (width == CFG_SPI_WORDSIZE16) { if (width == CFG_SPI_WORDSIZE16) {
set_dma_x_count(drv_data->dma_channel, drv_data->len);
set_dma_x_modify(drv_data->dma_channel, 2); set_dma_x_modify(drv_data->dma_channel, 2);
dma_width = WDSIZE_16; dma_width = WDSIZE_16;
} else { } else {
set_dma_x_count(drv_data->dma_channel, drv_data->len);
set_dma_x_modify(drv_data->dma_channel, 1); set_dma_x_modify(drv_data->dma_channel, 1);
dma_width = WDSIZE_8; dma_width = WDSIZE_8;
} }
...@@ -802,6 +803,7 @@ static void pump_transfers(unsigned long data) ...@@ -802,6 +803,7 @@ static void pump_transfers(unsigned long data)
} }
/* In dma mode, rx or tx must be NULL in one transfer */ /* In dma mode, rx or tx must be NULL in one transfer */
dma_config = (RESTART | dma_width | DI_EN);
if (drv_data->rx != NULL) { if (drv_data->rx != NULL) {
/* set transfer mode, and enable SPI */ /* set transfer mode, and enable SPI */
dev_dbg(&drv_data->pdev->dev, "doing DMA in.\n"); dev_dbg(&drv_data->pdev->dev, "doing DMA in.\n");
...@@ -815,19 +817,9 @@ static void pump_transfers(unsigned long data) ...@@ -815,19 +817,9 @@ static void pump_transfers(unsigned long data)
/* clear tx reg soformer data is not shifted out */ /* clear tx reg soformer data is not shifted out */
write_TDBR(drv_data, 0xFFFF); write_TDBR(drv_data, 0xFFFF);
set_dma_x_count(drv_data->dma_channel, drv_data->len); dma_config |= WNR;
dma_start_addr = (unsigned long)drv_data->rx;
/* start dma */ cr |= CFG_SPI_DMAREAD;
dma_enable_irq(drv_data->dma_channel);
dma_config = (WNR | RESTART | dma_width | DI_EN);
set_dma_config(drv_data->dma_channel, dma_config);
set_dma_start_addr(drv_data->dma_channel,
(unsigned long)drv_data->rx);
enable_dma(drv_data->dma_channel);
/* start SPI transfer */
write_CTRL(drv_data,
(cr | CFG_SPI_DMAREAD | BIT_CTL_ENABLE));
} else if (drv_data->tx != NULL) { } else if (drv_data->tx != NULL) {
dev_dbg(&drv_data->pdev->dev, "doing DMA out.\n"); dev_dbg(&drv_data->pdev->dev, "doing DMA out.\n");
...@@ -838,18 +830,21 @@ static void pump_transfers(unsigned long data) ...@@ -838,18 +830,21 @@ static void pump_transfers(unsigned long data)
(unsigned long) (drv_data->tx + (unsigned long) (drv_data->tx +
drv_data->len_in_bytes)); drv_data->len_in_bytes));
/* start dma */ dma_start_addr = (unsigned long)drv_data->tx;
dma_enable_irq(drv_data->dma_channel); cr |= CFG_SPI_DMAWRITE;
dma_config = (RESTART | dma_width | DI_EN);
set_dma_config(drv_data->dma_channel, dma_config); } else
set_dma_start_addr(drv_data->dma_channel, BUG();
(unsigned long)drv_data->tx);
enable_dma(drv_data->dma_channel); /* start dma */
dma_enable_irq(drv_data->dma_channel);
set_dma_config(drv_data->dma_channel, dma_config);
set_dma_start_addr(drv_data->dma_channel, dma_start_addr);
enable_dma(drv_data->dma_channel);
/* start SPI transfer */
write_CTRL(drv_data, (cr | BIT_CTL_ENABLE));
/* start SPI transfer */
write_CTRL(drv_data,
(cr | CFG_SPI_DMAWRITE | BIT_CTL_ENABLE));
}
} else { } else {
/* IO mode write then read */ /* IO mode write then read */
dev_dbg(&drv_data->pdev->dev, "doing IO transfer\n"); dev_dbg(&drv_data->pdev->dev, "doing IO transfer\n");
......
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