ARM: dts: uniphier: fix size of sdctrl nodes

All registers are located within 0x400 size from the base address.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

arch/arm/boot/dts/uniphier-pro5.dtsi

@@ -292,7 +292,7 @@ smpctrl@59801000 {
 		sdctrl@59810000 {
 			compatible = "socionext,uniphier-pro5-sdctrl",
 				     "simple-mfd", "syscon";
-			reg = <0x59810000 0x800>;
+			reg = <0x59810000 0x400>;
 
 			sd_clk: clock {
 				compatible = "socionext,uniphier-pro5-sd-clock";

arch/arm/boot/dts/uniphier-pxs2.dtsi

@@ -276,7 +276,7 @@ smpctrl@59801000 {
 		sdctrl@59810000 {
 			compatible = "socionext,uniphier-pxs2-sdctrl",
 				     "simple-mfd", "syscon";
-			reg = <0x59810000 0x800>;
+			reg = <0x59810000 0x400>;
 
 			sd_clk: clock {
 				compatible = "socionext,uniphier-pxs2-sd-clock";