Commit 7b9c5162 authored by Niklas Cassel's avatar Niklas Cassel Committed by Greg Kroah-Hartman

serial: etraxfs-uart: use mctrl_gpio helpers for handling modem signals

In order to use the mctrl_gpio helpers, we change the DT bindings:
ri-gpios renamed to rng-gpios. cd-gpios renamed to dcd-gpios.
However, no in-tree dts/dtsi specifies these, so no worries.
Signed-off-by: default avatarNiklas Cassel <nks@flawful.org>
Reviewed-by: default avatarGuenter Roeck <linux@roeck-us.net>
Tested-by: default avatarGuenter Roeck <linux@roeck-us.net>
Acked-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 9625734f
...@@ -6,7 +6,7 @@ Required properties: ...@@ -6,7 +6,7 @@ Required properties:
- interrupts: device interrupt - interrupts: device interrupt
Optional properties: Optional properties:
- {dtr,dsr,ri,cd}-gpios: specify a GPIO for DTR/DSR/RI/CD - {dtr,dsr,rng,dcd}-gpios: specify a GPIO for DTR/DSR/RI/DCD
line respectively. line respectively.
Example: Example:
...@@ -16,4 +16,8 @@ serial@b00260000 { ...@@ -16,4 +16,8 @@ serial@b00260000 {
reg = <0xb0026000 0x1000>; reg = <0xb0026000 0x1000>;
interrupts = <68>; interrupts = <68>;
status = "disabled"; status = "disabled";
dtr-gpios = <&sysgpio 0 GPIO_ACTIVE_LOW>;
dsr-gpios = <&sysgpio 1 GPIO_ACTIVE_LOW>;
rng-gpios = <&sysgpio 2 GPIO_ACTIVE_LOW>;
dcd-gpios = <&sysgpio 3 GPIO_ACTIVE_LOW>;
}; };
...@@ -1067,6 +1067,7 @@ config SERIAL_ETRAXFS ...@@ -1067,6 +1067,7 @@ config SERIAL_ETRAXFS
bool "ETRAX FS serial port support" bool "ETRAX FS serial port support"
depends on ETRAX_ARCH_V32 && OF depends on ETRAX_ARCH_V32 && OF
select SERIAL_CORE select SERIAL_CORE
select SERIAL_MCTRL_GPIO if GPIOLIB
config SERIAL_ETRAXFS_CONSOLE config SERIAL_ETRAXFS_CONSOLE
bool "ETRAX FS serial console support" bool "ETRAX FS serial console support"
......
...@@ -10,6 +10,8 @@ ...@@ -10,6 +10,8 @@
#include <linux/of_address.h> #include <linux/of_address.h>
#include <hwregs/ser_defs.h> #include <hwregs/ser_defs.h>
#include "serial_mctrl_gpio.h"
#define DRV_NAME "etraxfs-uart" #define DRV_NAME "etraxfs-uart"
#define UART_NR CONFIG_ETRAX_SERIAL_PORTS #define UART_NR CONFIG_ETRAX_SERIAL_PORTS
...@@ -28,10 +30,7 @@ struct uart_cris_port { ...@@ -28,10 +30,7 @@ struct uart_cris_port {
void __iomem *regi_ser; void __iomem *regi_ser;
struct gpio_desc *dtr_pin; struct mctrl_gpios *gpios;
struct gpio_desc *dsr_pin;
struct gpio_desc *ri_pin;
struct gpio_desc *cd_pin;
int write_ongoing; int write_ongoing;
}; };
...@@ -389,21 +388,9 @@ static unsigned int etraxfs_uart_get_mctrl(struct uart_port *port) ...@@ -389,21 +388,9 @@ static unsigned int etraxfs_uart_get_mctrl(struct uart_port *port)
ret = 0; ret = 0;
if (crisv32_serial_get_rts(up)) if (crisv32_serial_get_rts(up))
ret |= TIOCM_RTS; ret |= TIOCM_RTS;
/* DTR is active low */
if (up->dtr_pin && !gpiod_get_raw_value(up->dtr_pin))
ret |= TIOCM_DTR;
/* CD is active low */
if (up->cd_pin && !gpiod_get_raw_value(up->cd_pin))
ret |= TIOCM_CD;
/* RI is active low */
if (up->ri_pin && !gpiod_get_raw_value(up->ri_pin))
ret |= TIOCM_RI;
/* DSR is active low */
if (up->dsr_pin && !gpiod_get_raw_value(up->dsr_pin))
ret |= TIOCM_DSR;
if (crisv32_serial_get_cts(up)) if (crisv32_serial_get_cts(up))
ret |= TIOCM_CTS; ret |= TIOCM_CTS;
return ret; return mctrl_gpio_get(up->gpios, &ret);
} }
static void etraxfs_uart_set_mctrl(struct uart_port *port, unsigned int mctrl) static void etraxfs_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
...@@ -411,15 +398,7 @@ static void etraxfs_uart_set_mctrl(struct uart_port *port, unsigned int mctrl) ...@@ -411,15 +398,7 @@ static void etraxfs_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
struct uart_cris_port *up = (struct uart_cris_port *)port; struct uart_cris_port *up = (struct uart_cris_port *)port;
crisv32_serial_set_rts(up, mctrl & TIOCM_RTS ? 1 : 0, 0); crisv32_serial_set_rts(up, mctrl & TIOCM_RTS ? 1 : 0, 0);
/* DTR is active low */ mctrl_gpio_set(up->gpios, mctrl);
if (up->dtr_pin)
gpiod_set_raw_value(up->dtr_pin, mctrl & TIOCM_DTR ? 0 : 1);
/* RI is active low */
if (up->ri_pin)
gpiod_set_raw_value(up->ri_pin, mctrl & TIOCM_RNG ? 0 : 1);
/* CD is active low */
if (up->cd_pin)
gpiod_set_raw_value(up->cd_pin, mctrl & TIOCM_CD ? 0 : 1);
} }
static void etraxfs_uart_break_ctl(struct uart_port *port, int break_state) static void etraxfs_uart_break_ctl(struct uart_port *port, int break_state)
...@@ -913,11 +892,12 @@ static int etraxfs_uart_probe(struct platform_device *pdev) ...@@ -913,11 +892,12 @@ static int etraxfs_uart_probe(struct platform_device *pdev)
up->irq = irq_of_parse_and_map(np, 0); up->irq = irq_of_parse_and_map(np, 0);
up->regi_ser = of_iomap(np, 0); up->regi_ser = of_iomap(np, 0);
up->dtr_pin = devm_gpiod_get_optional(&pdev->dev, "dtr");
up->dsr_pin = devm_gpiod_get_optional(&pdev->dev, "dsr");
up->ri_pin = devm_gpiod_get_optional(&pdev->dev, "ri");
up->cd_pin = devm_gpiod_get_optional(&pdev->dev, "cd");
up->port.dev = &pdev->dev; up->port.dev = &pdev->dev;
up->gpios = mctrl_gpio_init(&pdev->dev, 0);
if (IS_ERR(up->gpios))
return PTR_ERR(up->gpios);
cris_serial_port_init(&up->port, dev_id); cris_serial_port_init(&up->port, dev_id);
etraxfs_uart_ports[dev_id] = up; etraxfs_uart_ports[dev_id] = up;
......
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