Commit 7d3f91dc authored by Jeeja KP's avatar Jeeja KP Committed by Mark Brown

ASoC: Intel: bxtn: optimize ROM init retries

During S3->S0 transition, sometime ROM init fails because of
authentication engine loads later than the OS. In this case driver
waits for a longer period and then retries the FW download causing
huge delay in resume time of audio device.

To avoid this, ROM INIT wait time is set to a optimal value and
increased the retries for firmware download.
Signed-off-by: default avatarJeeja KP <jeeja.kp@intel.com>
Acked-by: default avatarVinod Koul <vinod.koul@intel.com>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 31d648f0
...@@ -25,7 +25,8 @@ ...@@ -25,7 +25,8 @@
#include "skl-sst-ipc.h" #include "skl-sst-ipc.h"
#define BXT_BASEFW_TIMEOUT 3000 #define BXT_BASEFW_TIMEOUT 3000
#define BXT_INIT_TIMEOUT 500 #define BXT_INIT_TIMEOUT 300
#define BXT_ROM_INIT_TIMEOUT 70
#define BXT_IPC_PURGE_FW 0x01004000 #define BXT_IPC_PURGE_FW 0x01004000
#define BXT_ROM_INIT 0x5 #define BXT_ROM_INIT 0x5
...@@ -45,6 +46,8 @@ ...@@ -45,6 +46,8 @@
/* Delay before scheduling D0i3 entry */ /* Delay before scheduling D0i3 entry */
#define BXT_D0I3_DELAY 5000 #define BXT_D0I3_DELAY 5000
#define BXT_FW_ROM_INIT_RETRY 3
static unsigned int bxt_get_errorcode(struct sst_dsp *ctx) static unsigned int bxt_get_errorcode(struct sst_dsp *ctx)
{ {
return sst_dsp_shim_read(ctx, BXT_ADSP_ERROR_CODE); return sst_dsp_shim_read(ctx, BXT_ADSP_ERROR_CODE);
...@@ -185,7 +188,7 @@ static int sst_bxt_prepare_fw(struct sst_dsp *ctx, ...@@ -185,7 +188,7 @@ static int sst_bxt_prepare_fw(struct sst_dsp *ctx,
/* Step 7: Wait for ROM init */ /* Step 7: Wait for ROM init */
ret = sst_dsp_register_poll(ctx, BXT_ADSP_FW_STATUS, SKL_FW_STS_MASK, ret = sst_dsp_register_poll(ctx, BXT_ADSP_FW_STATUS, SKL_FW_STS_MASK,
SKL_FW_INIT, BXT_INIT_TIMEOUT, "ROM Load"); SKL_FW_INIT, BXT_ROM_INIT_TIMEOUT, "ROM Load");
if (ret < 0) { if (ret < 0) {
dev_err(ctx->dev, "Timeout for ROM init, ret:%d\n", ret); dev_err(ctx->dev, "Timeout for ROM init, ret:%d\n", ret);
goto base_fw_load_failed; goto base_fw_load_failed;
...@@ -218,7 +221,7 @@ static int bxt_load_base_firmware(struct sst_dsp *ctx) ...@@ -218,7 +221,7 @@ static int bxt_load_base_firmware(struct sst_dsp *ctx)
{ {
struct firmware stripped_fw; struct firmware stripped_fw;
struct skl_sst *skl = ctx->thread_context; struct skl_sst *skl = ctx->thread_context;
int ret; int ret, i;
if (ctx->fw == NULL) { if (ctx->fw == NULL) {
ret = request_firmware(&ctx->fw, ctx->fw_name, ctx->dev); ret = request_firmware(&ctx->fw, ctx->fw_name, ctx->dev);
...@@ -239,18 +242,20 @@ static int bxt_load_base_firmware(struct sst_dsp *ctx) ...@@ -239,18 +242,20 @@ static int bxt_load_base_firmware(struct sst_dsp *ctx)
stripped_fw.size = ctx->fw->size; stripped_fw.size = ctx->fw->size;
skl_dsp_strip_extended_manifest(&stripped_fw); skl_dsp_strip_extended_manifest(&stripped_fw);
ret = sst_bxt_prepare_fw(ctx, stripped_fw.data, stripped_fw.size);
/* Retry Enabling core and ROM load. Retry seemed to help */ for (i = 0; i < BXT_FW_ROM_INIT_RETRY; i++) {
if (ret < 0) {
ret = sst_bxt_prepare_fw(ctx, stripped_fw.data, stripped_fw.size); ret = sst_bxt_prepare_fw(ctx, stripped_fw.data, stripped_fw.size);
if (ret < 0) { if (ret == 0)
dev_err(ctx->dev, "Error code=0x%x: FW status=0x%x\n", break;
}
if (ret < 0) {
dev_err(ctx->dev, "Error code=0x%x: FW status=0x%x\n",
sst_dsp_shim_read(ctx, BXT_ADSP_ERROR_CODE), sst_dsp_shim_read(ctx, BXT_ADSP_ERROR_CODE),
sst_dsp_shim_read(ctx, BXT_ADSP_FW_STATUS)); sst_dsp_shim_read(ctx, BXT_ADSP_FW_STATUS));
dev_err(ctx->dev, "Core En/ROM load fail:%d\n", ret); dev_err(ctx->dev, "Core En/ROM load fail:%d\n", ret);
goto sst_load_base_firmware_failed; goto sst_load_base_firmware_failed;
}
} }
ret = sst_transfer_fw_host_dma(ctx); ret = sst_transfer_fw_host_dma(ctx);
......
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