Commit 7d44ec19 authored by Cyrill Gorcunov's avatar Cyrill Gorcunov Committed by Ingo Molnar

perf, x86: P4 PMU: Fix spurious NMI messages

Several people have reported spurious unknown NMI
messages on some P4 CPUs.

This patch fixes it by checking for an overflow (negative
counter values) directly, instead of relying on the
P4_CCCR_OVF bit.
Reported-by: default avatarGeorge Spelvin <linux@horizon.com>
Reported-by: default avatarMeelis Roos <mroos@linux.ee>
Reported-by: default avatarDon Zickus <dzickus@redhat.com>
Reported-by: default avatarDave Airlie <airlied@gmail.com>
Signed-off-by: default avatarCyrill Gorcunov <gorcunov@openvz.org>
Cc: Lin Ming <ming.m.lin@intel.com>
Cc: Don Zickus <dzickus@redhat.com>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
LKML-Reference: <AANLkTinfuTfCck_FfaOHrDqQZZehtRzkBum4SpFoO=KJ@mail.gmail.com>
Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
parent 85e2efbb
...@@ -22,6 +22,7 @@ ...@@ -22,6 +22,7 @@
#define ARCH_P4_CNTRVAL_BITS (40) #define ARCH_P4_CNTRVAL_BITS (40)
#define ARCH_P4_CNTRVAL_MASK ((1ULL << ARCH_P4_CNTRVAL_BITS) - 1) #define ARCH_P4_CNTRVAL_MASK ((1ULL << ARCH_P4_CNTRVAL_BITS) - 1)
#define ARCH_P4_UNFLAGGED_BIT ((1ULL) << (ARCH_P4_CNTRVAL_BITS - 1))
#define P4_ESCR_EVENT_MASK 0x7e000000U #define P4_ESCR_EVENT_MASK 0x7e000000U
#define P4_ESCR_EVENT_SHIFT 25 #define P4_ESCR_EVENT_SHIFT 25
......
...@@ -770,9 +770,14 @@ static inline int p4_pmu_clear_cccr_ovf(struct hw_perf_event *hwc) ...@@ -770,9 +770,14 @@ static inline int p4_pmu_clear_cccr_ovf(struct hw_perf_event *hwc)
return 1; return 1;
} }
/* it might be unflagged overflow */ /*
rdmsrl(hwc->event_base + hwc->idx, v); * In some circumstances the overflow might issue an NMI but did
if (!(v & ARCH_P4_CNTRVAL_MASK)) * not set P4_CCCR_OVF bit. Because a counter holds a negative value
* we simply check for high bit being set, if it's cleared it means
* the counter has reached zero value and continued counting before
* real NMI signal was received:
*/
if (!(v & ARCH_P4_UNFLAGGED_BIT))
return 1; return 1;
return 0; return 0;
......
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