Skip to content

L
linux
Commit 7d5a0ff5 authored by Kevin Hilman's avatar Kevin Hilman
Browse files
Options

Merge tag 'samsung-dt-4' of... 

Merge tag 'samsung-dt-4' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/dt

Samsung another DT udpates for v4.2

- use labels for overriding nodes for all of exynos stuff
  (by Krzysztof Kozlowski)

- add sysmmu nodes for exynos SoCs (by Marek Szyprowski)

- for exynos5422-odroidxu3
  : enalbe wake alarm of S2MPS11 RTC
  : Hook up PWM and use it for LEDs
  : add support for Odroid XU3 Lite

- remove duplicated i2c7 for exynos5250-snow
- add JPEG codec nodes for exynos5420
- add vendor prefix for Hardkernel

* tag 'samsung-dt-4' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: (33 commits)
  ARM: dts: add sysmmu nodes for exynos5420
  ARM: dts: add sysmmu nodes for exynos5250
  ARM: dts: add sysmmu nodes for exynos4415
  ARM: dts: add sysmmu nodes for exynos3250
  ARM: dts: add sysmmu nodes for exynos4
  ARM: dts: Add Odroid XU3 Lite support
  of: Add vendor prefix for Hardkernel
  ARM: dts: odroidxu3: Enable wake alarm of S2MPS11 RTC
  ARM: dts: exynos5420: add nodes for jpeg codec
  ARM: dts: s3c2416: Use labels for overriding nodes in SMDK2416
  ARM: dts: s3c2416: Add labels to S3C2416 nodes
  ARM: dts: Use labels for overriding nodes in exynos5422-odroidxu3
  ARM: dts: Use labels for overriding nodes in exynos5440 boards
  ARM: dts: Use labels for overriding nodes in exynos5420-smdk5420
  ARM: dts: Use labels for overriding nodes in exynos542x
  ARM: dts: Use labels for overriding nodes in exynos5420-arndale-octa
  ARM: dts: Remove duplicated I2C7 nodes in exynos5250-snow
  ARM: dts: Use labels for overriding nodes in exynos5250
  ARM: dts: Add labels to exynos5 nodes
  ARM: dts: exynos5422-odroidxu3: Hook up PWM and use it for LEDs
  ...
parents ecdf94da b7004516
Expand all Hide whitespace changes
Inline Side-by-side
Showing with 4491 additions and 3703 deletions
Documentation/devicetree/bindings/vendor-prefixes.txt
View file @ 7d5a0ff5
......@@ -93,6 +93,7 @@ gumstix Gumstix, Inc.
gw Gateworks Corporation
hannstar HannStar Display Corporation
haoyu Haoyu Microelectronic Co. Ltd.
hardkernel Hardkernel Co., Ltd
himax Himax Technologies, Inc.
hisilicon Hisilicon Limited.
hit Hitachi Ltd.
......
arch/arm/boot/dts/Makefile
View file @ 7d5a0ff5
......@@ -121,6 +121,7 @@ dtb-$(CONFIG_ARCH_EXYNOS5) += \
exynos5420-peach-pit.dtb \
exynos5420-smdk5420.dtb \
exynos5422-odroidxu3.dtb \
exynos5422-odroidxu3-lite.dtb \
exynos5440-sd5v1.dtb \
exynos5440-ssdk5440.dtb \
exynos5800-peach-pi.dtb
......
arch/arm/boot/dts/exynos3250.dtsi
View file @ 7d5a0ff5
......@@ -253,9 +253,20 @@ jpeg: codec@11830000 {
assigned-clocks = <&cmu CLK_MOUT_CAM_BLK>, <&cmu CLK_SCLK_JPEG>;
assigned-clock-rates = <0>, <150000000>;
assigned-clock-parents = <&cmu CLK_DIV_MPLL_PRE>;
iommus = <&sysmmu_jpeg>;
status = "disabled";
};
sysmmu_jpeg: sysmmu@11A60000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x11a60000 0x1000>;
interrupts = <0 156 0>, <0 161 0>;
clock-names = "sysmmu", "master";
clocks = <&cmu CLK_SMMUJPEG>, <&cmu CLK_JPEG>;
power-domains = <&pd_cam>;
#iommu-cells = <0>;
};
fimd: fimd@11c00000 {
compatible = "samsung,exynos3250-fimd";
reg = <0x11c00000 0x30000>;
......@@ -264,6 +275,7 @@ fimd: fimd@11c00000 {
clocks = <&cmu CLK_SCLK_FIMD0>, <&cmu CLK_FIMD0>;
clock-names = "sclk_fimd", "fimd";
power-domains = <&pd_lcd0>;
iommus = <&sysmmu_fimd0>;
samsung,sysreg = <&sys_reg>;
status = "disabled";
};
......@@ -283,6 +295,16 @@ dsi_0: dsi@11C80000 {
status = "disabled";
};
sysmmu_fimd0: sysmmu@11E20000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x11e20000 0x1000>;
interrupts = <0 80 0>, <0 81 0>;
clock-names = "sysmmu", "master";
clocks = <&cmu CLK_SMMUFIMD0>, <&cmu CLK_FIMD0>;
power-domains = <&pd_lcd0>;
#iommu-cells = <0>;
};
hsotg: hsotg@12480000 {
compatible = "snps,dwc2";
reg = <0x12480000 0x20000>;
......@@ -377,9 +399,20 @@ mfc: codec@13400000 {
clock-names = "mfc", "sclk_mfc";
clocks = <&cmu CLK_MFC>, <&cmu CLK_SCLK_MFC>;
power-domains = <&pd_mfc>;
iommus = <&sysmmu_mfc>;
status = "disabled";
};
sysmmu_mfc: sysmmu@13620000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x13620000 0x1000>;
interrupts = <0 96 0>, <0 98 0>;
clock-names = "sysmmu", "master";
clocks = <&cmu CLK_SMMUMFC_L>, <&cmu CLK_MFC>;
power-domains = <&pd_mfc>;
#iommu-cells = <0>;
};
serial_0: serial@13800000 {
compatible = "samsung,exynos4210-uart";
reg = <0x13800000 0x100>;
......
arch/arm/boot/dts/exynos4.dtsi
View file @ 7d5a0ff5
......@@ -189,6 +189,7 @@ fimc_0: fimc@11800000 {
clock-names = "fimc", "sclk_fimc";
power-domains = <&pd_cam>;
samsung,sysreg = <&sys_reg>;
iommus = <&sysmmu_fimc0>;
status = "disabled";
};
......@@ -200,6 +201,7 @@ fimc_1: fimc@11810000 {
clock-names = "fimc", "sclk_fimc";
power-domains = <&pd_cam>;
samsung,sysreg = <&sys_reg>;
iommus = <&sysmmu_fimc1>;
status = "disabled";
};
......@@ -211,6 +213,7 @@ fimc_2: fimc@11820000 {
clock-names = "fimc", "sclk_fimc";
power-domains = <&pd_cam>;
samsung,sysreg = <&sys_reg>;
iommus = <&sysmmu_fimc2>;
status = "disabled";
};
......@@ -222,6 +225,7 @@ fimc_3: fimc@11830000 {
clock-names = "fimc", "sclk_fimc";
power-domains = <&pd_cam>;
samsung,sysreg = <&sys_reg>;
iommus = <&sysmmu_fimc3>;
status = "disabled";
};
......@@ -256,7 +260,7 @@ csis_1: csis@11890000 {
};
};
watchdog@10060000 {
watchdog: watchdog@10060000 {
compatible = "samsung,s3c2410-wdt";
reg = <0x10060000 0x100>;
interrupts = <0 43 0>;
......@@ -275,7 +279,7 @@ rtc: rtc@10070000 {
status = "disabled";
};
keypad@100A0000 {
keypad: keypad@100A0000 {
compatible = "samsung,s5pv210-keypad";
reg = <0x100A0000 0x100>;
interrupts = <0 109 0>;
......@@ -284,7 +288,7 @@ keypad@100A0000 {
status = "disabled";
};
sdhci@12510000 {
sdhci_0: sdhci@12510000 {
compatible = "samsung,exynos4210-sdhci";
reg = <0x12510000 0x100>;
interrupts = <0 73 0>;
......@@ -293,7 +297,7 @@ sdhci@12510000 {
status = "disabled";
};
sdhci@12520000 {
sdhci_1: sdhci@12520000 {
compatible = "samsung,exynos4210-sdhci";
reg = <0x12520000 0x100>;
interrupts = <0 74 0>;
......@@ -302,7 +306,7 @@ sdhci@12520000 {
status = "disabled";
};
sdhci@12530000 {
sdhci_2: sdhci@12530000 {
compatible = "samsung,exynos4210-sdhci";
reg = <0x12530000 0x100>;
interrupts = <0 75 0>;
......@@ -311,7 +315,7 @@ sdhci@12530000 {
status = "disabled";
};
sdhci@12540000 {
sdhci_3: sdhci@12540000 {
compatible = "samsung,exynos4210-sdhci";
reg = <0x12540000 0x100>;
interrupts = <0 76 0>;
......@@ -330,7 +334,7 @@ exynos_usbphy: exynos-usbphy@125B0000 {
status = "disabled";
};
hsotg@12480000 {
hsotg: hsotg@12480000 {
compatible = "samsung,s3c6400-hsotg";
reg = <0x12480000 0x20000>;
interrupts = <0 71 0>;
......@@ -341,7 +345,7 @@ hsotg@12480000 {
status = "disabled";
};
ehci@12580000 {
ehci: ehci@12580000 {
compatible = "samsung,exynos4210-ehci";
reg = <0x12580000 0x100>;
interrupts = <0 70 0>;
......@@ -367,7 +371,7 @@ port@2 {
};
};
ohci@12590000 {
ohci: ohci@12590000 {
compatible = "samsung,exynos4210-ohci";
reg = <0x12590000 0x100>;
interrupts = <0 70 0>;
......@@ -416,6 +420,8 @@ mfc: codec@13400000 {
power-domains = <&pd_mfc>;
clocks = <&clock CLK_MFC>, <&clock CLK_SCLK_MFC>;
clock-names = "mfc", "sclk_mfc";
iommus = <&sysmmu_mfc_l>, <&sysmmu_mfc_r>;
iommu-names = "left", "right";
status = "disabled";
};
......@@ -620,7 +626,7 @@ spi_2: spi@13940000 {
status = "disabled";
};
pwm@139D0000 {
pwm: pwm@139D0000 {
compatible = "samsung,exynos4210-pwm";
reg = <0x139D0000 0x1000>;
interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>, <0 41 0>;
......@@ -680,6 +686,7 @@ fimd: fimd@11c00000 {
clocks = <&clock CLK_SCLK_FIMD0>, <&clock CLK_FIMD0>;
clock-names = "sclk_fimd", "fimd";
power-domains = <&pd_lcd0>;
iommus = <&sysmmu_fimd0>;
samsung,sysreg = <&sys_reg>;
status = "disabled";
};
......@@ -688,7 +695,7 @@ tmu: tmu@100C0000 {
#include "exynos4412-tmu-sensor-conf.dtsi"
};
jpeg-codec@11840000 {
jpeg_codec: jpeg-codec@11840000 {
compatible = "samsung,exynos4210-jpeg";
reg = <0x11840000 0x1000>;
interrupts = <0 88 0>;
......@@ -717,6 +724,7 @@ mixer: mixer@12C10000 {
interrupts = <0 91 0>;
reg = <0x12C10000 0x2100>, <0x12c00000 0x300>;
power-domains = <&pd_tv>;
iommus = <&sysmmu_tv>;
status = "disabled";
};
......@@ -827,4 +835,114 @@ ppmu_mfc_right: ppmu_mfc_right@13670000 {
clock-names = "ppmu";
status = "disabled";
};
sysmmu_mfc_l: sysmmu@13620000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x13620000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <5 5>;
clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_MFCL>, <&clock CLK_MFC>;
power-domains = <&pd_mfc>;
#iommu-cells = <0>;
};
sysmmu_mfc_r: sysmmu@13630000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x13630000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <5 6>;
clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_MFCR>, <&clock CLK_MFC>;
power-domains = <&pd_mfc>;
#iommu-cells = <0>;
};
sysmmu_tv: sysmmu@12E20000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x12E20000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <5 4>;
clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_TV>, <&clock CLK_MIXER>;
power-domains = <&pd_tv>;
#iommu-cells = <0>;
};
sysmmu_fimc0: sysmmu@11A20000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x11A20000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <4 2>;
clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_FIMC0>, <&clock CLK_FIMC0>;
power-domains = <&pd_cam>;
#iommu-cells = <0>;
};
sysmmu_fimc1: sysmmu@11A30000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x11A30000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <4 3>;
clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_FIMC1>, <&clock CLK_FIMC1>;
power-domains = <&pd_cam>;
#iommu-cells = <0>;
};
sysmmu_fimc2: sysmmu@11A40000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x11A40000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <4 4>;
clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_FIMC2>, <&clock CLK_FIMC2>;
power-domains = <&pd_cam>;
#iommu-cells = <0>;
};
sysmmu_fimc3: sysmmu@11A50000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x11A50000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <4 5>;
clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_FIMC3>, <&clock CLK_FIMC3>;
power-domains = <&pd_cam>;
#iommu-cells = <0>;
};
sysmmu_jpeg: sysmmu@11A60000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x11A60000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <4 6>;
clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_JPEG>, <&clock CLK_JPEG>;
power-domains = <&pd_cam>;
#iommu-cells = <0>;
};
sysmmu_rotator: sysmmu@12A30000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x12A30000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <5 0>;
clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_ROTATOR>, <&clock CLK_ROTATOR>;
power-domains = <&pd_lcd0>;
#iommu-cells = <0>;
};
sysmmu_fimd0: sysmmu@11E20000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x11E20000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <5 2>;
clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_FIMD0>, <&clock CLK_FIMD0>;
power-domains = <&pd_lcd0>;
#iommu-cells = <0>;
};
};
arch/arm/boot/dts/exynos4210-origen.dts
View file @ 7d5a0ff5
......@@ -50,209 +50,6 @@ mmc_reg: regulator@0 {
};
};
watchdog@10060000 {
status = "okay";
};
rtc@10070000 {
status = "okay";
};
tmu@100C0000 {
status = "okay";
};
sdhci@12530000 {
bus-width = <4>;
pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4 &sd2_cd>;
pinctrl-names = "default";
vmmc-supply = <&mmc_reg>;
status = "okay";
};
sdhci@12510000 {
bus-width = <4>;
pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_cd>;
pinctrl-names = "default";
vmmc-supply = <&mmc_reg>;
status = "okay";
};
g2d@12800000 {
status = "okay";
};
codec@13400000 {
samsung,mfc-r = <0x43000000 0x800000>;
samsung,mfc-l = <0x51000000 0x800000>;
status = "okay";
};
serial@13800000 {
status = "okay";
};
serial@13810000 {
status = "okay";
};
serial@13820000 {
status = "okay";
};
serial@13830000 {
status = "okay";
};
i2c@13860000 {
status = "okay";
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <20000>;
pinctrl-0 = <&i2c0_bus>;
pinctrl-names = "default";
max8997_pmic@66 {
compatible = "maxim,max8997-pmic";
reg = <0x66>;
interrupt-parent = <&gpx0>;
interrupts = <4 0>, <3 0>;
max8997,pmic-buck1-dvs-voltage = <1350000>;
max8997,pmic-buck2-dvs-voltage = <1100000>;
max8997,pmic-buck5-dvs-voltage = <1200000>;
regulators {
ldo1_reg: LDO1 {
regulator-name = "VDD_ABB_3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
ldo2_reg: LDO2 {
regulator-name = "VDD_ALIVE_1.1V";
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-always-on;
};
ldo3_reg: LDO3 {
regulator-name = "VMIPI_1.1V";
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
};
ldo4_reg: LDO4 {
regulator-name = "VDD_RTC_1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
ldo6_reg: LDO6 {
regulator-name = "VMIPI_1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
ldo7_reg: LDO7 {
regulator-name = "VDD_AUD_1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
ldo8_reg: LDO8 {
regulator-name = "VADC_3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
ldo9_reg: LDO9 {
regulator-name = "DVDD_SWB_2.8V";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-always-on;
};
ldo10_reg: LDO10 {
regulator-name = "VDD_PLL_1.1V";
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-always-on;
};
ldo11_reg: LDO11 {
regulator-name = "VDD_AUD_3V";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
};
ldo14_reg: LDO14 {
regulator-name = "AVDD18_SWB_1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
ldo17_reg: LDO17 {
regulator-name = "VDD_SWB_3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
ldo21_reg: LDO21 {
regulator-name = "VDD_MIF_1.2V";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
};
buck1_reg: BUCK1 {
/*
* HACK: The real name is VDD_ARM_1.2V,
* but exynos-cpufreq does not support
* DT-based regulator lookup yet.
*/
regulator-name = "vdd_arm";
regulator-min-microvolt = <950000>;
regulator-max-microvolt = <1350000>;
regulator-always-on;
regulator-boot-on;
};
buck2_reg: BUCK2 {
regulator-name = "VDD_INT_1.1V";
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <1100000>;
regulator-always-on;
regulator-boot-on;
};
buck3_reg: BUCK3 {
regulator-name = "VDD_G3D_1.1V";
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <1100000>;
};
buck5_reg: BUCK5 {
regulator-name = "VDDQ_M1M2_1.2V";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
};
buck7_reg: BUCK7 {
regulator-name = "VDD_LCD_3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
};
};
};
gpio_keys {
compatible = "gpio-keys";
#address-cells = <1>;
......@@ -314,12 +111,6 @@ xusbxti {
};
};
fimd@11c00000 {
pinctrl-0 = <&lcd_en &lcd_clk &lcd_data24 &pwm0_out>;
pinctrl-names = "default";
status = "okay";
};
display-timings {
native-mode = <&timing0>;
timing0: timing {
......@@ -335,3 +126,212 @@ timing0: timing {
};
};
};
&fimd {
pinctrl-0 = <&lcd_en &lcd_clk &lcd_data24 &pwm0_out>;
pinctrl-names = "default";
status = "okay";
};
&g2d {
status = "okay";
};
&i2c_0 {
status = "okay";
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <20000>;
pinctrl-0 = <&i2c0_bus>;
pinctrl-names = "default";
max8997_pmic@66 {
compatible = "maxim,max8997-pmic";
reg = <0x66>;
interrupt-parent = <&gpx0>;
interrupts = <4 0>, <3 0>;
max8997,pmic-buck1-dvs-voltage = <1350000>;
max8997,pmic-buck2-dvs-voltage = <1100000>;
max8997,pmic-buck5-dvs-voltage = <1200000>;
regulators {
ldo1_reg: LDO1 {
regulator-name = "VDD_ABB_3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
ldo2_reg: LDO2 {
regulator-name = "VDD_ALIVE_1.1V";
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-always-on;
};
ldo3_reg: LDO3 {
regulator-name = "VMIPI_1.1V";
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
};
ldo4_reg: LDO4 {
regulator-name = "VDD_RTC_1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
ldo6_reg: LDO6 {
regulator-name = "VMIPI_1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
ldo7_reg: LDO7 {
regulator-name = "VDD_AUD_1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
ldo8_reg: LDO8 {
regulator-name = "VADC_3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
ldo9_reg: LDO9 {
regulator-name = "DVDD_SWB_2.8V";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-always-on;
};
ldo10_reg: LDO10 {
regulator-name = "VDD_PLL_1.1V";
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-always-on;
};
ldo11_reg: LDO11 {
regulator-name = "VDD_AUD_3V";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
};
ldo14_reg: LDO14 {
regulator-name = "AVDD18_SWB_1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
ldo17_reg: LDO17 {
regulator-name = "VDD_SWB_3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
ldo21_reg: LDO21 {
regulator-name = "VDD_MIF_1.2V";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
};
buck1_reg: BUCK1 {
/*
* HACK: The real name is VDD_ARM_1.2V,
* but exynos-cpufreq does not support
* DT-based regulator lookup yet.
*/
regulator-name = "vdd_arm";
regulator-min-microvolt = <950000>;
regulator-max-microvolt = <1350000>;
regulator-always-on;
regulator-boot-on;
};
buck2_reg: BUCK2 {
regulator-name = "VDD_INT_1.1V";
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <1100000>;
regulator-always-on;
regulator-boot-on;
};
buck3_reg: BUCK3 {
regulator-name = "VDD_G3D_1.1V";
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <1100000>;
};
buck5_reg: BUCK5 {
regulator-name = "VDDQ_M1M2_1.2V";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
};
buck7_reg: BUCK7 {
regulator-name = "VDD_LCD_3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
};
};
};
&mfc {
samsung,mfc-r = <0x43000000 0x800000>;
samsung,mfc-l = <0x51000000 0x800000>;
status = "okay";
};
&sdhci_0 {
bus-width = <4>;
pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_cd>;
pinctrl-names = "default";
vmmc-supply = <&mmc_reg>;
status = "okay";
};
&sdhci_2 {
bus-width = <4>;
pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4 &sd2_cd>;
pinctrl-names = "default";
vmmc-supply = <&mmc_reg>;
status = "okay";
};
&serial_0 {
status = "okay";
};
&serial_1 {
status = "okay";
};
&serial_2 {
status = "okay";
};
&serial_3 {
status = "okay";
};
&rtc {
status = "okay";
};
&tmu {
status = "okay";
};
&watchdog {
status = "okay";
};
arch/arm/boot/dts/exynos4210-smdkv310.dts
View file @ 7d5a0ff5
......@@ -30,181 +30,181 @@ chosen {
stdout-path = &serial_1;
};
sdhci@12530000 {
bus-width = <4>;
pinctrl-names = "default";
pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
status = "okay";
};
fixed-rate-clocks {
xxti {
compatible = "samsung,clock-xxti";
clock-frequency = <12000000>;
};
g2d@12800000 {
status = "okay";
xusbxti {
compatible = "samsung,clock-xusbxti";
clock-frequency = <24000000>;
};
};
};
codec@13400000 {
samsung,mfc-r = <0x43000000 0x800000>;
samsung,mfc-l = <0x51000000 0x800000>;
status = "okay";
};
&g2d {
status = "okay";
};
serial@13800000 {
status = "okay";
};
&i2c_0 {
#address-cells = <1>;
#size-cells = <0>;
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <100000>;
status = "okay";
serial@13810000 {
status = "okay";
eeprom@50 {
compatible = "samsung,24ad0xd1";
reg = <0x50>;
};
serial@13820000 {
status = "okay";
eeprom@52 {
compatible = "samsung,24ad0xd1";
reg = <0x52>;
};
};
serial@13830000 {
status = "okay";
&keypad {
samsung,keypad-num-rows = <2>;
samsung,keypad-num-columns = <8>;
linux,keypad-no-autorepeat;
linux,keypad-wakeup;
pinctrl-names = "default";
pinctrl-0 = <&keypad_rows &keypad_cols>;
status = "okay";
key_1 {
keypad,row = <0>;
keypad,column = <3>;
linux,code = <2>;
};
pinctrl@11000000 {
keypad_rows: keypad-rows {
samsung,pins = "gpx2-0", "gpx2-1";
samsung,pin-function = <3>;
samsung,pin-pud = <3>;
samsung,pin-drv = <0>;
};
keypad_cols: keypad-cols {
samsung,pins = "gpx1-0", "gpx1-1", "gpx1-2", "gpx1-3",
"gpx1-4", "gpx1-5", "gpx1-6", "gpx1-7";
samsung,pin-function = <3>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
key_2 {
keypad,row = <0>;
keypad,column = <4>;
linux,code = <3>;
};
keypad@100A0000 {
samsung,keypad-num-rows = <2>;
samsung,keypad-num-columns = <8>;
linux,keypad-no-autorepeat;
linux,keypad-wakeup;
pinctrl-names = "default";
pinctrl-0 = <&keypad_rows &keypad_cols>;
status = "okay";
key_3 {
keypad,row = <0>;
keypad,column = <5>;
linux,code = <4>;
};
key_1 {
keypad,row = <0>;
keypad,column = <3>;
linux,code = <2>;
};
key_4 {
keypad,row = <0>;
keypad,column = <6>;
linux,code = <5>;
};
key_2 {
keypad,row = <0>;
keypad,column = <4>;
linux,code = <3>;
};
key_5 {
keypad,row = <0>;
keypad,column = <7>;
linux,code = <6>;
};
key_3 {
keypad,row = <0>;
keypad,column = <5>;
linux,code = <4>;
};
key_a {
keypad,row = <1>;
keypad,column = <3>;
linux,code = <30>;
};
key_4 {
keypad,row = <0>;
keypad,column = <6>;
linux,code = <5>;
};
key_b {
keypad,row = <1>;
keypad,column = <4>;
linux,code = <48>;
};
key_5 {
keypad,row = <0>;
keypad,column = <7>;
linux,code = <6>;
};
key_c {
keypad,row = <1>;
keypad,column = <5>;
linux,code = <46>;
};
key_a {
keypad,row = <1>;
keypad,column = <3>;
linux,code = <30>;
};
key_d {
keypad,row = <1>;
keypad,column = <6>;
linux,code = <32>;
};
key_b {
keypad,row = <1>;
keypad,column = <4>;
linux,code = <48>;
};
key_e {
keypad,row = <1>;
keypad,column = <7>;
linux,code = <18>;
};
};
key_c {
keypad,row = <1>;
keypad,column = <5>;
linux,code = <46>;
};
&mfc {
samsung,mfc-r = <0x43000000 0x800000>;
samsung,mfc-l = <0x51000000 0x800000>;
status = "okay";
};
key_d {
keypad,row = <1>;
keypad,column = <6>;
linux,code = <32>;
};
&pinctrl_1 {
keypad_rows: keypad-rows {
samsung,pins = "gpx2-0", "gpx2-1";
samsung,pin-function = <3>;
samsung,pin-pud = <3>;
samsung,pin-drv = <0>;
};
key_e {
keypad,row = <1>;
keypad,column = <7>;
linux,code = <18>;
};
keypad_cols: keypad-cols {
samsung,pins = "gpx1-0", "gpx1-1", "gpx1-2", "gpx1-3",
"gpx1-4", "gpx1-5", "gpx1-6", "gpx1-7";
samsung,pin-function = <3>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
};
i2c@13860000 {
#address-cells = <1>;
#size-cells = <0>;
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <100000>;
status = "okay";
eeprom@50 {
compatible = "samsung,24ad0xd1";
reg = <0x50>;
};
&sdhci_2 {
bus-width = <4>;
pinctrl-names = "default";
pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
status = "okay";
};
eeprom@52 {
compatible = "samsung,24ad0xd1";
reg = <0x52>;
};
};
&serial_0 {
status = "okay";
};
spi_2: spi@13940000 {
cs-gpios = <&gpc1 2 0>;
status = "okay";
&serial_1 {
status = "okay";
};
w25x80@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "w25x80";
reg = <0>;
spi-max-frequency = <1000000>;
&serial_2 {
status = "okay";
};
controller-data {
samsung,spi-feedback-delay = <0>;
};
&serial_3 {
status = "okay";
};
partition@0 {
label = "U-Boot";
reg = <0x0 0x40000>;
read-only;
};
&spi_2 {
cs-gpios = <&gpc1 2 0>;
status = "okay";
partition@40000 {
label = "Kernel";
reg = <0x40000 0xc0000>;
};
w25x80@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "w25x80";
reg = <0>;
spi-max-frequency = <1000000>;
controller-data {
samsung,spi-feedback-delay = <0>;
};
};
fixed-rate-clocks {
xxti {
compatible = "samsung,clock-xxti";
clock-frequency = <12000000>;
partition@0 {
label = "U-Boot";
reg = <0x0 0x40000>;
read-only;
};
xusbxti {
compatible = "samsung,clock-xusbxti";
clock-frequency = <24000000>;
partition@40000 {
label = "Kernel";
reg = <0x40000 0xc0000>;
};
};
};
arch/arm/boot/dts/exynos4210-trats.dts
View file @ 7d5a0ff5
This diff is collapsed.
arch/arm/boot/dts/exynos4210.dtsi
View file @ 7d5a0ff5
......@@ -52,17 +52,7 @@ cpu@901 {
};
};
pmu_system_controller: system-controller@10020000 {
clock-names = "clkout0", "clkout1", "clkout2", "clkout3",
"clkout4", "clkout8", "clkout9";
clocks = <&clock CLK_OUT_DMC>, <&clock CLK_OUT_TOP>,
<&clock CLK_OUT_LEFTBUS>, <&clock CLK_OUT_RIGHTBUS>,
<&clock CLK_OUT_CPU>, <&clock CLK_XXTI>,
<&clock CLK_XUSBXTI>;
#clock-cells = <1>;
};
sysram@02020000 {
sysram: sysram@02020000 {
compatible = "mmio-sram";
reg = <0x02020000 0x20000>;
#address-cells = <1>;
......@@ -95,19 +85,7 @@ l2c: l2-cache-controller@10502000 {
arm,data-latency = <2 2 1>;
};
gic: interrupt-controller@10490000 {
cpu-offset = <0x8000>;
};
combiner: interrupt-controller@10440000 {
samsung,combiner-nr = <16>;
interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
<0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
<0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
<0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>;
};
mct@10050000 {
mct: mct@10050000 {
compatible = "samsung,exynos4210-mct";
reg = <0x10050000 0x800>;
interrupt-parent = <&mct_map>;
......@@ -189,12 +167,13 @@ cpu_alert2: cpu-alert-2 {
};
};
g2d@12800000 {
g2d: g2d@12800000 {
compatible = "samsung,s5pv210-g2d";
reg = <0x12800000 0x1000>;
interrupts = <0 89 0>;
clocks = <&clock CLK_SCLK_FIMG2D>, <&clock CLK_G2D>;
clock-names = "sclk_fimg2d", "fimg2d";
iommus = <&sysmmu_g2d>;
status = "disabled";
};
......@@ -244,4 +223,47 @@ ppmu_lcd1: ppmu_lcd1@12240000 {
clock-names = "ppmu";
status = "disabled";
};
sysmmu_g2d: sysmmu@12A20000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x12A20000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <4 7>;
clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_G2D>, <&clock CLK_G2D>;
power-domains = <&pd_lcd0>;
#iommu-cells = <0>;
};
sysmmu_fimd1: sysmmu@12220000 {
compatible = "samsung,exynos-sysmmu";
interrupt-parent = <&combiner>;
reg = <0x12220000 0x1000>;
interrupts = <5 3>;
clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_FIMD1>, <&clock CLK_FIMD1>;
power-domains = <&pd_lcd1>;
#iommu-cells = <0>;
};
};
&gic {
cpu-offset = <0x8000>;
};
&combiner {
samsung,combiner-nr = <16>;
interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
<0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
<0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
<0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>;
};
&pmu_system_controller {
clock-names = "clkout0", "clkout1", "clkout2", "clkout3",
"clkout4", "clkout8", "clkout9";
clocks = <&clock CLK_OUT_DMC>, <&clock CLK_OUT_TOP>,
<&clock CLK_OUT_LEFTBUS>, <&clock CLK_OUT_RIGHTBUS>,
<&clock CLK_OUT_CPU>, <&clock CLK_XXTI>, <&clock CLK_XUSBXTI>;
#clock-cells = <1>;
};
arch/arm/boot/dts/exynos4212.dtsi
View file @ 7d5a0ff5
......@@ -41,12 +41,12 @@ cpu@A01 {
reg = <0xA01>;
};
};
};
combiner: interrupt-controller@10440000 {
samsung,combiner-nr = <18>;
};
&combiner {
samsung,combiner-nr = <18>;
};
gic: interrupt-controller@10490000 {
cpu-offset = <0x8000>;
};
&gic {
cpu-offset = <0x8000>;
};
arch/arm/boot/dts/exynos4412-odroidx.dts
View file @ 7d5a0ff5
......@@ -38,14 +38,6 @@ led2 {
};
};
serial@13820000 {
status = "okay";
};
serial@13830000 {
status = "okay";
};
gpio_keys {
pinctrl-0 = <&gpio_power_key &gpio_home_key>;
......@@ -83,3 +75,11 @@ gpio_home_key: home_key {
samsung,pin-pud = <0>;
};
};
&serial_2 {
status = "okay";
};
&serial_3 {
status = "okay";
};
arch/arm/boot/dts/exynos4412-origen.dts
View file @ 7d5a0ff5
This diff is collapsed.
arch/arm/boot/dts/exynos4412-smdk4412.dts
View file @ 7d5a0ff5
......@@ -28,135 +28,135 @@ chosen {
stdout-path = &serial_1;
};
g2d@10800000 {
status = "okay";
};
pinctrl@11000000 {
keypad_rows: keypad-rows {
samsung,pins = "gpx2-0", "gpx2-1", "gpx2-2";
samsung,pin-function = <3>;
samsung,pin-pud = <3>;
samsung,pin-drv = <0>;
fixed-rate-clocks {
xxti {
compatible = "samsung,clock-xxti";
clock-frequency = <0>;
};
keypad_cols: keypad-cols {
samsung,pins = "gpx1-0", "gpx1-1", "gpx1-2", "gpx1-3",
"gpx1-4", "gpx1-5", "gpx1-6", "gpx1-7";
samsung,pin-function = <3>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
xusbxti {
compatible = "samsung,clock-xusbxti";
clock-frequency = <24000000>;
};
};
};
keypad@100A0000 {
samsung,keypad-num-rows = <3>;
samsung,keypad-num-columns = <8>;
linux,keypad-no-autorepeat;
linux,keypad-wakeup;
pinctrl-0 = <&keypad_rows &keypad_cols>;
pinctrl-names = "default";
status = "okay";
key_1 {
keypad,row = <1>;
keypad,column = <3>;
linux,code = <2>;
};
key_2 {
keypad,row = <1>;
keypad,column = <4>;
linux,code = <3>;
};
key_3 {
keypad,row = <1>;
keypad,column = <5>;
linux,code = <4>;
};
key_4 {
keypad,row = <1>;
keypad,column = <6>;
linux,code = <5>;
};
&g2d {
status = "okay";
};
key_5 {
keypad,row = <1>;
keypad,column = <7>;
linux,code = <6>;
};
&keypad {
samsung,keypad-num-rows = <3>;
samsung,keypad-num-columns = <8>;
linux,keypad-no-autorepeat;
linux,keypad-wakeup;
pinctrl-0 = <&keypad_rows &keypad_cols>;
pinctrl-names = "default";
status = "okay";
key_1 {
keypad,row = <1>;
keypad,column = <3>;
linux,code = <2>;
};
key_A {
keypad,row = <2>;
keypad,column = <6>;
linux,code = <30>;
};
key_2 {
keypad,row = <1>;
keypad,column = <4>;
linux,code = <3>;
};
key_B {
keypad,row = <2>;
keypad,column = <7>;
linux,code = <48>;
};
key_3 {
keypad,row = <1>;
keypad,column = <5>;
linux,code = <4>;
};
key_C {
keypad,row = <0>;
keypad,column = <5>;
linux,code = <46>;
};
key_4 {
keypad,row = <1>;
keypad,column = <6>;
linux,code = <5>;
};
key_D {
keypad,row = <2>;
keypad,column = <5>;
linux,code = <32>;
};
key_5 {
keypad,row = <1>;
keypad,column = <7>;
linux,code = <6>;
};
key_E {
keypad,row = <0>;
keypad,column = <7>;
linux,code = <18>;
};
key_A {
keypad,row = <2>;
keypad,column = <6>;
linux,code = <30>;
};
sdhci@12530000 {
bus-width = <4>;
pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4 &sd2_cd>;
pinctrl-names = "default";
status = "okay";
key_B {
keypad,row = <2>;
keypad,column = <7>;
linux,code = <48>;
};
codec@13400000 {
samsung,mfc-r = <0x43000000 0x800000>;
samsung,mfc-l = <0x51000000 0x800000>;
status = "okay";
key_C {
keypad,row = <0>;
keypad,column = <5>;
linux,code = <46>;
};
serial@13800000 {
status = "okay";
key_D {
keypad,row = <2>;
keypad,column = <5>;
linux,code = <32>;
};
serial@13810000 {
status = "okay";
key_E {
keypad,row = <0>;
keypad,column = <7>;
linux,code = <18>;
};
};
&mfc {
samsung,mfc-r = <0x43000000 0x800000>;
samsung,mfc-l = <0x51000000 0x800000>;
status = "okay";
};
serial@13820000 {
status = "okay";
&pinctrl_1 {
keypad_rows: keypad-rows {
samsung,pins = "gpx2-0", "gpx2-1", "gpx2-2";
samsung,pin-function = <3>;
samsung,pin-pud = <3>;
samsung,pin-drv = <0>;
};
serial@13830000 {
status = "okay";
keypad_cols: keypad-cols {
samsung,pins = "gpx1-0", "gpx1-1", "gpx1-2", "gpx1-3",
"gpx1-4", "gpx1-5", "gpx1-6", "gpx1-7";
samsung,pin-function = <3>;
samsung,pin-pud = <0>;
samsung,pin-drv = <0>;
};
};
fixed-rate-clocks {
xxti {
compatible = "samsung,clock-xxti";
clock-frequency = <0>;
};
&sdhci_2 {
bus-width = <4>;
pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4 &sd2_cd>;
pinctrl-names = "default";
status = "okay";
};
xusbxti {
compatible = "samsung,clock-xusbxti";
clock-frequency = <24000000>;
};
};
&serial_0 {
status = "okay";
};
&serial_1 {
status = "okay";
};
&serial_2 {
status = "okay";
};
&serial_3 {
status = "okay";
};
arch/arm/boot/dts/exynos4412-tiny4412.dts
View file @ 7d5a0ff5
......@@ -56,33 +56,6 @@ led4 {
};
};
rtc@10070000 {
status = "okay";
};
sdhci@12530000 {
bus-width = <4>;
pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
pinctrl-names = "default";
status = "okay";
};
serial@13800000 {
status = "okay";
};
serial@13810000 {
status = "okay";
};
serial@13820000 {
status = "okay";
};
serial@13830000 {
status = "okay";
};
fixed-rate-clocks {
xxti {
compatible = "samsung,clock-xxti";
......@@ -95,3 +68,30 @@ xusbxti {
};
};
};
&rtc {
status = "okay";
};
&sdhci_2 {
bus-width = <4>;
pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
pinctrl-names = "default";
status = "okay";
};
&serial_0 {
status = "okay";
};
&serial_1 {
status = "okay";
};
&serial_2 {
status = "okay";
};
&serial_3 {
status = "okay";
};
arch/arm/boot/dts/exynos4412-trats2.dts
View file @ 7d5a0ff5
This diff is collapsed.
arch/arm/boot/dts/exynos4412.dtsi
View file @ 7d5a0ff5
......@@ -54,19 +54,19 @@ cpu@A03 {
};
};
combiner: interrupt-controller@10440000 {
samsung,combiner-nr = <20>;
};
pmu {
interrupts = <2 2>, <3 2>, <18 2>, <19 2>;
};
};
gic: interrupt-controller@10490000 {
cpu-offset = <0x4000>;
};
&pmu_system_controller {
compatible = "samsung,exynos4412-pmu", "syscon";
};
pmu_system_controller: system-controller@10020000 {
compatible = "samsung,exynos4412-pmu", "syscon";
};
&combiner {
samsung,combiner-nr = <20>;
};
&gic {
cpu-offset = <0x4000>;
};
arch/arm/boot/dts/exynos4415.dtsi
View file @ 7d5a0ff5
......@@ -249,6 +249,7 @@ fimd: fimd@11C00000 {
clocks = <&cmu CLK_SCLK_FIMD0>, <&cmu CLK_FIMD0>;
clock-names = "sclk_fimd", "fimd";
samsung,power-domain = <&pd_lcd0>;
iommus = <&sysmmu_fimd0>;
samsung,sysreg = <&sysreg_system_controller>;
status = "disabled";
};
......@@ -268,6 +269,16 @@ dsi_0: dsi@11C80000 {
status = "disabled";
};
sysmmu_fimd0: sysmmu@11E20000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x11e20000 0x1000>;
interrupts = <0 80 0>, <0 81 0>;
clock-names = "sysmmu", "master";
clocks = <&cmu CLK_SMMUFIMD0>, <&cmu CLK_FIMD0>;
power-domains = <&pd_lcd0>;
#iommu-cells = <0>;
};
hsotg: hsotg@12480000 {
compatible = "samsung,s3c6400-hsotg";
reg = <0x12480000 0x20000>;
......
arch/arm/boot/dts/exynos4x12-pinctrl.dtsi
View file @ 7d5a0ff5
......@@ -29,7 +29,7 @@ _pin { \
}
/ {
pinctrl@11400000 {
pinctrl_0: pinctrl@11400000 {
gpa0: gpa0 {
gpio-controller;
#gpio-cells = <2>;
......@@ -441,7 +441,7 @@ cam_port_a_clk_idle: cam-port-a-clk-idle {
};
};
pinctrl@11000000 {
pinctrl_1: pinctrl@11000000 {
gpk0: gpk0 {
gpio-controller;
#gpio-cells = <2>;
......@@ -887,7 +887,7 @@ fimc_is_uart: fimc-is-uart {
};
};
pinctrl@03860000 {
pinctrl_2: pinctrl@03860000 {
gpz: gpz {
gpio-controller;
#gpio-cells = <2>;
......@@ -913,7 +913,7 @@ pcm0_bus: pcm0-bus {
};
};
pinctrl@106E0000 {
pinctrl_3: pinctrl@106E0000 {
gpv0: gpv0 {
gpio-controller;
#gpio-cells = <2>;
......
arch/arm/boot/dts/exynos4x12.dtsi
View file @ 7d5a0ff5
......@@ -96,32 +96,6 @@ mct_map: mct-map {
};
};
combiner: interrupt-controller@10440000 {
interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
<0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
<0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
<0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>,
<0 107 0>, <0 108 0>, <0 48 0>, <0 42 0>;
};
pinctrl_0: pinctrl@11400000 {
compatible = "samsung,exynos4x12-pinctrl";
reg = <0x11400000 0x1000>;
interrupts = <0 47 0>;
};
pinctrl_1: pinctrl@11000000 {
compatible = "samsung,exynos4x12-pinctrl";
reg = <0x11000000 0x1000>;
interrupts = <0 46 0>;
wakup_eint: wakeup-interrupt-controller {
compatible = "samsung,exynos4210-wakeup-eint";
interrupt-parent = <&gic>;
interrupts = <0 32 0>;
};
};
adc: adc@126C0000 {
compatible = "samsung,exynos-adc-v1";
reg = <0x126C0000 0x100>;
......@@ -135,36 +109,13 @@ adc: adc@126C0000 {
status = "disabled";
};
pinctrl_2: pinctrl@03860000 {
compatible = "samsung,exynos4x12-pinctrl";
reg = <0x03860000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <10 0>;
};
pinctrl_3: pinctrl@106E0000 {
compatible = "samsung,exynos4x12-pinctrl";
reg = <0x106E0000 0x1000>;
interrupts = <0 72 0>;
};
pmu_system_controller: system-controller@10020000 {
compatible = "samsung,exynos4212-pmu", "syscon";
clock-names = "clkout0", "clkout1", "clkout2", "clkout3",
"clkout4", "clkout8", "clkout9";
clocks = <&clock CLK_OUT_DMC>, <&clock CLK_OUT_TOP>,
<&clock CLK_OUT_LEFTBUS>, <&clock CLK_OUT_RIGHTBUS>,
<&clock CLK_OUT_CPU>, <&clock CLK_XXTI>,
<&clock CLK_XUSBXTI>;
#clock-cells = <1>;
};
g2d@10800000 {
g2d: g2d@10800000 {
compatible = "samsung,exynos4212-g2d";
reg = <0x10800000 0x1000>;
interrupts = <0 89 0>;
clocks = <&clock CLK_SCLK_FIMG2D>, <&clock CLK_G2D>;
clock-names = "sclk_fimg2d", "fimg2d";
iommus = <&sysmmu_g2d>;
status = "disabled";
};
......@@ -173,40 +124,7 @@ camera {
<&clock CLK_PIXELASYNCM0>, <&clock CLK_PIXELASYNCM1>;
clock-names = "sclk_cam0", "sclk_cam1", "pxl_async0", "pxl_async1";
fimc_0: fimc@11800000 {
compatible = "samsung,exynos4212-fimc";
samsung,pix-limits = <4224 8192 1920 4224>;
samsung,mainscaler-ext;
samsung,isp-wb;
samsung,cam-if;
};
fimc_1: fimc@11810000 {
compatible = "samsung,exynos4212-fimc";
samsung,pix-limits = <4224 8192 1920 4224>;
samsung,mainscaler-ext;
samsung,isp-wb;
samsung,cam-if;
};
fimc_2: fimc@11820000 {
compatible = "samsung,exynos4212-fimc";
samsung,pix-limits = <4224 8192 1920 4224>;
samsung,mainscaler-ext;
samsung,isp-wb;
samsung,lcd-wb;
samsung,cam-if;
};
fimc_3: fimc@11830000 {
compatible = "samsung,exynos4212-fimc";
samsung,pix-limits = <1920 8192 1366 1920>;
samsung,rotators = <0>;
samsung,mainscaler-ext;
samsung,isp-wb;
samsung,lcd-wb;
};
/* fimc_[0-3] are configured outside, under phandles */
fimc_lite_0: fimc-lite@12390000 {
compatible = "samsung,exynos4212-fimc-lite";
reg = <0x12390000 0x1000>;
......@@ -214,6 +132,7 @@ fimc_lite_0: fimc-lite@12390000 {
power-domains = <&pd_isp>;
clocks = <&clock CLK_FIMC_LITE0>;
clock-names = "flite";
iommus = <&sysmmu_fimc_lite0>;
status = "disabled";
};
......@@ -224,6 +143,7 @@ fimc_lite_1: fimc-lite@123A0000 {
power-domains = <&pd_isp>;
clocks = <&clock CLK_FIMC_LITE1>;
clock-names = "flite";
iommus = <&sysmmu_fimc_lite1>;
status = "disabled";
};
......@@ -252,6 +172,9 @@ fimc_is: fimc-is@12000000 {
"mcuispdiv1", "uart", "aclk200",
"div_aclk200", "aclk400mcuisp",
"div_aclk400mcuisp";
iommus = <&sysmmu_fimc_isp>, <&sysmmu_fimc_drc>,
<&sysmmu_fimc_fd>, <&sysmmu_fimc_mcuctl>;
iommu-names = "isp", "drc", "fd", "mcuctl";
#address-cells = <1>;
#size-cells = <1>;
ranges;
......@@ -284,33 +207,192 @@ mshc_0: mmc@12550000 {
status = "disabled";
};
exynos-usbphy@125B0000 {
compatible = "samsung,exynos4x12-usb2-phy";
samsung,sysreg-phandle = <&sys_reg>;
sysmmu_g2d: sysmmu@10A40000{
compatible = "samsung,exynos-sysmmu";
reg = <0x10A40000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <4 7>;
clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_G2D>, <&clock CLK_G2D>;
#iommu-cells = <0>;
};
tmu@100C0000 {
compatible = "samsung,exynos4412-tmu";
sysmmu_fimc_isp: sysmmu@12260000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x12260000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <2 4>;
reg = <0x100C0000 0x100>;
clocks = <&clock 383>;
clock-names = "tmu_apbif";
status = "disabled";
interrupts = <16 2>;
power-domains = <&pd_isp>;
clock-names = "sysmmu";
clocks = <&clock CLK_SMMU_ISP>;
#iommu-cells = <0>;
};
jpeg-codec@11840000 {
compatible = "samsung,exynos4212-jpeg";
sysmmu_fimc_drc: sysmmu@12270000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x12270000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <16 3>;
power-domains = <&pd_isp>;
clock-names = "sysmmu";
clocks = <&clock CLK_SMMU_DRC>;
#iommu-cells = <0>;
};
sysmmu_fimc_fd: sysmmu@122A0000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x122A0000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <16 4>;
power-domains = <&pd_isp>;
clock-names = "sysmmu";
clocks = <&clock CLK_SMMU_FD>;
#iommu-cells = <0>;
};
hdmi: hdmi@12D00000 {
compatible = "samsung,exynos4212-hdmi";
sysmmu_fimc_mcuctl: sysmmu@122B0000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x122B0000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <16 5>;
power-domains = <&pd_isp>;
clock-names = "sysmmu";
clocks = <&clock CLK_SMMU_ISPCX>;
#iommu-cells = <0>;
};
mixer: mixer@12C10000 {
compatible = "samsung,exynos4212-mixer";
clock-names = "mixer", "hdmi", "sclk_hdmi", "vp";
clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>,
<&clock CLK_SCLK_HDMI>, <&clock CLK_VP>;
sysmmu_fimc_lite0: sysmmu@123B0000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x123B0000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <16 0>;
power-domains = <&pd_isp>;
clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_LITE0>, <&clock CLK_FIMC_LITE0>;
#iommu-cells = <0>;
};
sysmmu_fimc_lite1: sysmmu@123C0000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x123C0000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <16 1>;
power-domains = <&pd_isp>;
clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_LITE1>, <&clock CLK_FIMC_LITE1>;
#iommu-cells = <0>;
};
};
&combiner {
interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
<0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
<0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
<0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>,
<0 107 0>, <0 108 0>, <0 48 0>, <0 42 0>;
};
&exynos_usbphy {
compatible = "samsung,exynos4x12-usb2-phy";
samsung,sysreg-phandle = <&sys_reg>;
};
&fimc_0 {
compatible = "samsung,exynos4212-fimc";
samsung,pix-limits = <4224 8192 1920 4224>;
samsung,mainscaler-ext;
samsung,isp-wb;
samsung,cam-if;
};
&fimc_1 {
compatible = "samsung,exynos4212-fimc";
samsung,pix-limits = <4224 8192 1920 4224>;
samsung,mainscaler-ext;
samsung,isp-wb;
samsung,cam-if;
};
&fimc_2 {
compatible = "samsung,exynos4212-fimc";
samsung,pix-limits = <4224 8192 1920 4224>;
samsung,mainscaler-ext;
samsung,isp-wb;
samsung,lcd-wb;
samsung,cam-if;
};
&fimc_3 {
compatible = "samsung,exynos4212-fimc";
samsung,pix-limits = <1920 8192 1366 1920>;
samsung,rotators = <0>;
samsung,mainscaler-ext;
samsung,isp-wb;
samsung,lcd-wb;
};
&hdmi {
compatible = "samsung,exynos4212-hdmi";
};
&jpeg_codec {
compatible = "samsung,exynos4212-jpeg";
};
&mixer {
compatible = "samsung,exynos4212-mixer";
clock-names = "mixer", "hdmi", "sclk_hdmi", "vp";
clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>,
<&clock CLK_SCLK_HDMI>, <&clock CLK_VP>;
};
&pinctrl_0 {
compatible = "samsung,exynos4x12-pinctrl";
reg = <0x11400000 0x1000>;
interrupts = <0 47 0>;
};
&pinctrl_1 {
compatible = "samsung,exynos4x12-pinctrl";
reg = <0x11000000 0x1000>;
interrupts = <0 46 0>;
wakup_eint: wakeup-interrupt-controller {
compatible = "samsung,exynos4210-wakeup-eint";
interrupt-parent = <&gic>;
interrupts = <0 32 0>;
};
};
&pinctrl_2 {
compatible = "samsung,exynos4x12-pinctrl";
reg = <0x03860000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <10 0>;
};
&pinctrl_3 {
compatible = "samsung,exynos4x12-pinctrl";
reg = <0x106E0000 0x1000>;
interrupts = <0 72 0>;
};
&pmu_system_controller {
compatible = "samsung,exynos4212-pmu", "syscon";
clock-names = "clkout0", "clkout1", "clkout2", "clkout3",
"clkout4", "clkout8", "clkout9";
clocks = <&clock CLK_OUT_DMC>, <&clock CLK_OUT_TOP>,
<&clock CLK_OUT_LEFTBUS>, <&clock CLK_OUT_RIGHTBUS>,
<&clock CLK_OUT_CPU>, <&clock CLK_XXTI>, <&clock CLK_XUSBXTI>;
#clock-cells = <1>;
};
&tmu {
compatible = "samsung,exynos4412-tmu";
interrupt-parent = <&combiner>;
interrupts = <2 4>;
reg = <0x100C0000 0x100>;
clocks = <&clock 383>;
clock-names = "tmu_apbif";
status = "disabled";
};
arch/arm/boot/dts/exynos5.dtsi
View file @ 7d5a0ff5
......@@ -81,14 +81,14 @@ serial_3: serial@12C30000 {
interrupts = <0 54 0>;
};
rtc@101E0000 {
rtc: rtc@101E0000 {
compatible = "samsung,s3c6410-rtc";
reg = <0x101E0000 0x100>;
interrupts = <0 43 0>, <0 44 0>;
status = "disabled";
};
fimd@14400000 {
fimd: fimd@14400000 {
compatible = "samsung,exynos5250-fimd";
interrupt-parent = <&combiner>;
reg = <0x14400000 0x40000>;
......@@ -98,7 +98,7 @@ fimd@14400000 {
status = "disabled";
};
dp-controller@145B0000 {
dp: dp-controller@145B0000 {
compatible = "samsung,exynos5-dp";
reg = <0x145B0000 0x1000>;
interrupts = <10 3>;
......
arch/arm/boot/dts/exynos5250-snow.dts
View file @ 7d5a0ff5
......@@ -177,30 +177,6 @@ charger {
};
};
i2c@12CD0000 {
ptn3460: lvds-bridge@20 {
compatible = "nxp,ptn3460";
reg = <0x20>;
powerdown-gpios = <&gpy2 5 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpx1 5 GPIO_ACTIVE_HIGH>;
edid-emulation = <5>;
ports {
port@0 {
bridge_out: endpoint {
remote-endpoint = <&panel_in>;
};
};
port@1 {
bridge_in: endpoint {
remote-endpoint = <&dp_out>;
};
};
};
};
};
sound {
compatible = "google,snow-audio-max98095";
......@@ -507,6 +483,28 @@ &i2c_7 {
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <66000>;
ptn3460: lvds-bridge@20 {
compatible = "nxp,ptn3460";
reg = <0x20>;
powerdown-gpios = <&gpy2 5 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpx1 5 GPIO_ACTIVE_HIGH>;
edid-emulation = <5>;
ports {
port@0 {
bridge_out: endpoint {
remote-endpoint = <&panel_in>;
};
};
port@1 {
bridge_in: endpoint {
remote-endpoint = <&dp_out>;
};
};
};
};
max98095: codec@11 {
compatible = "maxim,max98095";
reg = <0x11>;
......
arch/arm/boot/dts/exynos5250.dtsi
View file @ 7d5a0ff5
This diff is collapsed.
arch/arm/boot/dts/exynos5420-peach-pit.dts
View file @ 7d5a0ff5
......@@ -1027,7 +1027,7 @@ charger {
};
};
&uart_3 {
&serial_3 {
status = "okay";
};
......
arch/arm/boot/dts/exynos5420-smdk5420.dts
View file @ 7d5a0ff5
This diff is collapsed.
arch/arm/boot/dts/exynos5420.dtsi
View file @ 7d5a0ff5
This diff is collapsed.
arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi 0 → 100644
View file @ 7d5a0ff5
This diff is collapsed.
arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts 0 → 100644
View file @ 7d5a0ff5
/*
* Hardkernel Odroid XU3-Lite board device tree source
*
* Copyright (c) 2015 Krzysztof Kozlowski
* Copyright (c) 2014 Collabora Ltd.
* Copyright (c) 2013 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
#include "exynos5422-odroidxu3-common.dtsi"
/ {
model = "Hardkernel Odroid XU3 Lite";
compatible = "hardkernel,odroid-xu3-lite", "samsung,exynos5800", "samsung,exynos5";
};
arch/arm/boot/dts/exynos5422-odroidxu3.dts
View file @ 7d5a0ff5
This diff is collapsed.
arch/arm/boot/dts/exynos5440-sd5v1.dts
View file @ 7d5a0ff5
......@@ -27,13 +27,13 @@ xtal {
};
};
gmac: ethernet@00230000 {
fixed_phy;
phy_addr = <1>;
};
spi {
status = "disabled";
};
};
&gmac {
fixed_phy;
phy_addr = <1>;
};
arch/arm/boot/dts/exynos5440-ssdk5440.dts
View file @ 7d5a0ff5
......@@ -20,59 +20,58 @@ chosen {
bootargs = "root=/dev/sda2 rw rootwait ignore_loglevel earlyprintk no_console_suspend mem=2048M@0x80000000 mem=6144M@0x100000000 console=ttySAC0,115200";
};
spi_0: spi@D0000 {
flash: w25q128@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "winbond,w25q128";
spi-max-frequency = <15625000>;
reg = <0>;
controller-data {
samsung,spi-feedback-delay = <0>;
};
fixed-rate-clocks {
xtal {
compatible = "samsung,clock-xtal";
clock-frequency = <50000000>;
};
};
};
partition@00000 {
label = "BootLoader";
reg = <0x60000 0x80000>;
read-only;
};
&pcie_0 {
reset-gpio = <&pin_ctrl 5 0>;
status = "okay";
};
partition@e0000 {
label = "Recovery-Kernel";
reg = <0xe0000 0x300000>;
read-only;
};
&pcie_1 {
reset-gpio = <&pin_ctrl 22 0>;
status = "okay";
};
partition@3e0000 {
label = "CRAM-FS";
reg = <0x3e0000 0x700000>;
read-only;
};
&spi_0 {
flash: w25q128@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "winbond,w25q128";
spi-max-frequency = <15625000>;
reg = <0>;
controller-data {
samsung,spi-feedback-delay = <0>;
};
partition@ae0000 {
label = "User-Data";
reg = <0xae0000 0x520000>;
};
partition@00000 {
label = "BootLoader";
reg = <0x60000 0x80000>;
read-only;
};
partition@e0000 {
label = "Recovery-Kernel";
reg = <0xe0000 0x300000>;
read-only;
};
};
partition@3e0000 {
label = "CRAM-FS";
reg = <0x3e0000 0x700000>;
read-only;
};
fixed-rate-clocks {
xtal {
compatible = "samsung,clock-xtal";
clock-frequency = <50000000>;
partition@ae0000 {
label = "User-Data";
reg = <0xae0000 0x520000>;
};
};
pcie@290000 {
reset-gpio = <&pin_ctrl 5 0>;
status = "okay";
};
pcie@2a0000 {
reset-gpio = <&pin_ctrl 22 0>;
status = "okay";
};
};
arch/arm/boot/dts/exynos5440.dtsi
View file @ 7d5a0ff5
......@@ -279,7 +279,7 @@ ehci@221000 {
clock-names = "usbhost";
};
pcie@290000 {
pcie_0: pcie@290000 {
compatible = "samsung,exynos5440-pcie", "snps,dw-pcie";
reg = <0x290000 0x1000
0x270000 0x1000
......@@ -300,7 +300,7 @@ pcie@290000 {
status = "disabled";
};
pcie@2a0000 {
pcie_1: pcie@2a0000 {
compatible = "samsung,exynos5440-pcie", "snps,dw-pcie";
reg = <0x2a0000 0x1000
0x272000 0x1000
......
arch/arm/boot/dts/exynos5800-peach-pi.dts
View file @ 7d5a0ff5
......@@ -990,7 +990,7 @@ charger {
};
};
&uart_3 {
&serial_3 {
status = "okay";
};
......
arch/arm/boot/dts/s3c2416-smdk2416.dts
View file @ 7d5a0ff5
This diff is collapsed.
arch/arm/boot/dts/s3c2416.dtsi
View file @ 7d5a0ff5
This diff is collapsed.
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment
GitLab Nexedi Edition | About GitLab | About Nexedi | 沪ICP备2021021310号-2 | 沪ICP备2021021310号-7