Commit 7d8fec20 authored by Franklin S Cooper Jr's avatar Franklin S Cooper Jr Committed by Tony Lindgren

ARM: dts: am335x-evm: Enable NAND dma prefetch by default

Currently the default method of prefetch polled shows the highest
possible read and write speed when minimal non NAND background
activity is being done. But it is also very CPU intensive to reach
these high speeds (CPU load of 99% via mtd performance tests). While
DMA prefetch only uses 50% of the CPU to achieve around 23% less in
top read and write performance.

However, as the non NAND CPU load increases the read and write
performance takes a large hit when using polled prefetch. Therefore,
prefetch dma mode ends up outperforming prefetch polled in general
"system level" test. So switch to using dma prefetch by default since
it is likely what most users would prefer.
Signed-off-by: default avatarFranklin S Cooper Jr <fcooper@ti.com>
Acked-by: default avatarRoger Quadros <rogerq@ti.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent a5effd96
...@@ -531,6 +531,7 @@ nand@0,0 { ...@@ -531,6 +531,7 @@ nand@0,0 {
interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
<1 IRQ_TYPE_NONE>; /* termcount */ <1 IRQ_TYPE_NONE>; /* termcount */
rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */ rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
ti,nand-xfer-type = "prefetch-dma";
ti,nand-ecc-opt = "bch8"; ti,nand-ecc-opt = "bch8";
ti,elm-id = <&elm>; ti,elm-id = <&elm>;
nand-bus-width = <8>; nand-bus-width = <8>;
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment