Commit 7df222c3 authored by Konrad Dybcio's avatar Konrad Dybcio Committed by Rob Clark

drm/msm/disp/mdp5: mdp5_cfg: Fix msm8974v2 max_clk

The maximum mdp clock rate on msm8974v2 is 320MHz. Fix it.
Signed-off-by: default avatarKonrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: default avatarAbhinav Kumar <abhinavk@codeaurora.org>
Signed-off-by: default avatarRob Clark <robdclark@chromium.org>
parent 5ca6d026
...@@ -177,7 +177,7 @@ static const struct mdp5_cfg_hw msm8x74v2_config = { ...@@ -177,7 +177,7 @@ static const struct mdp5_cfg_hw msm8x74v2_config = {
[3] = INTF_HDMI, [3] = INTF_HDMI,
}, },
}, },
.max_clk = 200000000, .max_clk = 320000000,
}; };
static const struct mdp5_cfg_hw apq8084_config = { static const struct mdp5_cfg_hw apq8084_config = {
......
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