Commit 7e280f6b authored by Jiaxun Yang's avatar Jiaxun Yang Committed by Paul Burton

MIPS: Loongson32: Revert ISA level to MIPS32R2

GS232 core have implemented all necessary mips32r2 instructions.
Serval missing FP instructions can be emulated by kernel.

The issue of di instruction have been solved.
Thus we revert the ISA level back to MIPS32R2.
Signed-off-by: default avatarJiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: default avatarPaul Burton <paul.burton@mips.com>
Cc: linux-mips@vger.kernel.org
Cc: keguang.zhang@gmail.com
parent bdea8bb1
...@@ -1864,7 +1864,7 @@ config CPU_LOONGSON2 ...@@ -1864,7 +1864,7 @@ config CPU_LOONGSON2
config CPU_LOONGSON1 config CPU_LOONGSON1
bool bool
select CPU_MIPS32 select CPU_MIPS32
select CPU_MIPSR1 select CPU_MIPSR2
select CPU_HAS_PREFETCH select CPU_HAS_PREFETCH
select CPU_HAS_LOAD_STORE_LR select CPU_HAS_LOAD_STORE_LR
select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_32BIT_KERNEL
......
cflags-$(CONFIG_CPU_LOONGSON1) += -march=mips32 -Wa,--trap cflags-$(CONFIG_CPU_LOONGSON1) += -march=mips32r2 -Wa,--trap
platform-$(CONFIG_MACH_LOONGSON32) += loongson32/ platform-$(CONFIG_MACH_LOONGSON32) += loongson32/
cflags-$(CONFIG_MACH_LOONGSON32) += -I$(srctree)/arch/mips/include/asm/mach-loongson32 cflags-$(CONFIG_MACH_LOONGSON32) += -I$(srctree)/arch/mips/include/asm/mach-loongson32
load-$(CONFIG_CPU_LOONGSON1) += 0xffffffff80200000 load-$(CONFIG_CPU_LOONGSON1) += 0xffffffff80200000
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