Commit 7f043b76 authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'loongarch-fixes-6.1-3' of...

Merge tag 'loongarch-fixes-6.1-3' of git://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson

Pull LoongArch fixes from Huacai Chen:
 "Export smp_send_reschedule() for modules use, fix a huge page entry
  update issue, and add documents for booting description"

* tag 'loongarch-fixes-6.1-3' of git://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson:
  docs/zh_CN: Add LoongArch booting description's translation
  docs/LoongArch: Add booting description
  LoongArch: mm: Fix huge page entry update for virtual machine
  LoongArch: Export symbol for function smp_send_reschedule()
parents a4c3a07e 1385313d
.. SPDX-License-Identifier: GPL-2.0
=======================
Booting Linux/LoongArch
=======================
:Author: Yanteng Si <siyanteng@loongson.cn>
:Date: 18 Nov 2022
Information passed from BootLoader to kernel
============================================
LoongArch supports ACPI and FDT. The information that needs to be passed
to the kernel includes the memmap, the initrd, the command line, optionally
the ACPI/FDT tables, and so on.
The kernel is passed the following arguments on `kernel_entry` :
- a0 = efi_boot: `efi_boot` is a flag indicating whether
this boot environment is fully UEFI-compliant.
- a1 = cmdline: `cmdline` is a pointer to the kernel command line.
- a2 = systemtable: `systemtable` points to the EFI system table.
All pointers involved at this stage are in physical addresses.
Header of Linux/LoongArch kernel images
=======================================
Linux/LoongArch kernel images are EFI images. Being PE files, they have
a 64-byte header structured like::
u32 MZ_MAGIC /* "MZ", MS-DOS header */
u32 res0 = 0 /* Reserved */
u64 kernel_entry /* Kernel entry point */
u64 _end - _text /* Kernel image effective size */
u64 load_offset /* Kernel image load offset from start of RAM */
u64 res1 = 0 /* Reserved */
u64 res2 = 0 /* Reserved */
u64 res3 = 0 /* Reserved */
u32 LINUX_PE_MAGIC /* Magic number */
u32 pe_header - _head /* Offset to the PE header */
......@@ -9,6 +9,7 @@ LoongArch Architecture
:numbered:
introduction
booting
irq-chip-model
features
......
.. SPDX-License-Identifier: GPL-2.0
.. include:: ../disclaimer-zh_CN.rst
:Original: Documentation/loongarch/booting.rst
:翻译:
司延腾 Yanteng Si <siyanteng@loongson.cn>
====================
启动 Linux/LoongArch
====================
:作者: 司延腾 <siyanteng@loongson.cn>
:日期: 2022年11月18日
BootLoader传递给内核的信息
==========================
LoongArch支持ACPI和FDT启动,需要传递给内核的信息包括memmap、initrd、cmdline、可
选的ACPI/FDT表等。
内核在 `kernel_entry` 入口处被传递以下参数:
- a0 = efi_boot: `efi_boot` 是一个标志,表示这个启动环境是否完全符合UEFI
的要求。
- a1 = cmdline: `cmdline` 是一个指向内核命令行的指针。
- a2 = systemtable: `systemtable` 指向EFI的系统表,在这个阶段涉及的所有
指针都是物理地址。
Linux/LoongArch内核镜像文件头
=============================
内核镜像是EFI镜像。作为PE文件,它们有一个64字节的头部结构体,如下所示::
u32 MZ_MAGIC /* "MZ", MS-DOS 头 */
u32 res0 = 0 /* 保留 */
u64 kernel_entry /* 内核入口点 */
u64 _end - _text /* 内核镜像有效大小 */
u64 load_offset /* 加载内核镜像相对内存起始地址的偏移量 */
u64 res1 = 0 /* 保留 */
u64 res2 = 0 /* 保留 */
u64 res3 = 0 /* 保留 */
u32 LINUX_PE_MAGIC /* 魔术数 */
u32 pe_header - _head /* 到PE头的偏移量 */
......@@ -14,6 +14,7 @@ LoongArch体系结构
:numbered:
introduction
booting
irq-chip-model
features
......
......@@ -78,16 +78,6 @@ extern void calculate_cpu_foreign_map(void);
*/
extern void show_ipi_list(struct seq_file *p, int prec);
/*
* This function sends a 'reschedule' IPI to another CPU.
* it goes straight through and wastes no time serializing
* anything. Worst case is that we lose a reschedule ...
*/
static inline void smp_send_reschedule(int cpu)
{
loongson_send_ipi_single(cpu, SMP_RESCHEDULE);
}
static inline void arch_send_call_function_single_ipi(int cpu)
{
loongson_send_ipi_single(cpu, SMP_CALL_FUNCTION);
......
......@@ -149,6 +149,17 @@ void loongson_send_ipi_mask(const struct cpumask *mask, unsigned int action)
ipi_write_action(cpu_logical_map(i), (u32)action);
}
/*
* This function sends a 'reschedule' IPI to another CPU.
* it goes straight through and wastes no time serializing
* anything. Worst case is that we lose a reschedule ...
*/
void smp_send_reschedule(int cpu)
{
loongson_send_ipi_single(cpu, SMP_RESCHEDULE);
}
EXPORT_SYMBOL_GPL(smp_send_reschedule);
irqreturn_t loongson_ipi_interrupt(int irq, void *dev)
{
unsigned int action;
......
......@@ -10,6 +10,8 @@
#include <asm/regdef.h>
#include <asm/stackframe.h>
#define INVTLB_ADDR_GFALSE_AND_ASID 5
#define PTRS_PER_PGD_BITS (PAGE_SHIFT - 3)
#define PTRS_PER_PUD_BITS (PAGE_SHIFT - 3)
#define PTRS_PER_PMD_BITS (PAGE_SHIFT - 3)
......@@ -136,13 +138,10 @@ tlb_huge_update_load:
ori t0, ra, _PAGE_VALID
st.d t0, t1, 0
#endif
tlbsrch
addu16i.d t1, zero, -(CSR_TLBIDX_EHINV >> 16)
addi.d ra, t1, 0
csrxchg ra, t1, LOONGARCH_CSR_TLBIDX
tlbwr
csrxchg zero, t1, LOONGARCH_CSR_TLBIDX
csrrd ra, LOONGARCH_CSR_ASID
csrrd t1, LOONGARCH_CSR_BADV
andi ra, ra, CSR_ASID_ASID
invtlb INVTLB_ADDR_GFALSE_AND_ASID, ra, t1
/*
* A huge PTE describes an area the size of the
......@@ -287,13 +286,11 @@ tlb_huge_update_store:
ori t0, ra, (_PAGE_VALID | _PAGE_DIRTY | _PAGE_MODIFIED)
st.d t0, t1, 0
#endif
tlbsrch
addu16i.d t1, zero, -(CSR_TLBIDX_EHINV >> 16)
addi.d ra, t1, 0
csrxchg ra, t1, LOONGARCH_CSR_TLBIDX
tlbwr
csrrd ra, LOONGARCH_CSR_ASID
csrrd t1, LOONGARCH_CSR_BADV
andi ra, ra, CSR_ASID_ASID
invtlb INVTLB_ADDR_GFALSE_AND_ASID, ra, t1
csrxchg zero, t1, LOONGARCH_CSR_TLBIDX
/*
* A huge PTE describes an area the size of the
* configured huge page size. This is twice the
......@@ -436,6 +433,11 @@ tlb_huge_update_modify:
ori t0, ra, (_PAGE_VALID | _PAGE_DIRTY | _PAGE_MODIFIED)
st.d t0, t1, 0
#endif
csrrd ra, LOONGARCH_CSR_ASID
csrrd t1, LOONGARCH_CSR_BADV
andi ra, ra, CSR_ASID_ASID
invtlb INVTLB_ADDR_GFALSE_AND_ASID, ra, t1
/*
* A huge PTE describes an area the size of the
* configured huge page size. This is twice the
......@@ -466,7 +468,7 @@ tlb_huge_update_modify:
addu16i.d t1, zero, (PS_HUGE_SIZE << (CSR_TLBIDX_PS_SHIFT - 16))
csrxchg t1, t0, LOONGARCH_CSR_TLBIDX
tlbwr
tlbfill
/* Reset default page size */
addu16i.d t0, zero, (CSR_TLBIDX_PS >> 16)
......
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