Commit 7f6ee0a5 authored by Masahiro Yamada's avatar Masahiro Yamada Committed by Linus Walleij

pinctrl: uniphier: clean up GPIO port muxing

There are a bunch of GPIO muxing data, but most of them are actually
unneeded because GPIO-to-pin mapping can be specified by "gpio-ranges"
DT properties.

Tables that contain a set of GPIO pins are still needed for the named
mapping by "gpio-ranges-group-names".  This is a much cleaner way for
UniPhier SoC family where GPIO numbers are not straight mapped to pin
numbers.
Signed-off-by: default avatarMasahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent e3829d15
......@@ -651,30 +651,27 @@ static int uniphier_pmx_gpio_request_enable(struct pinctrl_dev *pctldev,
unsigned offset)
{
struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev);
const struct uniphier_pinctrl_group *groups = priv->socdata->groups;
int groups_count = priv->socdata->groups_count;
enum uniphier_pinmux_gpio_range_type range_type;
int i, j;
if (strstr(range->name, "irq"))
range_type = UNIPHIER_PINMUX_GPIO_RANGE_IRQ;
else
range_type = UNIPHIER_PINMUX_GPIO_RANGE_PORT;
for (i = 0; i < groups_count; i++) {
if (groups[i].range_type != range_type)
continue;
for (j = 0; j < groups[i].num_pins; j++)
if (groups[i].pins[j] == offset)
goto found;
unsigned int gpio_offset;
int muxval, i;
if (range->pins) {
for (i = 0; i < range->npins; i++)
if (range->pins[i] == offset)
break;
if (WARN_ON(i == range->npins))
return -EINVAL;
gpio_offset = i;
} else {
gpio_offset = offset - range->pin_base;
}
dev_err(pctldev->dev, "pin %u does not support GPIO\n", offset);
return -EINVAL;
gpio_offset += range->id;
muxval = priv->socdata->get_gpio_muxval(offset, gpio_offset);
found:
return uniphier_pmx_set_one_mux(pctldev, offset, groups[i].muxvals[j]);
return uniphier_pmx_set_one_mux(pctldev, offset, muxval);
}
static const struct pinmux_ops uniphier_pmxops = {
......
......@@ -131,18 +131,11 @@ static inline unsigned int uniphier_pin_get_pull_dir(void *drv_data)
UNIPHIER_PIN_PULL_DIR_MASK;
}
enum uniphier_pinmux_gpio_range_type {
UNIPHIER_PINMUX_GPIO_RANGE_PORT,
UNIPHIER_PINMUX_GPIO_RANGE_IRQ,
UNIPHIER_PINMUX_GPIO_RANGE_NONE,
};
struct uniphier_pinctrl_group {
const char *name;
const unsigned *pins;
unsigned num_pins;
const int *muxvals;
enum uniphier_pinmux_gpio_range_type range_type;
};
struct uniphier_pinmux_function {
......@@ -158,6 +151,7 @@ struct uniphier_pinctrl_socdata {
int groups_count;
const struct uniphier_pinmux_function *functions;
int functions_count;
int (*get_gpio_muxval)(unsigned int pin, unsigned int gpio_offset);
unsigned int caps;
#define UNIPHIER_PINCTRL_CAPS_PERPIN_IECTRL BIT(1)
#define UNIPHIER_PINCTRL_CAPS_DBGMUX_SEPARATE BIT(0)
......@@ -170,33 +164,22 @@ struct uniphier_pinctrl_socdata {
.drv_data = (void *)UNIPHIER_PIN_ATTR_PACKED(c, d, e, f, g), \
}
#define __UNIPHIER_PINCTRL_GROUP(grp, type) \
#define __UNIPHIER_PINCTRL_GROUP(grp, mux) \
{ \
.name = #grp, \
.pins = grp##_pins, \
.num_pins = ARRAY_SIZE(grp##_pins), \
.muxvals = grp##_muxvals + \
BUILD_BUG_ON_ZERO(ARRAY_SIZE(grp##_pins) != \
ARRAY_SIZE(grp##_muxvals)), \
.range_type = type, \
.muxvals = mux, \
}
#define UNIPHIER_PINCTRL_GROUP(grp) \
__UNIPHIER_PINCTRL_GROUP(grp, UNIPHIER_PINMUX_GPIO_RANGE_NONE)
#define UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_PORT(grp) \
__UNIPHIER_PINCTRL_GROUP(grp, UNIPHIER_PINMUX_GPIO_RANGE_PORT)
#define UNIPHIER_PINCTRL_GROUP_GPIO_RANGE_IRQ(grp) \
__UNIPHIER_PINCTRL_GROUP(grp, UNIPHIER_PINMUX_GPIO_RANGE_IRQ)
__UNIPHIER_PINCTRL_GROUP(grp, \
grp##_muxvals + \
BUILD_BUG_ON_ZERO(ARRAY_SIZE(grp##_pins) != \
ARRAY_SIZE(grp##_muxvals)))
#define UNIPHIER_PINCTRL_GROUP_SINGLE(grp, array, ofst) \
{ \
.name = #grp, \
.pins = array##_pins + ofst, \
.num_pins = 1, \
.muxvals = array##_muxvals + ofst, \
}
#define UNIPHIER_PINCTRL_GROUP_GPIO(grp) \
__UNIPHIER_PINCTRL_GROUP(grp, NULL)
#define UNIPHIER_PINMUX_FUNCTION(func) \
{ \
......
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