Commit 804ce986 authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'fbdev-updates-for-3.5' of git://github.com/schandinat/linux-2.6

Pull fbdev updates from Florian Tobias Schandinat:
 - driver for AUO-K1900 and AUO-K1901 epaper controller
 - large updates for OMAP (e.g. decouple HDMI audio and video)
 - some updates for Exynos and SH Mobile
 - various other small fixes and cleanups

* tag 'fbdev-updates-for-3.5' of git://github.com/schandinat/linux-2.6: (130 commits)
  video: bfin_adv7393fb: Fix cleanup code
  video: exynos_dp: reduce delay time when configuring video setting
  video: exynos_dp: move sw reset prioir to enabling sw defined function
  video: exynos_dp: use devm_ functions
  fb: handle NULL pointers in framebuffer release
  OMAPDSS: HDMI: OMAP4: Update IRQ flags for the HPD IRQ request
  OMAPDSS: Apply VENC timings even if panel is disabled
  OMAPDSS: VENC/DISPC: Delay dividing Y resolution for managers connected to VENC
  OMAPDSS: DISPC: Support rotation through TILER
  OMAPDSS: VRFB: remove compiler warnings when CONFIG_BUG=n
  OMAPFB: remove compiler warnings when CONFIG_BUG=n
  OMAPDSS: remove compiler warnings when CONFIG_BUG=n
  OMAPDSS: DISPC: fix usage of dispc_ovl_set_accu_uv
  OMAPDSS: use DSI_FIFO_BUG workaround only for manual update displays
  OMAPDSS: DSI: Support command mode interleaving during video mode blanking periods
  OMAPDSS: DISPC: Update Accumulator configuration for chroma plane
  drivers/video: fsl-diu-fb: don't initialize the THRESHOLDS registers
  video: exynos mipi dsi: support reverse panel type
  video: exynos mipi dsi: Properly interpret the interrupt source flags
  video: exynos mipi dsi: Avoid races in probe()
  ...
parents f5e7e844 c895305e
......@@ -47,6 +47,51 @@ flexible way to enable non-common multi-display configuration. In addition to
modelling the hardware overlays, omapdss supports virtual overlays and overlay
managers. These can be used when updating a display with CPU or system DMA.
omapdss driver support for audio
--------------------------------
There exist several display technologies and standards that support audio as
well. Hence, it is relevant to update the DSS device driver to provide an audio
interface that may be used by an audio driver or any other driver interested in
the functionality.
The audio_enable function is intended to prepare the relevant
IP for playback (e.g., enabling an audio FIFO, taking in/out of reset
some IP, enabling companion chips, etc). It is intended to be called before
audio_start. The audio_disable function performs the reverse operation and is
intended to be called after audio_stop.
While a given DSS device driver may support audio, it is possible that for
certain configurations audio is not supported (e.g., an HDMI display using a
VESA video timing). The audio_supported function is intended to query whether
the current configuration of the display supports audio.
The audio_config function is intended to configure all the relevant audio
parameters of the display. In order to make the function independent of any
specific DSS device driver, a struct omap_dss_audio is defined. Its purpose
is to contain all the required parameters for audio configuration. At the
moment, such structure contains pointers to IEC-60958 channel status word
and CEA-861 audio infoframe structures. This should be enough to support
HDMI and DisplayPort, as both are based on CEA-861 and IEC-60958.
The audio_enable/disable, audio_config and audio_supported functions could be
implemented as functions that may sleep. Hence, they should not be called
while holding a spinlock or a readlock.
The audio_start/audio_stop function is intended to effectively start/stop audio
playback after the configuration has taken place. These functions are designed
to be used in an atomic context. Hence, audio_start should return quickly and be
called only after all the needed resources for audio playback (audio FIFOs,
DMA channels, companion chips, etc) have been enabled to begin data transfers.
audio_stop is designed to only stop the audio transfers. The resources used
for playback are released using audio_disable.
The enum omap_dss_audio_state may be used to help the implementations of
the interface to keep track of the audio state. The initial state is _DISABLED;
then, the state transitions to _CONFIGURED, and then, when it is ready to
play audio, to _ENABLED. The state _PLAYING is used when the audio is being
rendered.
Panel and controller drivers
----------------------------
......@@ -156,6 +201,7 @@ timings Display timings (pixclock,xres/hfp/hbp/hsw,yres/vfp/vbp/vsw)
"pal" and "ntsc"
panel_name
tear_elim Tearing elimination 0=off, 1=on
output_type Output type (video encoder only): "composite" or "svideo"
There are also some debugfs files at <debugfs>/omapdss/ which show information
about clocks and registers.
......
......@@ -237,25 +237,29 @@ static struct exynos_drm_fimd_pdata drm_fimd_pdata = {
#else
/* Frame Buffer */
static struct s3c_fb_pd_win nuri_fb_win0 = {
.win_mode = {
.left_margin = 64,
.right_margin = 16,
.upper_margin = 64,
.lower_margin = 1,
.hsync_len = 48,
.vsync_len = 3,
.xres = 1024,
.yres = 600,
.refresh = 60,
},
.max_bpp = 24,
.default_bpp = 16,
.xres = 1024,
.yres = 600,
.virtual_x = 1024,
.virtual_y = 2 * 600,
};
static struct fb_videomode nuri_lcd_timing = {
.left_margin = 64,
.right_margin = 16,
.upper_margin = 64,
.lower_margin = 1,
.hsync_len = 48,
.vsync_len = 3,
.xres = 1024,
.yres = 600,
.refresh = 60,
};
static struct s3c_fb_platdata nuri_fb_pdata __initdata = {
.win[0] = &nuri_fb_win0,
.vtiming = &nuri_lcd_timing,
.vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB |
VIDCON0_CLKSEL_LCD,
.vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
......
......@@ -604,24 +604,28 @@ static struct exynos_drm_fimd_pdata drm_fimd_pdata = {
};
#else
static struct s3c_fb_pd_win origen_fb_win0 = {
.win_mode = {
.left_margin = 64,
.right_margin = 16,
.upper_margin = 64,
.lower_margin = 16,
.hsync_len = 48,
.vsync_len = 3,
.xres = 1024,
.yres = 600,
},
.xres = 1024,
.yres = 600,
.max_bpp = 32,
.default_bpp = 24,
.virtual_x = 1024,
.virtual_y = 2 * 600,
};
static struct fb_videomode origen_lcd_timing = {
.left_margin = 64,
.right_margin = 16,
.upper_margin = 64,
.lower_margin = 16,
.hsync_len = 48,
.vsync_len = 3,
.xres = 1024,
.yres = 600,
};
static struct s3c_fb_platdata origen_lcd_pdata __initdata = {
.win[0] = &origen_fb_win0,
.vtiming = &origen_lcd_timing,
.vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
.vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC |
VIDCON1_INV_VCLK,
......
......@@ -178,22 +178,26 @@ static struct exynos_drm_fimd_pdata drm_fimd_pdata = {
};
#else
static struct s3c_fb_pd_win smdkv310_fb_win0 = {
.win_mode = {
.left_margin = 13,
.right_margin = 8,
.upper_margin = 7,
.lower_margin = 5,
.hsync_len = 3,
.vsync_len = 1,
.xres = 800,
.yres = 480,
},
.max_bpp = 32,
.default_bpp = 24,
.max_bpp = 32,
.default_bpp = 24,
.xres = 800,
.yres = 480,
};
static struct fb_videomode smdkv310_lcd_timing = {
.left_margin = 13,
.right_margin = 8,
.upper_margin = 7,
.lower_margin = 5,
.hsync_len = 3,
.vsync_len = 1,
.xres = 800,
.yres = 480,
};
static struct s3c_fb_platdata smdkv310_lcd0_pdata __initdata = {
.win[0] = &smdkv310_fb_win0,
.vtiming = &smdkv310_lcd_timing,
.vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
.vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
.setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
......
......@@ -843,25 +843,29 @@ static struct exynos_drm_fimd_pdata drm_fimd_pdata = {
#else
/* Frame Buffer */
static struct s3c_fb_pd_win universal_fb_win0 = {
.win_mode = {
.left_margin = 16,
.right_margin = 16,
.upper_margin = 2,
.lower_margin = 28,
.hsync_len = 2,
.vsync_len = 1,
.xres = 480,
.yres = 800,
.refresh = 55,
},
.max_bpp = 32,
.default_bpp = 16,
.xres = 480,
.yres = 800,
.virtual_x = 480,
.virtual_y = 2 * 800,
};
static struct fb_videomode universal_lcd_timing = {
.left_margin = 16,
.right_margin = 16,
.upper_margin = 2,
.lower_margin = 28,
.hsync_len = 2,
.vsync_len = 1,
.xres = 480,
.yres = 800,
.refresh = 55,
};
static struct s3c_fb_platdata universal_lcd_pdata __initdata = {
.win[0] = &universal_fb_win0,
.vtiming = &universal_lcd_timing,
.vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB |
VIDCON0_CLKSEL_LCD,
.vidcon1 = VIDCON1_INV_VCLK | VIDCON1_INV_VDEN
......
......@@ -180,16 +180,133 @@ static void omap_dsi_disable_pads(int dsi_id, unsigned lane_mask)
omap4_dsi_mux_pads(dsi_id, 0);
}
static int omap_dss_set_min_bus_tput(struct device *dev, unsigned long tput)
{
return omap_pm_set_min_bus_tput(dev, OCP_INITIATOR_AGENT, tput);
}
static struct platform_device *create_dss_pdev(const char *pdev_name,
int pdev_id, const char *oh_name, void *pdata, int pdata_len,
struct platform_device *parent)
{
struct platform_device *pdev;
struct omap_device *od;
struct omap_hwmod *ohs[1];
struct omap_hwmod *oh;
int r;
oh = omap_hwmod_lookup(oh_name);
if (!oh) {
pr_err("Could not look up %s\n", oh_name);
r = -ENODEV;
goto err;
}
pdev = platform_device_alloc(pdev_name, pdev_id);
if (!pdev) {
pr_err("Could not create pdev for %s\n", pdev_name);
r = -ENOMEM;
goto err;
}
if (parent != NULL)
pdev->dev.parent = &parent->dev;
if (pdev->id != -1)
dev_set_name(&pdev->dev, "%s.%d", pdev->name, pdev->id);
else
dev_set_name(&pdev->dev, "%s", pdev->name);
ohs[0] = oh;
od = omap_device_alloc(pdev, ohs, 1, NULL, 0);
if (!od) {
pr_err("Could not alloc omap_device for %s\n", pdev_name);
r = -ENOMEM;
goto err;
}
r = platform_device_add_data(pdev, pdata, pdata_len);
if (r) {
pr_err("Could not set pdata for %s\n", pdev_name);
goto err;
}
r = omap_device_register(pdev);
if (r) {
pr_err("Could not register omap_device for %s\n", pdev_name);
goto err;
}
return pdev;
err:
return ERR_PTR(r);
}
static struct platform_device *create_simple_dss_pdev(const char *pdev_name,
int pdev_id, void *pdata, int pdata_len,
struct platform_device *parent)
{
struct platform_device *pdev;
int r;
pdev = platform_device_alloc(pdev_name, pdev_id);
if (!pdev) {
pr_err("Could not create pdev for %s\n", pdev_name);
r = -ENOMEM;
goto err;
}
if (parent != NULL)
pdev->dev.parent = &parent->dev;
if (pdev->id != -1)
dev_set_name(&pdev->dev, "%s.%d", pdev->name, pdev->id);
else
dev_set_name(&pdev->dev, "%s", pdev->name);
r = platform_device_add_data(pdev, pdata, pdata_len);
if (r) {
pr_err("Could not set pdata for %s\n", pdev_name);
goto err;
}
r = omap_device_register(pdev);
if (r) {
pr_err("Could not register omap_device for %s\n", pdev_name);
goto err;
}
return pdev;
err:
return ERR_PTR(r);
}
int __init omap_display_init(struct omap_dss_board_info *board_data)
{
int r = 0;
struct omap_hwmod *oh;
struct platform_device *pdev;
int i, oh_count;
struct omap_display_platform_data pdata;
const struct omap_dss_hwmod_data *curr_dss_hwmod;
struct platform_device *dss_pdev;
/* create omapdss device */
board_data->dsi_enable_pads = omap_dsi_enable_pads;
board_data->dsi_disable_pads = omap_dsi_disable_pads;
board_data->get_context_loss_count = omap_pm_get_dev_context_loss_count;
board_data->set_min_bus_tput = omap_dss_set_min_bus_tput;
omap_display_device.dev.platform_data = board_data;
r = platform_device_register(&omap_display_device);
if (r < 0) {
pr_err("Unable to register omapdss device\n");
return r;
}
memset(&pdata, 0, sizeof(pdata));
/* create devices for dss hwmods */
if (cpu_is_omap24xx()) {
curr_dss_hwmod = omap2_dss_hwmod_data;
......@@ -202,39 +319,58 @@ int __init omap_display_init(struct omap_dss_board_info *board_data)
oh_count = ARRAY_SIZE(omap4_dss_hwmod_data);
}
if (board_data->dsi_enable_pads == NULL)
board_data->dsi_enable_pads = omap_dsi_enable_pads;
if (board_data->dsi_disable_pads == NULL)
board_data->dsi_disable_pads = omap_dsi_disable_pads;
pdata.board_data = board_data;
pdata.board_data->get_context_loss_count =
omap_pm_get_dev_context_loss_count;
for (i = 0; i < oh_count; i++) {
oh = omap_hwmod_lookup(curr_dss_hwmod[i].oh_name);
if (!oh) {
pr_err("Could not look up %s\n",
curr_dss_hwmod[i].oh_name);
return -ENODEV;
/*
* First create the pdev for dss_core, which is used as a parent device
* by the other dss pdevs. Note: dss_core has to be the first item in
* the hwmod list.
*/
dss_pdev = create_dss_pdev(curr_dss_hwmod[0].dev_name,
curr_dss_hwmod[0].id,
curr_dss_hwmod[0].oh_name,
board_data, sizeof(*board_data),
NULL);
if (IS_ERR(dss_pdev)) {
pr_err("Could not build omap_device for %s\n",
curr_dss_hwmod[0].oh_name);
return PTR_ERR(dss_pdev);
}
for (i = 1; i < oh_count; i++) {
pdev = create_dss_pdev(curr_dss_hwmod[i].dev_name,
curr_dss_hwmod[i].id,
curr_dss_hwmod[i].oh_name,
board_data, sizeof(*board_data),
dss_pdev);
if (IS_ERR(pdev)) {
pr_err("Could not build omap_device for %s\n",
curr_dss_hwmod[i].oh_name);
return PTR_ERR(pdev);
}
}
pdev = omap_device_build(curr_dss_hwmod[i].dev_name,
curr_dss_hwmod[i].id, oh, &pdata,
sizeof(struct omap_display_platform_data),
NULL, 0, 0);
/* Create devices for DPI and SDI */
if (WARN((IS_ERR(pdev)), "Could not build omap_device for %s\n",
curr_dss_hwmod[i].oh_name))
return -ENODEV;
pdev = create_simple_dss_pdev("omapdss_dpi", -1,
board_data, sizeof(*board_data), dss_pdev);
if (IS_ERR(pdev)) {
pr_err("Could not build platform_device for omapdss_dpi\n");
return PTR_ERR(pdev);
}
omap_display_device.dev.platform_data = board_data;
r = platform_device_register(&omap_display_device);
if (r < 0)
printk(KERN_ERR "Unable to register OMAP-Display device\n");
if (cpu_is_omap34xx()) {
pdev = create_simple_dss_pdev("omapdss_sdi", -1,
board_data, sizeof(*board_data), dss_pdev);
if (IS_ERR(pdev)) {
pr_err("Could not build platform_device for omapdss_sdi\n");
return PTR_ERR(pdev);
}
}
return r;
return 0;
}
static void dispc_disable_outputs(void)
......
......@@ -148,23 +148,25 @@ static struct s3c24xx_hsudc_platdata smdk2416_hsudc_platdata = {
static struct s3c_fb_pd_win smdk2416_fb_win[] = {
[0] = {
/* think this is the same as the smdk6410 */
.win_mode = {
.pixclock = 41094,
.left_margin = 8,
.right_margin = 13,
.upper_margin = 7,
.lower_margin = 5,
.hsync_len = 3,
.vsync_len = 1,
.xres = 800,
.yres = 480,
},
.default_bpp = 16,
.max_bpp = 32,
.xres = 800,
.yres = 480,
},
};
static struct fb_videomode smdk2416_lcd_timing = {
.pixclock = 41094,
.left_margin = 8,
.right_margin = 13,
.upper_margin = 7,
.lower_margin = 5,
.hsync_len = 3,
.vsync_len = 1,
.xres = 800,
.yres = 480,
};
static void s3c2416_fb_gpio_setup_24bpp(void)
{
unsigned int gpio;
......@@ -187,6 +189,7 @@ static void s3c2416_fb_gpio_setup_24bpp(void)
static struct s3c_fb_platdata smdk2416_fb_platdata = {
.win[0] = &smdk2416_fb_win[0],
.vtiming = &smdk2416_lcd_timing,
.setup_gpio = s3c2416_fb_gpio_setup_24bpp,
.vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
.vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
......
......@@ -134,24 +134,27 @@ static struct platform_device anw6410_lcd_powerdev = {
};
static struct s3c_fb_pd_win anw6410_fb_win0 = {
/* this is to ensure we use win0 */
.win_mode = {
.left_margin = 8,
.right_margin = 13,
.upper_margin = 7,
.lower_margin = 5,
.hsync_len = 3,
.vsync_len = 1,
.xres = 800,
.yres = 480,
},
.max_bpp = 32,
.default_bpp = 16,
.xres = 800,
.yres = 480,
};
static struct fb_videomode anw6410_lcd_timing = {
.left_margin = 8,
.right_margin = 13,
.upper_margin = 7,
.lower_margin = 5,
.hsync_len = 3,
.vsync_len = 1,
.xres = 800,
.yres = 480,
};
/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
static struct s3c_fb_platdata anw6410_lcd_pdata __initdata = {
.setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
.vtiming = &anw6410_lcd_timing,
.win[0] = &anw6410_fb_win0,
.vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
.vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
......
......@@ -151,26 +151,29 @@ static struct platform_device crag6410_lcd_powerdev = {
/* 640x480 URT */
static struct s3c_fb_pd_win crag6410_fb_win0 = {
/* this is to ensure we use win0 */
.win_mode = {
.left_margin = 150,
.right_margin = 80,
.upper_margin = 40,
.lower_margin = 5,
.hsync_len = 40,
.vsync_len = 5,
.xres = 640,
.yres = 480,
},
.max_bpp = 32,
.default_bpp = 16,
.xres = 640,
.yres = 480,
.virtual_y = 480 * 2,
.virtual_x = 640,
};
static struct fb_videomode crag6410_lcd_timing = {
.left_margin = 150,
.right_margin = 80,
.upper_margin = 40,
.lower_margin = 5,
.hsync_len = 40,
.vsync_len = 5,
.xres = 640,
.yres = 480,
};
/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
static struct s3c_fb_platdata crag6410_lcd_pdata __initdata = {
.setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
.vtiming = &crag6410_lcd_timing,
.win[0] = &crag6410_fb_win0,
.vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
.vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
......
......@@ -129,23 +129,27 @@ static struct platform_device hmt_backlight_device = {
};
static struct s3c_fb_pd_win hmt_fb_win0 = {
.win_mode = {
.left_margin = 8,
.right_margin = 13,
.upper_margin = 7,
.lower_margin = 5,
.hsync_len = 3,
.vsync_len = 1,
.xres = 800,
.yres = 480,
},
.max_bpp = 32,
.default_bpp = 16,
.xres = 800,
.yres = 480,
};
static struct fb_videomode hmt_lcd_timing = {
.left_margin = 8,
.right_margin = 13,
.upper_margin = 7,
.lower_margin = 5,
.hsync_len = 3,
.vsync_len = 1,
.xres = 800,
.yres = 480,
};
/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
static struct s3c_fb_platdata hmt_lcd_pdata __initdata = {
.setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
.vtiming = &hmt_lcd_timing,
.win[0] = &hmt_fb_win0,
.vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
.vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
......
......@@ -140,41 +140,59 @@ static struct s3c2410_platform_nand mini6410_nand_info = {
.sets = mini6410_nand_sets,
};
static struct s3c_fb_pd_win mini6410_fb_win[] = {
static struct s3c_fb_pd_win mini6410_lcd_type0_fb_win = {
.max_bpp = 32,
.default_bpp = 16,
.xres = 480,
.yres = 272,
};
static struct fb_videomode mini6410_lcd_type0_timing = {
/* 4.3" 480x272 */
.left_margin = 3,
.right_margin = 2,
.upper_margin = 1,
.lower_margin = 1,
.hsync_len = 40,
.vsync_len = 1,
.xres = 480,
.yres = 272,
};
static struct s3c_fb_pd_win mini6410_lcd_type1_fb_win = {
.max_bpp = 32,
.default_bpp = 16,
.xres = 800,
.yres = 480,
};
static struct fb_videomode mini6410_lcd_type1_timing = {
/* 7.0" 800x480 */
.left_margin = 8,
.right_margin = 13,
.upper_margin = 7,
.lower_margin = 5,
.hsync_len = 3,
.vsync_len = 1,
.xres = 800,
.yres = 480,
};
static struct s3c_fb_platdata mini6410_lcd_pdata[] __initdata = {
{
.win_mode = { /* 4.3" 480x272 */
.left_margin = 3,
.right_margin = 2,
.upper_margin = 1,
.lower_margin = 1,
.hsync_len = 40,
.vsync_len = 1,
.xres = 480,
.yres = 272,
},
.max_bpp = 32,
.default_bpp = 16,
.setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
.vtiming = &mini6410_lcd_type0_timing,
.win[0] = &mini6410_lcd_type0_fb_win,
.vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
.vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
}, {
.win_mode = { /* 7.0" 800x480 */
.left_margin = 8,
.right_margin = 13,
.upper_margin = 7,
.lower_margin = 5,
.hsync_len = 3,
.vsync_len = 1,
.xres = 800,
.yres = 480,
},
.max_bpp = 32,
.default_bpp = 16,
.setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
.vtiming = &mini6410_lcd_type1_timing,
.win[0] = &mini6410_lcd_type1_fb_win,
.vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
.vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
},
};
static struct s3c_fb_platdata mini6410_lcd_pdata __initdata = {
.setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
.win[0] = &mini6410_fb_win[0],
.vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
.vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
{ },
};
static void mini6410_lcd_power_set(struct plat_lcd_data *pd,
......@@ -272,7 +290,7 @@ static void mini6410_parse_features(
"screen type already set\n", f);
} else {
int li = f - '0';
if (li >= ARRAY_SIZE(mini6410_fb_win))
if (li >= ARRAY_SIZE(mini6410_lcd_pdata))
printk(KERN_INFO "MINI6410: '%c' out "
"of range LCD mode\n", f);
else {
......@@ -296,14 +314,12 @@ static void __init mini6410_machine_init(void)
/* Parse the feature string */
mini6410_parse_features(&features, mini6410_features_str);
mini6410_lcd_pdata.win[0] = &mini6410_fb_win[features.lcd_index];
printk(KERN_INFO "MINI6410: selected LCD display is %dx%d\n",
mini6410_lcd_pdata.win[0]->win_mode.xres,
mini6410_lcd_pdata.win[0]->win_mode.yres);
mini6410_lcd_pdata[features.lcd_index].win[0]->xres,
mini6410_lcd_pdata[features.lcd_index].win[0]->yres);
s3c_nand_set_platdata(&mini6410_nand_info);
s3c_fb_set_platdata(&mini6410_lcd_pdata);
s3c_fb_set_platdata(&mini6410_lcd_pdata[features.lcd_index]);
s3c24xx_ts_set_platdata(NULL);
/* configure nCS1 width to 16 bits */
......
......@@ -106,41 +106,57 @@ static struct platform_device real6410_device_eth = {
},
};
static struct s3c_fb_pd_win real6410_fb_win[] = {
static struct s3c_fb_pd_win real6410_lcd_type0_fb_win = {
.max_bpp = 32,
.default_bpp = 16,
.xres = 480,
.yres = 272,
};
static struct fb_videomode real6410_lcd_type0_timing = {
/* 4.3" 480x272 */
.left_margin = 3,
.right_margin = 2,
.upper_margin = 1,
.lower_margin = 1,
.hsync_len = 40,
.vsync_len = 1,
};
static struct s3c_fb_pd_win real6410_lcd_type1_fb_win = {
.max_bpp = 32,
.default_bpp = 16,
.xres = 800,
.yres = 480,
};
static struct fb_videomode real6410_lcd_type1_timing = {
/* 7.0" 800x480 */
.left_margin = 8,
.right_margin = 13,
.upper_margin = 7,
.lower_margin = 5,
.hsync_len = 3,
.vsync_len = 1,
.xres = 800,
.yres = 480,
};
static struct s3c_fb_platdata real6410_lcd_pdata[] __initdata = {
{
.win_mode = { /* 4.3" 480x272 */
.left_margin = 3,
.right_margin = 2,
.upper_margin = 1,
.lower_margin = 1,
.hsync_len = 40,
.vsync_len = 1,
.xres = 480,
.yres = 272,
},
.max_bpp = 32,
.default_bpp = 16,
.setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
.vtiming = &real6410_lcd_type0_timing,
.win[0] = &real6410_lcd_type0_fb_win,
.vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
.vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
}, {
.win_mode = { /* 7.0" 800x480 */
.left_margin = 8,
.right_margin = 13,
.upper_margin = 7,
.lower_margin = 5,
.hsync_len = 3,
.vsync_len = 1,
.xres = 800,
.yres = 480,
},
.max_bpp = 32,
.default_bpp = 16,
.setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
.vtiming = &real6410_lcd_type1_timing,
.win[0] = &real6410_lcd_type1_fb_win,
.vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
.vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
},
};
static struct s3c_fb_platdata real6410_lcd_pdata __initdata = {
.setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
.win[0] = &real6410_fb_win[0],
.vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
.vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
{ },
};
static struct mtd_partition real6410_nand_part[] = {
......@@ -253,7 +269,7 @@ static void real6410_parse_features(
"screen type already set\n", f);
} else {
int li = f - '0';
if (li >= ARRAY_SIZE(real6410_fb_win))
if (li >= ARRAY_SIZE(real6410_lcd_pdata))
printk(KERN_INFO "REAL6410: '%c' out "
"of range LCD mode\n", f);
else {
......@@ -277,13 +293,11 @@ static void __init real6410_machine_init(void)
/* Parse the feature string */
real6410_parse_features(&features, real6410_features_str);
real6410_lcd_pdata.win[0] = &real6410_fb_win[features.lcd_index];
printk(KERN_INFO "REAL6410: selected LCD display is %dx%d\n",
real6410_lcd_pdata.win[0]->win_mode.xres,
real6410_lcd_pdata.win[0]->win_mode.yres);
real6410_lcd_pdata[features.lcd_index].win[0]->xres,
real6410_lcd_pdata[features.lcd_index].win[0]->yres);
s3c_fb_set_platdata(&real6410_lcd_pdata);
s3c_fb_set_platdata(&real6410_lcd_pdata[features.lcd_index]);
s3c_nand_set_platdata(&real6410_nand_info);
s3c24xx_ts_set_platdata(NULL);
......
......@@ -108,23 +108,27 @@ static struct platform_device smartq5_buttons_device = {
};
static struct s3c_fb_pd_win smartq5_fb_win0 = {
.win_mode = {
.left_margin = 216,
.right_margin = 40,
.upper_margin = 35,
.lower_margin = 10,
.hsync_len = 1,
.vsync_len = 1,
.xres = 800,
.yres = 480,
.refresh = 80,
},
.max_bpp = 32,
.default_bpp = 16,
.xres = 800,
.yres = 480,
};
static struct fb_videomode smartq5_lcd_timing = {
.left_margin = 216,
.right_margin = 40,
.upper_margin = 35,
.lower_margin = 10,
.hsync_len = 1,
.vsync_len = 1,
.xres = 800,
.yres = 480,
.refresh = 80,
};
static struct s3c_fb_platdata smartq5_lcd_pdata __initdata = {
.setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
.vtiming = &smartq5_lcd_timing,
.win[0] = &smartq5_fb_win0,
.vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
.vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC |
......
......@@ -124,23 +124,27 @@ static struct platform_device smartq7_buttons_device = {
};
static struct s3c_fb_pd_win smartq7_fb_win0 = {
.win_mode = {
.left_margin = 3,
.right_margin = 5,
.upper_margin = 1,
.lower_margin = 20,
.hsync_len = 10,
.vsync_len = 3,
.xres = 800,
.yres = 480,
.refresh = 80,
},
.max_bpp = 32,
.default_bpp = 16,
.xres = 800,
.yres = 480,
};
static struct fb_videomode smartq7_lcd_timing = {
.left_margin = 3,
.right_margin = 5,
.upper_margin = 1,
.lower_margin = 20,
.hsync_len = 10,
.vsync_len = 3,
.xres = 800,
.yres = 480,
.refresh = 80,
};
static struct s3c_fb_platdata smartq7_lcd_pdata __initdata = {
.setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
.vtiming = &smartq7_lcd_timing,
.win[0] = &smartq7_fb_win0,
.vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
.vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC |
......
......@@ -146,26 +146,29 @@ static struct platform_device smdk6410_lcd_powerdev = {
};
static struct s3c_fb_pd_win smdk6410_fb_win0 = {
/* this is to ensure we use win0 */
.win_mode = {
.left_margin = 8,
.right_margin = 13,
.upper_margin = 7,
.lower_margin = 5,
.hsync_len = 3,
.vsync_len = 1,
.xres = 800,
.yres = 480,
},
.max_bpp = 32,
.default_bpp = 16,
.xres = 800,
.yres = 480,
.virtual_y = 480 * 2,
.virtual_x = 800,
};
static struct fb_videomode smdk6410_lcd_timing = {
.left_margin = 8,
.right_margin = 13,
.upper_margin = 7,
.lower_margin = 5,
.hsync_len = 3,
.vsync_len = 1,
.xres = 800,
.yres = 480,
};
/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
static struct s3c_fb_platdata smdk6410_lcd_pdata __initdata = {
.setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
.vtiming = &smdk6410_lcd_timing,
.win[0] = &smdk6410_fb_win0,
.vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
.vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
......
......@@ -103,22 +103,26 @@ static struct s3c2410_uartcfg smdk6440_uartcfgs[] __initdata = {
/* Frame Buffer */
static struct s3c_fb_pd_win smdk6440_fb_win0 = {
.win_mode = {
.left_margin = 8,
.right_margin = 13,
.upper_margin = 7,
.lower_margin = 5,
.hsync_len = 3,
.vsync_len = 1,
.xres = 800,
.yres = 480,
},
.max_bpp = 32,
.default_bpp = 24,
.xres = 800,
.yres = 480,
};
static struct fb_videomode smdk6440_lcd_timing = {
.left_margin = 8,
.right_margin = 13,
.upper_margin = 7,
.lower_margin = 5,
.hsync_len = 3,
.vsync_len = 1,
.xres = 800,
.yres = 480,
};
static struct s3c_fb_platdata smdk6440_lcd_pdata __initdata = {
.win[0] = &smdk6440_fb_win0,
.vtiming = &smdk6440_lcd_timing,
.vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
.vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
.setup_gpio = s5p64x0_fb_gpio_setup_24bpp,
......
......@@ -121,22 +121,26 @@ static struct s3c2410_uartcfg smdk6450_uartcfgs[] __initdata = {
/* Frame Buffer */
static struct s3c_fb_pd_win smdk6450_fb_win0 = {
.win_mode = {
.left_margin = 8,
.right_margin = 13,
.upper_margin = 7,
.lower_margin = 5,
.hsync_len = 3,
.vsync_len = 1,
.xres = 800,
.yres = 480,
},
.max_bpp = 32,
.default_bpp = 24,
.xres = 800,
.yres = 480,
};
static struct fb_videomode smdk6450_lcd_timing = {
.left_margin = 8,
.right_margin = 13,
.upper_margin = 7,
.lower_margin = 5,
.hsync_len = 3,
.vsync_len = 1,
.xres = 800,
.yres = 480,
};
static struct s3c_fb_platdata smdk6450_lcd_pdata __initdata = {
.win[0] = &smdk6450_fb_win0,
.vtiming = &smdk6450_lcd_timing,
.vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
.vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
.setup_gpio = s5p64x0_fb_gpio_setup_24bpp,
......
......@@ -136,24 +136,27 @@ static struct platform_device smdkc100_lcd_powerdev = {
/* Frame Buffer */
static struct s3c_fb_pd_win smdkc100_fb_win0 = {
/* this is to ensure we use win0 */
.win_mode = {
.left_margin = 8,
.right_margin = 13,
.upper_margin = 7,
.lower_margin = 5,
.hsync_len = 3,
.vsync_len = 1,
.xres = 800,
.yres = 480,
.refresh = 80,
},
.max_bpp = 32,
.default_bpp = 16,
.xres = 800,
.yres = 480,
};
static struct fb_videomode smdkc100_lcd_timing = {
.left_margin = 8,
.right_margin = 13,
.upper_margin = 7,
.lower_margin = 5,
.hsync_len = 3,
.vsync_len = 1,
.xres = 800,
.yres = 480,
.refresh = 80,
};
static struct s3c_fb_platdata smdkc100_lcd_pdata __initdata = {
.win[0] = &smdkc100_fb_win0,
.vtiming = &smdkc100_lcd_timing,
.vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
.vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
.setup_gpio = s5pc100_fb_gpio_setup_24bpp,
......
......@@ -96,38 +96,34 @@ static struct s3c2410_uartcfg aquila_uartcfgs[] __initdata = {
/* Frame Buffer */
static struct s3c_fb_pd_win aquila_fb_win0 = {
.win_mode = {
.left_margin = 16,
.right_margin = 16,
.upper_margin = 3,
.lower_margin = 28,
.hsync_len = 2,
.vsync_len = 2,
.xres = 480,
.yres = 800,
},
.max_bpp = 32,
.default_bpp = 16,
.xres = 480,
.yres = 800,
};
static struct s3c_fb_pd_win aquila_fb_win1 = {
.win_mode = {
.left_margin = 16,
.right_margin = 16,
.upper_margin = 3,
.lower_margin = 28,
.hsync_len = 2,
.vsync_len = 2,
.xres = 480,
.yres = 800,
},
.max_bpp = 32,
.default_bpp = 16,
.xres = 480,
.yres = 800,
};
static struct fb_videomode aquila_lcd_timing = {
.left_margin = 16,
.right_margin = 16,
.upper_margin = 3,
.lower_margin = 28,
.hsync_len = 2,
.vsync_len = 2,
.xres = 480,
.yres = 800,
};
static struct s3c_fb_platdata aquila_lcd_pdata __initdata = {
.win[0] = &aquila_fb_win0,
.win[1] = &aquila_fb_win1,
.vtiming = &aquila_lcd_timing,
.vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
.vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC |
VIDCON1_INV_VCLK | VIDCON1_INV_VDEN,
......
......@@ -107,25 +107,29 @@ static struct s3c2410_uartcfg goni_uartcfgs[] __initdata = {
/* Frame Buffer */
static struct s3c_fb_pd_win goni_fb_win0 = {
.win_mode = {
.left_margin = 16,
.right_margin = 16,
.upper_margin = 2,
.lower_margin = 28,
.hsync_len = 2,
.vsync_len = 1,
.xres = 480,
.yres = 800,
.refresh = 55,
},
.max_bpp = 32,
.default_bpp = 16,
.xres = 480,
.yres = 800,
.virtual_x = 480,
.virtual_y = 2 * 800,
};
static struct fb_videomode goni_lcd_timing = {
.left_margin = 16,
.right_margin = 16,
.upper_margin = 2,
.lower_margin = 28,
.hsync_len = 2,
.vsync_len = 1,
.xres = 480,
.yres = 800,
.refresh = 55,
};
static struct s3c_fb_platdata goni_lcd_pdata __initdata = {
.win[0] = &goni_fb_win0,
.vtiming = &goni_lcd_timing,
.vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB |
VIDCON0_CLKSEL_LCD,
.vidcon1 = VIDCON1_INV_VCLK | VIDCON1_INV_VDEN
......
......@@ -178,22 +178,26 @@ static struct platform_device smdkv210_lcd_lte480wv = {
};
static struct s3c_fb_pd_win smdkv210_fb_win0 = {
.win_mode = {
.left_margin = 13,
.right_margin = 8,
.upper_margin = 7,
.lower_margin = 5,
.hsync_len = 3,
.vsync_len = 1,
.xres = 800,
.yres = 480,
},
.max_bpp = 32,
.default_bpp = 24,
.xres = 800,
.yres = 480,
};
static struct fb_videomode smdkv210_lcd_timing = {
.left_margin = 13,
.right_margin = 8,
.upper_margin = 7,
.lower_margin = 5,
.hsync_len = 3,
.vsync_len = 1,
.xres = 800,
.yres = 480,
};
static struct s3c_fb_platdata smdkv210_lcd0_pdata __initdata = {
.win[0] = &smdkv210_fb_win0,
.vtiming = &smdkv210_lcd_timing,
.vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
.vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
.setup_gpio = s5pv210_fb_gpio_setup_24bpp,
......
......@@ -24,15 +24,16 @@
/**
* struct s3c_fb_pd_win - per window setup data
* @win_mode: The display parameters to initialise (not for window 0)
* @xres : The window X size.
* @yres : The window Y size.
* @virtual_x: The virtual X size.
* @virtual_y: The virtual Y size.
*/
struct s3c_fb_pd_win {
struct fb_videomode win_mode;
unsigned short default_bpp;
unsigned short max_bpp;
unsigned short xres;
unsigned short yres;
unsigned short virtual_x;
unsigned short virtual_y;
};
......@@ -45,6 +46,7 @@ struct s3c_fb_pd_win {
* @default_win: default window layer number to be used for UI layer.
* @vidcon0: The base vidcon0 values to control the panel data format.
* @vidcon1: The base vidcon1 values to control the panel data output.
* @vtiming: Video timing when connected to a RGB type panel.
* @win: The setup data for each hardware window, or NULL for unused.
* @display_mode: The LCD output display mode.
*
......@@ -58,8 +60,7 @@ struct s3c_fb_platdata {
void (*setup_gpio)(void);
struct s3c_fb_pd_win *win[S3C_FB_MAX_WIN];
u32 default_win;
struct fb_videomode *vtiming;
u32 vidcon0;
u32 vidcon1;
......
......@@ -2210,7 +2210,7 @@ config FB_XILINX
config FB_COBALT
tristate "Cobalt server LCD frame buffer support"
depends on FB && MIPS_COBALT
depends on FB && (MIPS_COBALT || MIPS_SEAD3)
config FB_SH7760
bool "SH7760/SH7763/SH7720/SH7721 LCDC support"
......@@ -2382,6 +2382,39 @@ config FB_BROADSHEET
and could also have been called by other names when coupled with
a bridge adapter.
config FB_AUO_K190X
tristate "AUO-K190X EPD controller support"
depends on FB
select FB_SYS_FILLRECT
select FB_SYS_COPYAREA
select FB_SYS_IMAGEBLIT
select FB_SYS_FOPS
select FB_DEFERRED_IO
help
Provides support for epaper controllers from the K190X series
of AUO. These controllers can be used to drive epaper displays
from Sipix.
This option enables the common support, shared by the individual
controller drivers. You will also have to enable the driver
for the controller type used in your device.
config FB_AUO_K1900
tristate "AUO-K1900 EPD controller support"
depends on FB && FB_AUO_K190X
help
This driver implements support for the AUO K1900 epd-controller.
This controller can drive Sipix epaper displays but can only do
serial updates, reducing the number of possible frames per second.
config FB_AUO_K1901
tristate "AUO-K1901 EPD controller support"
depends on FB && FB_AUO_K190X
help
This driver implements support for the AUO K1901 epd-controller.
This controller can drive Sipix epaper displays and supports
concurrent updates, making higher frames per second possible.
config FB_JZ4740
tristate "JZ4740 LCD framebuffer support"
depends on FB && MACH_JZ4740
......
......@@ -118,6 +118,9 @@ obj-$(CONFIG_FB_PMAGB_B) += pmagb-b-fb.o
obj-$(CONFIG_FB_MAXINE) += maxinefb.o
obj-$(CONFIG_FB_METRONOME) += metronomefb.o
obj-$(CONFIG_FB_BROADSHEET) += broadsheetfb.o
obj-$(CONFIG_FB_AUO_K190X) += auo_k190x.o
obj-$(CONFIG_FB_AUO_K1900) += auo_k1900fb.o
obj-$(CONFIG_FB_AUO_K1901) += auo_k1901fb.o
obj-$(CONFIG_FB_S1D13XXX) += s1d13xxxfb.o
obj-$(CONFIG_FB_SH7760) += sh7760fb.o
obj-$(CONFIG_FB_IMX) += imxfb.o
......
/*
* auok190xfb.c -- FB driver for AUO-K1900 controllers
*
* Copyright (C) 2011, 2012 Heiko Stuebner <heiko@sntech.de>
*
* based on broadsheetfb.c
*
* Copyright (C) 2008, Jaya Kumar
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Layout is based on skeletonfb.c by James Simmons and Geert Uytterhoeven.
*
* This driver is written to be used with the AUO-K1900 display controller.
*
* It is intended to be architecture independent. A board specific driver
* must be used to perform all the physical IO interactions.
*
* The controller supports different update modes:
* mode0+1 16 step gray (4bit)
* mode2 4 step gray (2bit) - FIXME: add strange refresh
* mode3 2 step gray (1bit) - FIXME: add strange refresh
* mode4 handwriting mode (strange behaviour)
* mode5 automatic selection of update mode
*/
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/string.h>
#include <linux/mm.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/fb.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/list.h>
#include <linux/firmware.h>
#include <linux/gpio.h>
#include <linux/pm_runtime.h>
#include <video/auo_k190xfb.h>
#include "auo_k190x.h"
/*
* AUO-K1900 specific commands
*/
#define AUOK1900_CMD_PARTIALDISP 0x1001
#define AUOK1900_CMD_ROTATION 0x1006
#define AUOK1900_CMD_LUT_STOP 0x1009
#define AUOK1900_INIT_TEMP_AVERAGE (1 << 13)
#define AUOK1900_INIT_ROTATE(_x) ((_x & 0x3) << 10)
#define AUOK1900_INIT_RESOLUTION(_res) ((_res & 0x7) << 2)
static void auok1900_init(struct auok190xfb_par *par)
{
struct auok190x_board *board = par->board;
u16 init_param = 0;
init_param |= AUOK1900_INIT_TEMP_AVERAGE;
init_param |= AUOK1900_INIT_ROTATE(par->rotation);
init_param |= AUOK190X_INIT_INVERSE_WHITE;
init_param |= AUOK190X_INIT_FORMAT0;
init_param |= AUOK1900_INIT_RESOLUTION(par->resolution);
init_param |= AUOK190X_INIT_SHIFT_RIGHT;
auok190x_send_cmdargs(par, AUOK190X_CMD_INIT, 1, &init_param);
/* let the controller finish */
board->wait_for_rdy(par);
}
static void auok1900_update_region(struct auok190xfb_par *par, int mode,
u16 y1, u16 y2)
{
struct device *dev = par->info->device;
unsigned char *buf = (unsigned char *)par->info->screen_base;
int xres = par->info->var.xres;
u16 args[4];
pm_runtime_get_sync(dev);
mutex_lock(&(par->io_lock));
/* y1 and y2 must be a multiple of 2 so drop the lowest bit */
y1 &= 0xfffe;
y2 &= 0xfffe;
dev_dbg(dev, "update (x,y,w,h,mode)=(%d,%d,%d,%d,%d)\n",
1, y1+1, xres, y2-y1, mode);
/* to FIX handle different partial update modes */
args[0] = mode | 1;
args[1] = y1 + 1;
args[2] = xres;
args[3] = y2 - y1;
buf += y1 * xres;
auok190x_send_cmdargs_pixels(par, AUOK1900_CMD_PARTIALDISP, 4, args,
((y2 - y1) * xres)/2, (u16 *) buf);
auok190x_send_command(par, AUOK190X_CMD_DATA_STOP);
par->update_cnt++;
mutex_unlock(&(par->io_lock));
pm_runtime_mark_last_busy(dev);
pm_runtime_put_autosuspend(dev);
}
static void auok1900fb_dpy_update_pages(struct auok190xfb_par *par,
u16 y1, u16 y2)
{
int mode;
if (par->update_mode < 0) {
mode = AUOK190X_UPDATE_MODE(1);
par->last_mode = -1;
} else {
mode = AUOK190X_UPDATE_MODE(par->update_mode);
par->last_mode = par->update_mode;
}
if (par->flash)
mode |= AUOK190X_UPDATE_NONFLASH;
auok1900_update_region(par, mode, y1, y2);
}
static void auok1900fb_dpy_update(struct auok190xfb_par *par)
{
int mode;
if (par->update_mode < 0) {
mode = AUOK190X_UPDATE_MODE(0);
par->last_mode = -1;
} else {
mode = AUOK190X_UPDATE_MODE(par->update_mode);
par->last_mode = par->update_mode;
}
if (par->flash)
mode |= AUOK190X_UPDATE_NONFLASH;
auok1900_update_region(par, mode, 0, par->info->var.yres);
par->update_cnt = 0;
}
static bool auok1900fb_need_refresh(struct auok190xfb_par *par)
{
return (par->update_cnt > 10);
}
static int __devinit auok1900fb_probe(struct platform_device *pdev)
{
struct auok190x_init_data init;
struct auok190x_board *board;
/* pick up board specific routines */
board = pdev->dev.platform_data;
if (!board)
return -EINVAL;
/* fill temporary init struct for common init */
init.id = "auo_k1900fb";
init.board = board;
init.update_partial = auok1900fb_dpy_update_pages;
init.update_all = auok1900fb_dpy_update;
init.need_refresh = auok1900fb_need_refresh;
init.init = auok1900_init;
return auok190x_common_probe(pdev, &init);
}
static int __devexit auok1900fb_remove(struct platform_device *pdev)
{
return auok190x_common_remove(pdev);
}
static struct platform_driver auok1900fb_driver = {
.probe = auok1900fb_probe,
.remove = __devexit_p(auok1900fb_remove),
.driver = {
.owner = THIS_MODULE,
.name = "auo_k1900fb",
.pm = &auok190x_pm,
},
};
module_platform_driver(auok1900fb_driver);
MODULE_DESCRIPTION("framebuffer driver for the AUO-K1900 EPD controller");
MODULE_AUTHOR("Heiko Stuebner <heiko@sntech.de>");
MODULE_LICENSE("GPL");
/*
* auok190xfb.c -- FB driver for AUO-K1901 controllers
*
* Copyright (C) 2011, 2012 Heiko Stuebner <heiko@sntech.de>
*
* based on broadsheetfb.c
*
* Copyright (C) 2008, Jaya Kumar
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Layout is based on skeletonfb.c by James Simmons and Geert Uytterhoeven.
*
* This driver is written to be used with the AUO-K1901 display controller.
*
* It is intended to be architecture independent. A board specific driver
* must be used to perform all the physical IO interactions.
*
* The controller supports different update modes:
* mode0+1 16 step gray (4bit)
* mode2+3 4 step gray (2bit)
* mode4+5 2 step gray (1bit)
* - mode4 is described as "without LUT"
* mode7 automatic selection of update mode
*
* The most interesting difference to the K1900 is the ability to do screen
* updates in an asynchronous fashion. Where the K1900 needs to wait for the
* current update to complete, the K1901 can process later updates already.
*/
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/string.h>
#include <linux/mm.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/fb.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/list.h>
#include <linux/firmware.h>
#include <linux/gpio.h>
#include <linux/pm_runtime.h>
#include <video/auo_k190xfb.h>
#include "auo_k190x.h"
/*
* AUO-K1901 specific commands
*/
#define AUOK1901_CMD_LUT_INTERFACE 0x0005
#define AUOK1901_CMD_DMA_START 0x1001
#define AUOK1901_CMD_CURSOR_START 0x1007
#define AUOK1901_CMD_CURSOR_STOP AUOK190X_CMD_DATA_STOP
#define AUOK1901_CMD_DDMA_START 0x1009
#define AUOK1901_INIT_GATE_PULSE_LOW (0 << 14)
#define AUOK1901_INIT_GATE_PULSE_HIGH (1 << 14)
#define AUOK1901_INIT_SINGLE_GATE (0 << 13)
#define AUOK1901_INIT_DOUBLE_GATE (1 << 13)
/* Bits to pixels
* Mode 15-12 11-8 7-4 3-0
* format2 2 T 1 T
* format3 1 T 2 T
* format4 T 2 T 1
* format5 T 1 T 2
*
* halftone modes:
* format6 2 2 1 1
* format7 1 1 2 2
*/
#define AUOK1901_INIT_FORMAT2 (1 << 7)
#define AUOK1901_INIT_FORMAT3 ((1 << 7) | (1 << 6))
#define AUOK1901_INIT_FORMAT4 (1 << 8)
#define AUOK1901_INIT_FORMAT5 ((1 << 8) | (1 << 6))
#define AUOK1901_INIT_FORMAT6 ((1 << 8) | (1 << 7))
#define AUOK1901_INIT_FORMAT7 ((1 << 8) | (1 << 7) | (1 << 6))
/* res[4] to bit 10
* res[3-0] to bits 5-2
*/
#define AUOK1901_INIT_RESOLUTION(_res) (((_res & (1 << 4)) << 6) \
| ((_res & 0xf) << 2))
/*
* portrait / landscape orientation in AUOK1901_CMD_DMA_START
*/
#define AUOK1901_DMA_ROTATE90(_rot) ((_rot & 1) << 13)
/*
* equivalent to 1 << 11, needs the ~ to have same rotation like K1900
*/
#define AUOK1901_DDMA_ROTATE180(_rot) ((~_rot & 2) << 10)
static void auok1901_init(struct auok190xfb_par *par)
{
struct auok190x_board *board = par->board;
u16 init_param = 0;
init_param |= AUOK190X_INIT_INVERSE_WHITE;
init_param |= AUOK190X_INIT_FORMAT0;
init_param |= AUOK1901_INIT_RESOLUTION(par->resolution);
init_param |= AUOK190X_INIT_SHIFT_LEFT;
auok190x_send_cmdargs(par, AUOK190X_CMD_INIT, 1, &init_param);
/* let the controller finish */
board->wait_for_rdy(par);
}
static void auok1901_update_region(struct auok190xfb_par *par, int mode,
u16 y1, u16 y2)
{
struct device *dev = par->info->device;
unsigned char *buf = (unsigned char *)par->info->screen_base;
int xres = par->info->var.xres;
u16 args[5];
pm_runtime_get_sync(dev);
mutex_lock(&(par->io_lock));
/* y1 and y2 must be a multiple of 2 so drop the lowest bit */
y1 &= 0xfffe;
y2 &= 0xfffe;
dev_dbg(dev, "update (x,y,w,h,mode)=(%d,%d,%d,%d,%d)\n",
1, y1+1, xres, y2-y1, mode);
/* K1901: first transfer the region data */
args[0] = AUOK1901_DMA_ROTATE90(par->rotation) | 1;
args[1] = y1 + 1;
args[2] = xres;
args[3] = y2 - y1;
buf += y1 * xres;
auok190x_send_cmdargs_pixels_nowait(par, AUOK1901_CMD_DMA_START, 4,
args, ((y2 - y1) * xres)/2,
(u16 *) buf);
auok190x_send_command_nowait(par, AUOK190X_CMD_DATA_STOP);
/* K1901: second tell the controller to update the region with mode */
args[0] = mode | AUOK1901_DDMA_ROTATE180(par->rotation);
args[1] = 1;
args[2] = y1 + 1;
args[3] = xres;
args[4] = y2 - y1;
auok190x_send_cmdargs_nowait(par, AUOK1901_CMD_DDMA_START, 5, args);
par->update_cnt++;
mutex_unlock(&(par->io_lock));
pm_runtime_mark_last_busy(dev);
pm_runtime_put_autosuspend(dev);
}
static void auok1901fb_dpy_update_pages(struct auok190xfb_par *par,
u16 y1, u16 y2)
{
int mode;
if (par->update_mode < 0) {
mode = AUOK190X_UPDATE_MODE(1);
par->last_mode = -1;
} else {
mode = AUOK190X_UPDATE_MODE(par->update_mode);
par->last_mode = par->update_mode;
}
if (par->flash)
mode |= AUOK190X_UPDATE_NONFLASH;
auok1901_update_region(par, mode, y1, y2);
}
static void auok1901fb_dpy_update(struct auok190xfb_par *par)
{
int mode;
/* When doing full updates, wait for the controller to be ready
* This will hopefully catch some hangs of the K1901
*/
par->board->wait_for_rdy(par);
if (par->update_mode < 0) {
mode = AUOK190X_UPDATE_MODE(0);
par->last_mode = -1;
} else {
mode = AUOK190X_UPDATE_MODE(par->update_mode);
par->last_mode = par->update_mode;
}
if (par->flash)
mode |= AUOK190X_UPDATE_NONFLASH;
auok1901_update_region(par, mode, 0, par->info->var.yres);
par->update_cnt = 0;
}
static bool auok1901fb_need_refresh(struct auok190xfb_par *par)
{
return (par->update_cnt > 10);
}
static int __devinit auok1901fb_probe(struct platform_device *pdev)
{
struct auok190x_init_data init;
struct auok190x_board *board;
/* pick up board specific routines */
board = pdev->dev.platform_data;
if (!board)
return -EINVAL;
/* fill temporary init struct for common init */
init.id = "auo_k1901fb";
init.board = board;
init.update_partial = auok1901fb_dpy_update_pages;
init.update_all = auok1901fb_dpy_update;
init.need_refresh = auok1901fb_need_refresh;
init.init = auok1901_init;
return auok190x_common_probe(pdev, &init);
}
static int __devexit auok1901fb_remove(struct platform_device *pdev)
{
return auok190x_common_remove(pdev);
}
static struct platform_driver auok1901fb_driver = {
.probe = auok1901fb_probe,
.remove = __devexit_p(auok1901fb_remove),
.driver = {
.owner = THIS_MODULE,
.name = "auo_k1901fb",
.pm = &auok190x_pm,
},
};
module_platform_driver(auok1901fb_driver);
MODULE_DESCRIPTION("framebuffer driver for the AUO-K1901 EPD controller");
MODULE_AUTHOR("Heiko Stuebner <heiko@sntech.de>");
MODULE_LICENSE("GPL");
This diff is collapsed.
/*
* Private common definitions for AUO-K190X framebuffer drivers
*
* Copyright (C) 2012 Heiko Stuebner <heiko@sntech.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/*
* I80 interface specific defines
*/
#define AUOK190X_I80_CS 0x01
#define AUOK190X_I80_DC 0x02
#define AUOK190X_I80_WR 0x03
#define AUOK190X_I80_OE 0x04
/*
* AUOK190x commands, common to both controllers
*/
#define AUOK190X_CMD_INIT 0x0000
#define AUOK190X_CMD_STANDBY 0x0001
#define AUOK190X_CMD_WAKEUP 0x0002
#define AUOK190X_CMD_TCON_RESET 0x0003
#define AUOK190X_CMD_DATA_STOP 0x1002
#define AUOK190X_CMD_LUT_START 0x1003
#define AUOK190X_CMD_DISP_REFRESH 0x1004
#define AUOK190X_CMD_DISP_RESET 0x1005
#define AUOK190X_CMD_PRE_DISPLAY_START 0x100D
#define AUOK190X_CMD_PRE_DISPLAY_STOP 0x100F
#define AUOK190X_CMD_FLASH_W 0x2000
#define AUOK190X_CMD_FLASH_E 0x2001
#define AUOK190X_CMD_FLASH_STS 0x2002
#define AUOK190X_CMD_FRAMERATE 0x3000
#define AUOK190X_CMD_READ_VERSION 0x4000
#define AUOK190X_CMD_READ_STATUS 0x4001
#define AUOK190X_CMD_READ_LUT 0x4003
#define AUOK190X_CMD_DRIVERTIMING 0x5000
#define AUOK190X_CMD_LBALANCE 0x5001
#define AUOK190X_CMD_AGINGMODE 0x6000
#define AUOK190X_CMD_AGINGEXIT 0x6001
/*
* Common settings for AUOK190X_CMD_INIT
*/
#define AUOK190X_INIT_DATA_FILTER (0 << 12)
#define AUOK190X_INIT_DATA_BYPASS (1 << 12)
#define AUOK190X_INIT_INVERSE_WHITE (0 << 9)
#define AUOK190X_INIT_INVERSE_BLACK (1 << 9)
#define AUOK190X_INIT_SCAN_DOWN (0 << 1)
#define AUOK190X_INIT_SCAN_UP (1 << 1)
#define AUOK190X_INIT_SHIFT_LEFT (0 << 0)
#define AUOK190X_INIT_SHIFT_RIGHT (1 << 0)
/* Common bits to pixels
* Mode 15-12 11-8 7-4 3-0
* format0 4 3 2 1
* format1 3 4 1 2
*/
#define AUOK190X_INIT_FORMAT0 0
#define AUOK190X_INIT_FORMAT1 (1 << 6)
/*
* settings for AUOK190X_CMD_RESET
*/
#define AUOK190X_RESET_TCON (0 << 0)
#define AUOK190X_RESET_NORMAL (1 << 0)
#define AUOK190X_RESET_PON (1 << 1)
/*
* AUOK190X_CMD_VERSION
*/
#define AUOK190X_VERSION_TEMP_MASK (0x1ff)
#define AUOK190X_VERSION_EPD_MASK (0xff)
#define AUOK190X_VERSION_SIZE_INT(_val) ((_val & 0xfc00) >> 10)
#define AUOK190X_VERSION_SIZE_FLOAT(_val) ((_val & 0x3c0) >> 6)
#define AUOK190X_VERSION_MODEL(_val) (_val & 0x3f)
#define AUOK190X_VERSION_LUT(_val) (_val & 0xff)
#define AUOK190X_VERSION_TCON(_val) ((_val & 0xff00) >> 8)
/*
* update modes for CMD_PARTIALDISP on K1900 and CMD_DDMA on K1901
*/
#define AUOK190X_UPDATE_MODE(_res) ((_res & 0x7) << 12)
#define AUOK190X_UPDATE_NONFLASH (1 << 15)
/*
* track panel specific parameters for common init
*/
struct auok190x_init_data {
char *id;
struct auok190x_board *board;
void (*update_partial)(struct auok190xfb_par *par, u16 y1, u16 y2);
void (*update_all)(struct auok190xfb_par *par);
bool (*need_refresh)(struct auok190xfb_par *par);
void (*init)(struct auok190xfb_par *par);
};
extern void auok190x_send_command_nowait(struct auok190xfb_par *par, u16 data);
extern int auok190x_send_command(struct auok190xfb_par *par, u16 data);
extern void auok190x_send_cmdargs_nowait(struct auok190xfb_par *par, u16 cmd,
int argc, u16 *argv);
extern int auok190x_send_cmdargs(struct auok190xfb_par *par, u16 cmd,
int argc, u16 *argv);
extern void auok190x_send_cmdargs_pixels_nowait(struct auok190xfb_par *par,
u16 cmd, int argc, u16 *argv,
int size, u16 *data);
extern int auok190x_send_cmdargs_pixels(struct auok190xfb_par *par, u16 cmd,
int argc, u16 *argv, int size,
u16 *data);
extern int auok190x_read_cmdargs(struct auok190xfb_par *par, u16 cmd,
int argc, u16 *argv);
extern int auok190x_common_probe(struct platform_device *pdev,
struct auok190x_init_data *init);
extern int auok190x_common_remove(struct platform_device *pdev);
extern const struct dev_pm_ops auok190x_pm;
......@@ -414,14 +414,14 @@ static int __devinit bfin_adv7393_fb_probe(struct i2c_client *client,
if (ret) {
dev_err(&client->dev, "PPI0_FS3 GPIO request failed\n");
ret = -EBUSY;
goto out_8;
goto free_fbdev;
}
}
if (peripheral_request_list(ppi_pins, DRIVER_NAME)) {
dev_err(&client->dev, "requesting PPI peripheral failed\n");
ret = -EFAULT;
goto out_8;
goto free_gpio;
}
fbdev->fb_mem =
......@@ -432,7 +432,7 @@ static int __devinit bfin_adv7393_fb_probe(struct i2c_client *client,
dev_err(&client->dev, "couldn't allocate dma buffer (%d bytes)\n",
(u32) fbdev->fb_len);
ret = -ENOMEM;
goto out_7;
goto free_ppi_pins;
}
fbdev->info.screen_base = (void *)fbdev->fb_mem;
......@@ -464,27 +464,27 @@ static int __devinit bfin_adv7393_fb_probe(struct i2c_client *client,
if (!fbdev->info.pseudo_palette) {
dev_err(&client->dev, "failed to allocate pseudo_palette\n");
ret = -ENOMEM;
goto out_6;
goto free_fb_mem;
}
if (fb_alloc_cmap(&fbdev->info.cmap, BFIN_LCD_NBR_PALETTE_ENTRIES, 0) < 0) {
dev_err(&client->dev, "failed to allocate colormap (%d entries)\n",
BFIN_LCD_NBR_PALETTE_ENTRIES);
ret = -EFAULT;
goto out_5;
goto free_palette;
}
if (request_dma(CH_PPI, "BF5xx_PPI_DMA") < 0) {
dev_err(&client->dev, "unable to request PPI DMA\n");
ret = -EFAULT;
goto out_4;
goto free_cmap;
}
if (request_irq(IRQ_PPI_ERROR, ppi_irq_error, 0,
"PPI ERROR", fbdev) < 0) {
dev_err(&client->dev, "unable to request PPI ERROR IRQ\n");
ret = -EFAULT;
goto out_3;
goto free_ch_ppi;
}
fbdev->open = 0;
......@@ -494,14 +494,14 @@ static int __devinit bfin_adv7393_fb_probe(struct i2c_client *client,
if (ret) {
dev_err(&client->dev, "i2c attach: init error\n");
goto out_1;
goto free_irq_ppi;
}
if (register_framebuffer(&fbdev->info) < 0) {
dev_err(&client->dev, "unable to register framebuffer\n");
ret = -EFAULT;
goto out_1;
goto free_irq_ppi;
}
dev_info(&client->dev, "fb%d: %s frame buffer device\n",
......@@ -512,7 +512,7 @@ static int __devinit bfin_adv7393_fb_probe(struct i2c_client *client,
if (!entry) {
dev_err(&client->dev, "unable to create /proc entry\n");
ret = -EFAULT;
goto out_0;
goto free_fb;
}
entry->read_proc = adv7393_read_proc;
......@@ -521,22 +521,25 @@ static int __devinit bfin_adv7393_fb_probe(struct i2c_client *client,
return 0;
out_0:
free_fb:
unregister_framebuffer(&fbdev->info);
out_1:
free_irq_ppi:
free_irq(IRQ_PPI_ERROR, fbdev);
out_3:
free_ch_ppi:
free_dma(CH_PPI);
out_4:
dma_free_coherent(NULL, fbdev->fb_len, fbdev->fb_mem,
fbdev->dma_handle);
out_5:
free_cmap:
fb_dealloc_cmap(&fbdev->info.cmap);
out_6:
free_palette:
kfree(fbdev->info.pseudo_palette);
out_7:
free_fb_mem:
dma_free_coherent(NULL, fbdev->fb_len, fbdev->fb_mem,
fbdev->dma_handle);
free_ppi_pins:
peripheral_free_list(ppi_pins);
out_8:
free_gpio:
if (ANOMALY_05000400)
gpio_free(P_IDENT(P_PPI0_FS3));
free_fbdev:
kfree(fbdev);
return ret;
......
/*
* Cobalt server LCD frame buffer driver.
* Cobalt/SEAD3 LCD frame buffer driver.
*
* Copyright (C) 2008 Yoichi Yuasa <yuasa@linux-mips.org>
* Copyright (C) 2012 MIPS Technologies, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
......@@ -62,6 +63,7 @@
#define LCD_CUR_POS(x) ((x) & LCD_CUR_POS_MASK)
#define LCD_TEXT_POS(x) ((x) | LCD_TEXT_MODE)
#ifdef CONFIG_MIPS_COBALT
static inline void lcd_write_control(struct fb_info *info, u8 control)
{
writel((u32)control << 24, info->screen_base);
......@@ -81,6 +83,47 @@ static inline u8 lcd_read_data(struct fb_info *info)
{
return readl(info->screen_base + LCD_DATA_REG_OFFSET) >> 24;
}
#else
#define LCD_CTL 0x00
#define LCD_DATA 0x08
#define CPLD_STATUS 0x10
#define CPLD_DATA 0x18
static inline void cpld_wait(struct fb_info *info)
{
do {
} while (readl(info->screen_base + CPLD_STATUS) & 1);
}
static inline void lcd_write_control(struct fb_info *info, u8 control)
{
cpld_wait(info);
writel(control, info->screen_base + LCD_CTL);
}
static inline u8 lcd_read_control(struct fb_info *info)
{
cpld_wait(info);
readl(info->screen_base + LCD_CTL);
cpld_wait(info);
return readl(info->screen_base + CPLD_DATA) & 0xff;
}
static inline void lcd_write_data(struct fb_info *info, u8 data)
{
cpld_wait(info);
writel(data, info->screen_base + LCD_DATA);
}
static inline u8 lcd_read_data(struct fb_info *info)
{
cpld_wait(info);
readl(info->screen_base + LCD_DATA);
cpld_wait(info);
return readl(info->screen_base + CPLD_DATA) & 0xff;
}
#endif
static int lcd_busy_wait(struct fb_info *info)
{
......
......@@ -507,16 +507,16 @@ static int __devinit ep93xxfb_probe(struct platform_device *pdev)
err = fb_alloc_cmap(&info->cmap, 256, 0);
if (err)
goto failed;
goto failed_cmap;
err = ep93xxfb_alloc_videomem(info);
if (err)
goto failed;
goto failed_videomem;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res) {
err = -ENXIO;
goto failed;
goto failed_resource;
}
/*
......@@ -532,7 +532,7 @@ static int __devinit ep93xxfb_probe(struct platform_device *pdev)
fbi->mmio_base = ioremap(res->start, resource_size(res));
if (!fbi->mmio_base) {
err = -ENXIO;
goto failed;
goto failed_resource;
}
strcpy(info->fix.id, pdev->name);
......@@ -553,24 +553,24 @@ static int __devinit ep93xxfb_probe(struct platform_device *pdev)
if (err == 0) {
dev_err(info->dev, "No suitable video mode found\n");
err = -EINVAL;
goto failed;
goto failed_mode;
}
if (mach_info->setup) {
err = mach_info->setup(pdev);
if (err)
return err;
goto failed_mode;
}
err = ep93xxfb_check_var(&info->var, info);
if (err)
goto failed;
goto failed_check;
fbi->clk = clk_get(info->dev, NULL);
if (IS_ERR(fbi->clk)) {
err = PTR_ERR(fbi->clk);
fbi->clk = NULL;
goto failed;
goto failed_check;
}
ep93xxfb_set_par(info);
......@@ -585,15 +585,17 @@ static int __devinit ep93xxfb_probe(struct platform_device *pdev)
return 0;
failed:
if (fbi->clk)
clk_put(fbi->clk);
if (fbi->mmio_base)
iounmap(fbi->mmio_base);
ep93xxfb_dealloc_videomem(info);
if (&info->cmap)
fb_dealloc_cmap(&info->cmap);
clk_put(fbi->clk);
failed_check:
if (fbi->mach_info->teardown)
fbi->mach_info->teardown(pdev);
failed_mode:
iounmap(fbi->mmio_base);
failed_resource:
ep93xxfb_dealloc_videomem(info);
failed_videomem:
fb_dealloc_cmap(&info->cmap);
failed_cmap:
kfree(info);
platform_set_drvdata(pdev, NULL);
......
......@@ -21,14 +21,14 @@
#include <video/exynos_dp.h>
#include <plat/cpu.h>
#include "exynos_dp_core.h"
static int exynos_dp_init_dp(struct exynos_dp_device *dp)
{
exynos_dp_reset(dp);
exynos_dp_swreset(dp);
/* SW defined function Normal operation */
exynos_dp_enable_sw_function(dp);
......@@ -478,7 +478,7 @@ static int exynos_dp_process_clock_recovery(struct exynos_dp_device *dp)
int lane_count;
u8 buf[5];
u8 *adjust_request;
u8 adjust_request[2];
u8 voltage_swing;
u8 pre_emphasis;
u8 training_lane;
......@@ -493,8 +493,8 @@ static int exynos_dp_process_clock_recovery(struct exynos_dp_device *dp)
/* set training pattern 2 for EQ */
exynos_dp_set_training_pattern(dp, TRAINING_PTN2);
adjust_request = link_status + (DPCD_ADDR_ADJUST_REQUEST_LANE0_1
- DPCD_ADDR_LANE0_1_STATUS);
adjust_request[0] = link_status[4];
adjust_request[1] = link_status[5];
exynos_dp_get_adjust_train(dp, adjust_request);
......@@ -566,7 +566,7 @@ static int exynos_dp_process_equalizer_training(struct exynos_dp_device *dp)
u8 buf[5];
u32 reg;
u8 *adjust_request;
u8 adjust_request[2];
udelay(400);
......@@ -575,8 +575,8 @@ static int exynos_dp_process_equalizer_training(struct exynos_dp_device *dp)
lane_count = dp->link_train.lane_count;
if (exynos_dp_clock_recovery_ok(link_status, lane_count) == 0) {
adjust_request = link_status + (DPCD_ADDR_ADJUST_REQUEST_LANE0_1
- DPCD_ADDR_LANE0_1_STATUS);
adjust_request[0] = link_status[4];
adjust_request[1] = link_status[5];
if (exynos_dp_channel_eq_ok(link_status, lane_count) == 0) {
/* traing pattern Set to Normal */
......@@ -770,7 +770,7 @@ static int exynos_dp_config_video(struct exynos_dp_device *dp,
return -ETIMEDOUT;
}
mdelay(100);
udelay(1);
}
/* Set to use the register calculated M/N video */
......@@ -804,7 +804,7 @@ static int exynos_dp_config_video(struct exynos_dp_device *dp,
return -ETIMEDOUT;
}
mdelay(100);
mdelay(1);
}
if (retval != 0)
......@@ -860,7 +860,8 @@ static int __devinit exynos_dp_probe(struct platform_device *pdev)
return -EINVAL;
}
dp = kzalloc(sizeof(struct exynos_dp_device), GFP_KERNEL);
dp = devm_kzalloc(&pdev->dev, sizeof(struct exynos_dp_device),
GFP_KERNEL);
if (!dp) {
dev_err(&pdev->dev, "no memory for device data\n");
return -ENOMEM;
......@@ -871,8 +872,7 @@ static int __devinit exynos_dp_probe(struct platform_device *pdev)
dp->clock = clk_get(&pdev->dev, "dp");
if (IS_ERR(dp->clock)) {
dev_err(&pdev->dev, "failed to get clock\n");
ret = PTR_ERR(dp->clock);
goto err_dp;
return PTR_ERR(dp->clock);
}
clk_enable(dp->clock);
......@@ -884,35 +884,25 @@ static int __devinit exynos_dp_probe(struct platform_device *pdev)
goto err_clock;
}
res = request_mem_region(res->start, resource_size(res),
dev_name(&pdev->dev));
if (!res) {
dev_err(&pdev->dev, "failed to request registers region\n");
ret = -EINVAL;
goto err_clock;
}
dp->res = res;
dp->reg_base = ioremap(res->start, resource_size(res));
dp->reg_base = devm_request_and_ioremap(&pdev->dev, res);
if (!dp->reg_base) {
dev_err(&pdev->dev, "failed to ioremap\n");
ret = -ENOMEM;
goto err_req_region;
goto err_clock;
}
dp->irq = platform_get_irq(pdev, 0);
if (!dp->irq) {
dev_err(&pdev->dev, "failed to get irq\n");
ret = -ENODEV;
goto err_ioremap;
goto err_clock;
}
ret = request_irq(dp->irq, exynos_dp_irq_handler, 0,
"exynos-dp", dp);
ret = devm_request_irq(&pdev->dev, dp->irq, exynos_dp_irq_handler, 0,
"exynos-dp", dp);
if (ret) {
dev_err(&pdev->dev, "failed to request irq\n");
goto err_ioremap;
goto err_clock;
}
dp->video_info = pdata->video_info;
......@@ -924,7 +914,7 @@ static int __devinit exynos_dp_probe(struct platform_device *pdev)
ret = exynos_dp_detect_hpd(dp);
if (ret) {
dev_err(&pdev->dev, "unable to detect hpd\n");
goto err_irq;
goto err_clock;
}
exynos_dp_handle_edid(dp);
......@@ -933,7 +923,7 @@ static int __devinit exynos_dp_probe(struct platform_device *pdev)
dp->video_info->link_rate);
if (ret) {
dev_err(&pdev->dev, "unable to do link train\n");
goto err_irq;
goto err_clock;
}
exynos_dp_enable_scramble(dp, 1);
......@@ -947,23 +937,15 @@ static int __devinit exynos_dp_probe(struct platform_device *pdev)
ret = exynos_dp_config_video(dp, dp->video_info);
if (ret) {
dev_err(&pdev->dev, "unable to config video\n");
goto err_irq;
goto err_clock;
}
platform_set_drvdata(pdev, dp);
return 0;
err_irq:
free_irq(dp->irq, dp);
err_ioremap:
iounmap(dp->reg_base);
err_req_region:
release_mem_region(res->start, resource_size(res));
err_clock:
clk_put(dp->clock);
err_dp:
kfree(dp);
return ret;
}
......@@ -976,16 +958,9 @@ static int __devexit exynos_dp_remove(struct platform_device *pdev)
if (pdata && pdata->phy_exit)
pdata->phy_exit();
free_irq(dp->irq, dp);
iounmap(dp->reg_base);
clk_disable(dp->clock);
clk_put(dp->clock);
release_mem_region(dp->res->start, resource_size(dp->res));
kfree(dp);
return 0;
}
......
......@@ -26,7 +26,6 @@ struct link_train {
struct exynos_dp_device {
struct device *dev;
struct resource *res;
struct clk *clock;
unsigned int irq;
void __iomem *reg_base;
......@@ -39,8 +38,10 @@ struct exynos_dp_device {
void exynos_dp_enable_video_mute(struct exynos_dp_device *dp, bool enable);
void exynos_dp_stop_video(struct exynos_dp_device *dp);
void exynos_dp_lane_swap(struct exynos_dp_device *dp, bool enable);
void exynos_dp_init_analog_param(struct exynos_dp_device *dp);
void exynos_dp_init_interrupt(struct exynos_dp_device *dp);
void exynos_dp_reset(struct exynos_dp_device *dp);
void exynos_dp_swreset(struct exynos_dp_device *dp);
void exynos_dp_config_interrupt(struct exynos_dp_device *dp);
u32 exynos_dp_get_pll_lock_status(struct exynos_dp_device *dp);
void exynos_dp_set_pll_power_down(struct exynos_dp_device *dp, bool enable);
......
......@@ -16,8 +16,6 @@
#include <video/exynos_dp.h>
#include <plat/cpu.h>
#include "exynos_dp_core.h"
#include "exynos_dp_reg.h"
......@@ -65,6 +63,28 @@ void exynos_dp_lane_swap(struct exynos_dp_device *dp, bool enable)
writel(reg, dp->reg_base + EXYNOS_DP_LANE_MAP);
}
void exynos_dp_init_analog_param(struct exynos_dp_device *dp)
{
u32 reg;
reg = TX_TERMINAL_CTRL_50_OHM;
writel(reg, dp->reg_base + EXYNOS_DP_ANALOG_CTL_1);
reg = SEL_24M | TX_DVDD_BIT_1_0625V;
writel(reg, dp->reg_base + EXYNOS_DP_ANALOG_CTL_2);
reg = DRIVE_DVDD_BIT_1_0625V | VCO_BIT_600_MICRO;
writel(reg, dp->reg_base + EXYNOS_DP_ANALOG_CTL_3);
reg = PD_RING_OSC | AUX_TERMINAL_CTRL_50_OHM |
TX_CUR1_2X | TX_CUR_8_MA;
writel(reg, dp->reg_base + EXYNOS_DP_PLL_FILTER_CTL_1);
reg = CH3_AMP_400_MV | CH2_AMP_400_MV |
CH1_AMP_400_MV | CH0_AMP_400_MV;
writel(reg, dp->reg_base + EXYNOS_DP_TX_AMP_TUNING_CTL);
}
void exynos_dp_init_interrupt(struct exynos_dp_device *dp)
{
/* Set interrupt pin assertion polarity as high */
......@@ -89,8 +109,6 @@ void exynos_dp_reset(struct exynos_dp_device *dp)
{
u32 reg;
writel(RESET_DP_TX, dp->reg_base + EXYNOS_DP_TX_SW_RESET);
exynos_dp_stop_video(dp);
exynos_dp_enable_video_mute(dp, 0);
......@@ -131,9 +149,15 @@ void exynos_dp_reset(struct exynos_dp_device *dp)
writel(0x00000101, dp->reg_base + EXYNOS_DP_SOC_GENERAL_CTL);
exynos_dp_init_analog_param(dp);
exynos_dp_init_interrupt(dp);
}
void exynos_dp_swreset(struct exynos_dp_device *dp)
{
writel(RESET_DP_TX, dp->reg_base + EXYNOS_DP_TX_SW_RESET);
}
void exynos_dp_config_interrupt(struct exynos_dp_device *dp)
{
u32 reg;
......@@ -271,6 +295,7 @@ void exynos_dp_set_analog_power_down(struct exynos_dp_device *dp,
void exynos_dp_init_analog_func(struct exynos_dp_device *dp)
{
u32 reg;
int timeout_loop = 0;
exynos_dp_set_analog_power_down(dp, POWER_ALL, 0);
......@@ -282,9 +307,19 @@ void exynos_dp_init_analog_func(struct exynos_dp_device *dp)
writel(reg, dp->reg_base + EXYNOS_DP_DEBUG_CTL);
/* Power up PLL */
if (exynos_dp_get_pll_lock_status(dp) == PLL_UNLOCKED)
if (exynos_dp_get_pll_lock_status(dp) == PLL_UNLOCKED) {
exynos_dp_set_pll_power_down(dp, 0);
while (exynos_dp_get_pll_lock_status(dp) == PLL_UNLOCKED) {
timeout_loop++;
if (DP_TIMEOUT_LOOP_COUNT < timeout_loop) {
dev_err(dp->dev, "failed to get pll lock status\n");
return;
}
usleep_range(10, 20);
}
}
/* Enable Serdes FIFO function and Link symbol clock domain module */
reg = readl(dp->reg_base + EXYNOS_DP_FUNC_EN_2);
reg &= ~(SERDES_FIFO_FUNC_EN_N | LS_CLK_DOMAIN_FUNC_EN_N
......
......@@ -24,6 +24,12 @@
#define EXYNOS_DP_LANE_MAP 0x35C
#define EXYNOS_DP_ANALOG_CTL_1 0x370
#define EXYNOS_DP_ANALOG_CTL_2 0x374
#define EXYNOS_DP_ANALOG_CTL_3 0x378
#define EXYNOS_DP_PLL_FILTER_CTL_1 0x37C
#define EXYNOS_DP_TX_AMP_TUNING_CTL 0x380
#define EXYNOS_DP_AUX_HW_RETRY_CTL 0x390
#define EXYNOS_DP_COMMON_INT_STA_1 0x3C4
......@@ -166,6 +172,29 @@
#define LANE0_MAP_LOGIC_LANE_2 (0x2 << 0)
#define LANE0_MAP_LOGIC_LANE_3 (0x3 << 0)
/* EXYNOS_DP_ANALOG_CTL_1 */
#define TX_TERMINAL_CTRL_50_OHM (0x1 << 4)
/* EXYNOS_DP_ANALOG_CTL_2 */
#define SEL_24M (0x1 << 3)
#define TX_DVDD_BIT_1_0625V (0x4 << 0)
/* EXYNOS_DP_ANALOG_CTL_3 */
#define DRIVE_DVDD_BIT_1_0625V (0x4 << 5)
#define VCO_BIT_600_MICRO (0x5 << 0)
/* EXYNOS_DP_PLL_FILTER_CTL_1 */
#define PD_RING_OSC (0x1 << 6)
#define AUX_TERMINAL_CTRL_50_OHM (0x2 << 4)
#define TX_CUR1_2X (0x1 << 2)
#define TX_CUR_8_MA (0x2 << 0)
/* EXYNOS_DP_TX_AMP_TUNING_CTL */
#define CH3_AMP_400_MV (0x0 << 24)
#define CH2_AMP_400_MV (0x0 << 16)
#define CH1_AMP_400_MV (0x0 << 8)
#define CH0_AMP_400_MV (0x0 << 0)
/* EXYNOS_DP_AUX_HW_RETRY_CTL */
#define AUX_BIT_PERIOD_EXPECTED_DELAY(x) (((x) & 0x7) << 8)
#define AUX_HW_RETRY_INTERVAL_MASK (0x3 << 3)
......
......@@ -58,7 +58,7 @@ static struct mipi_dsim_platform_data *to_dsim_plat(struct platform_device
}
static struct regulator_bulk_data supplies[] = {
{ .supply = "vdd10", },
{ .supply = "vdd11", },
{ .supply = "vdd18", },
};
......@@ -102,6 +102,8 @@ static void exynos_mipi_update_cfg(struct mipi_dsim_device *dsim)
/* set display timing. */
exynos_mipi_dsi_set_display_mode(dsim, dsim->dsim_config);
exynos_mipi_dsi_init_interrupt(dsim);
/*
* data from Display controller(FIMD) is transferred in video mode
* but in case of command mode, all settigs is updated to registers.
......@@ -413,27 +415,30 @@ static int exynos_mipi_dsi_probe(struct platform_device *pdev)
goto err_platform_get_irq;
}
init_completion(&dsim_wr_comp);
init_completion(&dsim_rd_comp);
platform_set_drvdata(pdev, dsim);
ret = request_irq(dsim->irq, exynos_mipi_dsi_interrupt_handler,
IRQF_SHARED, pdev->name, dsim);
IRQF_SHARED, dev_name(&pdev->dev), dsim);
if (ret != 0) {
dev_err(&pdev->dev, "failed to request dsim irq\n");
ret = -EINVAL;
goto err_bind;
}
init_completion(&dsim_wr_comp);
init_completion(&dsim_rd_comp);
/* enable interrupt */
/* enable interrupts */
exynos_mipi_dsi_init_interrupt(dsim);
/* initialize mipi-dsi client(lcd panel). */
if (dsim_ddi->dsim_lcd_drv && dsim_ddi->dsim_lcd_drv->probe)
dsim_ddi->dsim_lcd_drv->probe(dsim_ddi->dsim_lcd_dev);
/* in case that mipi got enabled at bootloader. */
if (dsim_pd->enabled)
goto out;
/* in case mipi-dsi has been enabled by bootloader */
if (dsim_pd->enabled) {
exynos_mipi_regulator_enable(dsim);
goto done;
}
/* lcd panel power on. */
if (dsim_ddi->dsim_lcd_drv && dsim_ddi->dsim_lcd_drv->power_on)
......@@ -453,12 +458,11 @@ static int exynos_mipi_dsi_probe(struct platform_device *pdev)
dsim->suspended = false;
out:
done:
platform_set_drvdata(pdev, dsim);
dev_dbg(&pdev->dev, "mipi-dsi driver(%s mode) has been probed.\n",
(dsim_config->e_interface == DSIM_COMMAND) ?
"CPU" : "RGB");
dev_dbg(&pdev->dev, "%s() completed sucessfuly (%s mode)\n", __func__,
dsim_config->e_interface == DSIM_COMMAND ? "CPU" : "RGB");
return 0;
......@@ -515,10 +519,10 @@ static int __devexit exynos_mipi_dsi_remove(struct platform_device *pdev)
return 0;
}
#ifdef CONFIG_PM
static int exynos_mipi_dsi_suspend(struct platform_device *pdev,
pm_message_t state)
#ifdef CONFIG_PM_SLEEP
static int exynos_mipi_dsi_suspend(struct device *dev)
{
struct platform_device *pdev = to_platform_device(dev);
struct mipi_dsim_device *dsim = platform_get_drvdata(pdev);
struct mipi_dsim_lcd_driver *client_drv = dsim->dsim_lcd_drv;
struct mipi_dsim_lcd_device *client_dev = dsim->dsim_lcd_dev;
......@@ -544,8 +548,9 @@ static int exynos_mipi_dsi_suspend(struct platform_device *pdev,
return 0;
}
static int exynos_mipi_dsi_resume(struct platform_device *pdev)
static int exynos_mipi_dsi_resume(struct device *dev)
{
struct platform_device *pdev = to_platform_device(dev);
struct mipi_dsim_device *dsim = platform_get_drvdata(pdev);
struct mipi_dsim_lcd_driver *client_drv = dsim->dsim_lcd_drv;
struct mipi_dsim_lcd_device *client_dev = dsim->dsim_lcd_dev;
......@@ -577,19 +582,19 @@ static int exynos_mipi_dsi_resume(struct platform_device *pdev)
return 0;
}
#else
#define exynos_mipi_dsi_suspend NULL
#define exynos_mipi_dsi_resume NULL
#endif
static const struct dev_pm_ops exynos_mipi_dsi_pm_ops = {
SET_SYSTEM_SLEEP_PM_OPS(exynos_mipi_dsi_suspend, exynos_mipi_dsi_resume)
};
static struct platform_driver exynos_mipi_dsi_driver = {
.probe = exynos_mipi_dsi_probe,
.remove = __devexit_p(exynos_mipi_dsi_remove),
.suspend = exynos_mipi_dsi_suspend,
.resume = exynos_mipi_dsi_resume,
.driver = {
.name = "exynos-mipi-dsim",
.owner = THIS_MODULE,
.pm = &exynos_mipi_dsi_pm_ops,
},
};
......
......@@ -76,33 +76,25 @@ static unsigned int dpll_table[15] = {
irqreturn_t exynos_mipi_dsi_interrupt_handler(int irq, void *dev_id)
{
unsigned int intsrc = 0;
unsigned int intmsk = 0;
struct mipi_dsim_device *dsim = NULL;
dsim = dev_id;
if (!dsim) {
dev_dbg(dsim->dev, KERN_ERR "%s:error: wrong parameter\n",
__func__);
return IRQ_HANDLED;
struct mipi_dsim_device *dsim = dev_id;
unsigned int intsrc, intmsk;
if (dsim == NULL) {
dev_err(dsim->dev, "%s: wrong parameter\n", __func__);
return IRQ_NONE;
}
intsrc = exynos_mipi_dsi_read_interrupt(dsim);
intmsk = exynos_mipi_dsi_read_interrupt_mask(dsim);
intmsk = ~intmsk & intsrc;
intmsk = ~(intmsk) & intsrc;
switch (intmsk) {
case INTMSK_RX_DONE:
if (intsrc & INTMSK_RX_DONE) {
complete(&dsim_rd_comp);
dev_dbg(dsim->dev, "MIPI INTMSK_RX_DONE\n");
break;
case INTMSK_FIFO_EMPTY:
}
if (intsrc & INTMSK_FIFO_EMPTY) {
complete(&dsim_wr_comp);
dev_dbg(dsim->dev, "MIPI INTMSK_FIFO_EMPTY\n");
break;
default:
break;
}
exynos_mipi_dsi_clear_interrupt(dsim, intmsk);
......@@ -738,11 +730,11 @@ int exynos_mipi_dsi_set_display_mode(struct mipi_dsim_device *dsim,
if (dsim_config->auto_vertical_cnt == 0) {
exynos_mipi_dsi_set_main_disp_vporch(dsim,
dsim_config->cmd_allow,
timing->upper_margin,
timing->lower_margin);
timing->lower_margin,
timing->upper_margin);
exynos_mipi_dsi_set_main_disp_hporch(dsim,
timing->left_margin,
timing->right_margin);
timing->right_margin,
timing->left_margin);
exynos_mipi_dsi_set_main_disp_sync_area(dsim,
timing->vsync_len,
timing->hsync_len);
......
......@@ -293,9 +293,20 @@ static void s6e8ax0_panel_cond(struct s6e8ax0 *lcd)
0x6e, 0x00, 0x00, 0x00, 0x02, 0x08, 0x08, 0x23, 0x23, 0xc0,
0xc8, 0x08, 0x48, 0xc1, 0x00, 0xc1, 0xff, 0xff, 0xc8
};
static const unsigned char data_to_send_panel_reverse[] = {
0xf8, 0x19, 0x35, 0x00, 0x00, 0x00, 0x93, 0x00, 0x3c, 0x7d,
0x08, 0x27, 0x7d, 0x3f, 0x00, 0x00, 0x00, 0x20, 0x04, 0x08,
0x6e, 0x00, 0x00, 0x00, 0x02, 0x08, 0x08, 0x23, 0x23, 0xc0,
0xc1, 0x01, 0x41, 0xc1, 0x00, 0xc1, 0xf6, 0xf6, 0xc1
};
ops->cmd_write(lcd_to_master(lcd), MIPI_DSI_DCS_LONG_WRITE,
data_to_send, ARRAY_SIZE(data_to_send));
if (lcd->dsim_dev->panel_reverse)
ops->cmd_write(lcd_to_master(lcd), MIPI_DSI_DCS_LONG_WRITE,
data_to_send_panel_reverse,
ARRAY_SIZE(data_to_send_panel_reverse));
else
ops->cmd_write(lcd_to_master(lcd), MIPI_DSI_DCS_LONG_WRITE,
data_to_send, ARRAY_SIZE(data_to_send));
}
static void s6e8ax0_display_cond(struct s6e8ax0 *lcd)
......
......@@ -23,7 +23,7 @@
#include <linux/rmap.h>
#include <linux/pagemap.h>
struct page *fb_deferred_io_page(struct fb_info *info, unsigned long offs)
static struct page *fb_deferred_io_page(struct fb_info *info, unsigned long offs)
{
void *screen_base = (void __force *) info->screen_base;
struct page *page;
......@@ -107,6 +107,10 @@ static int fb_deferred_io_mkwrite(struct vm_area_struct *vma,
/* protect against the workqueue changing the page list */
mutex_lock(&fbdefio->lock);
/* first write in this cycle, notify the driver */
if (fbdefio->first_io && list_empty(&fbdefio->pagelist))
fbdefio->first_io(info);
/*
* We want the page to remain locked from ->page_mkwrite until
* the PTE is marked dirty to avoid page_mkclean() being called
......
......@@ -80,6 +80,8 @@ EXPORT_SYMBOL(framebuffer_alloc);
*/
void framebuffer_release(struct fb_info *info)
{
if (!info)
return;
kfree(info->apertures);
kfree(info);
}
......
......@@ -834,7 +834,6 @@ static void update_lcdc(struct fb_info *info)
diu_ops.set_pixel_clock(var->pixclock);
out_be32(&hw->syn_pol, 0); /* SYNC SIGNALS POLARITY */
out_be32(&hw->thresholds, 0x00037800); /* The Thresholds */
out_be32(&hw->int_status, 0); /* INTERRUPT STATUS */
out_be32(&hw->plut, 0x01F5F666);
......
......@@ -680,6 +680,7 @@ static int __devinit intelfb_pci_register(struct pci_dev *pdev,
+ dinfo->fb.size);
if (!dinfo->aperture.virtual) {
ERR_MSG("Cannot remap FB region.\n");
agp_backend_release(bridge);
cleanup(dinfo);
return -ENODEV;
}
......@@ -689,6 +690,7 @@ static int __devinit intelfb_pci_register(struct pci_dev *pdev,
INTEL_REG_SIZE);
if (!dinfo->mmio_base) {
ERR_MSG("Cannot remap MMIO region.\n");
agp_backend_release(bridge);
cleanup(dinfo);
return -ENODEV;
}
......
......@@ -68,7 +68,7 @@ static int mb862xx_i2c_read_byte(struct i2c_adapter *adap, u8 *byte, int last)
return 1;
}
void mb862xx_i2c_stop(struct i2c_adapter *adap)
static void mb862xx_i2c_stop(struct i2c_adapter *adap)
{
struct mb862xxfb_par *par = adap->algo_data;
......
......@@ -579,7 +579,7 @@ static ssize_t mb862xxfb_show_dispregs(struct device *dev,
static DEVICE_ATTR(dispregs, 0444, mb862xxfb_show_dispregs, NULL);
irqreturn_t mb862xx_intr(int irq, void *dev_id)
static irqreturn_t mb862xx_intr(int irq, void *dev_id)
{
struct mb862xxfb_par *par = (struct mb862xxfb_par *) dev_id;
unsigned long reg_ist, mask;
......
......@@ -950,7 +950,7 @@ static int __devinit mbxfb_probe(struct platform_device *dev)
mfbi->fb_virt_addr = ioremap_nocache(mfbi->fb_phys_addr,
res_size(mfbi->fb_req));
if (!mfbi->reg_virt_addr) {
if (!mfbi->fb_virt_addr) {
dev_err(&dev->dev, "failed to ioremap frame buffer\n");
ret = -EINVAL;
goto err4;
......
......@@ -889,6 +889,18 @@ static int __devexit mxsfb_remove(struct platform_device *pdev)
return 0;
}
static void mxsfb_shutdown(struct platform_device *pdev)
{
struct fb_info *fb_info = platform_get_drvdata(pdev);
struct mxsfb_info *host = to_imxfb_host(fb_info);
/*
* Force stop the LCD controller as keeping it running during reboot
* might interfere with the BootROM's boot mode pads sampling.
*/
writel(CTRL_RUN, host->base + LCDC_CTRL + REG_CLR);
}
static struct platform_device_id mxsfb_devtype[] = {
{
.name = "imx23-fb",
......@@ -905,6 +917,7 @@ MODULE_DEVICE_TABLE(platform, mxsfb_devtype);
static struct platform_driver mxsfb_driver = {
.probe = mxsfb_probe,
.remove = __devexit_p(mxsfb_remove),
.shutdown = mxsfb_shutdown,
.id_table = mxsfb_devtype,
.driver = {
.name = DRIVER_NAME,
......
......@@ -39,14 +39,6 @@ config FB_OMAP_LCD_MIPID
the Mobile Industry Processor Interface DBI-C/DCS
specification. (Supported LCDs: Philips LPH8923, Sharp LS041Y3)
config FB_OMAP_BOOTLOADER_INIT
bool "Check bootloader initialization"
depends on FB_OMAP
help
Say Y here if you want to enable checking if the bootloader has
already initialized the display controller. In this case the
driver will skip the initialization.
config FB_OMAP_CONSISTENT_DMA_SIZE
int "Consistent DMA memory size (MB)"
depends on FB_OMAP
......
......@@ -739,12 +739,6 @@ static void acx_panel_set_timings(struct omap_dss_device *dssdev,
}
}
static void acx_panel_get_timings(struct omap_dss_device *dssdev,
struct omap_video_timings *timings)
{
*timings = dssdev->panel.timings;
}
static int acx_panel_check_timings(struct omap_dss_device *dssdev,
struct omap_video_timings *timings)
{
......@@ -762,7 +756,6 @@ static struct omap_dss_driver acx_panel_driver = {
.resume = acx_panel_resume,
.set_timings = acx_panel_set_timings,
.get_timings = acx_panel_get_timings,
.check_timings = acx_panel_check_timings,
.get_recommended_bpp = acx_get_recommended_bpp,
......
......@@ -386,6 +386,106 @@ static struct panel_config generic_dpi_panels[] = {
.name = "innolux_at080tn52",
},
/* Mitsubishi AA084SB01 */
{
{
.x_res = 800,
.y_res = 600,
.pixel_clock = 40000,
.hsw = 1,
.hfp = 254,
.hbp = 1,
.vsw = 1,
.vfp = 26,
.vbp = 1,
},
.config = OMAP_DSS_LCD_TFT,
.name = "mitsubishi_aa084sb01",
},
/* EDT ET0500G0DH6 */
{
{
.x_res = 800,
.y_res = 480,
.pixel_clock = 33260,
.hsw = 128,
.hfp = 216,
.hbp = 40,
.vsw = 2,
.vfp = 35,
.vbp = 10,
},
.config = OMAP_DSS_LCD_TFT,
.name = "edt_et0500g0dh6",
},
/* Prime-View PD050VL1 */
{
{
.x_res = 640,
.y_res = 480,
.pixel_clock = 25000,
.hsw = 96,
.hfp = 18,
.hbp = 46,
.vsw = 2,
.vfp = 10,
.vbp = 33,
},
.config = OMAP_DSS_LCD_TFT | OMAP_DSS_LCD_IVS |
OMAP_DSS_LCD_IHS | OMAP_DSS_LCD_IPC,
.name = "primeview_pd050vl1",
},
/* Prime-View PM070WL4 */
{
{
.x_res = 800,
.y_res = 480,
.pixel_clock = 32000,
.hsw = 128,
.hfp = 42,
.hbp = 86,
.vsw = 2,
.vfp = 10,
.vbp = 33,
},
.config = OMAP_DSS_LCD_TFT | OMAP_DSS_LCD_IVS |
OMAP_DSS_LCD_IHS | OMAP_DSS_LCD_IPC,
.name = "primeview_pm070wl4",
},
/* Prime-View PD104SLF */
{
{
.x_res = 800,
.y_res = 600,
.pixel_clock = 40000,
.hsw = 128,
.hfp = 42,
.hbp = 86,
.vsw = 4,
.vfp = 1,
.vbp = 23,
},
.config = OMAP_DSS_LCD_TFT | OMAP_DSS_LCD_IVS |
OMAP_DSS_LCD_IHS | OMAP_DSS_LCD_IPC,
.name = "primeview_pd104slf",
},
};
struct panel_drv_data {
......@@ -549,12 +649,6 @@ static void generic_dpi_panel_set_timings(struct omap_dss_device *dssdev,
dpi_set_timings(dssdev, timings);
}
static void generic_dpi_panel_get_timings(struct omap_dss_device *dssdev,
struct omap_video_timings *timings)
{
*timings = dssdev->panel.timings;
}
static int generic_dpi_panel_check_timings(struct omap_dss_device *dssdev,
struct omap_video_timings *timings)
{
......@@ -571,7 +665,6 @@ static struct omap_dss_driver dpi_driver = {
.resume = generic_dpi_panel_resume,
.set_timings = generic_dpi_panel_set_timings,
.get_timings = generic_dpi_panel_get_timings,
.check_timings = generic_dpi_panel_check_timings,
.driver = {
......
......@@ -610,12 +610,6 @@ static int n8x0_panel_resume(struct omap_dss_device *dssdev)
return 0;
}
static void n8x0_panel_get_timings(struct omap_dss_device *dssdev,
struct omap_video_timings *timings)
{
*timings = dssdev->panel.timings;
}
static void n8x0_panel_get_resolution(struct omap_dss_device *dssdev,
u16 *xres, u16 *yres)
{
......@@ -678,8 +672,6 @@ static struct omap_dss_driver n8x0_panel_driver = {
.get_resolution = n8x0_panel_get_resolution,
.get_recommended_bpp = omapdss_default_get_recommended_bpp,
.get_timings = n8x0_panel_get_timings,
.driver = {
.name = "n8x0_panel",
.owner = THIS_MODULE,
......
......@@ -30,7 +30,6 @@
#include <linux/gpio.h>
#include <linux/workqueue.h>
#include <linux/slab.h>
#include <linux/regulator/consumer.h>
#include <linux/mutex.h>
#include <video/omapdss.h>
......@@ -55,73 +54,6 @@ static int _taal_enable_te(struct omap_dss_device *dssdev, bool enable);
static int taal_panel_reset(struct omap_dss_device *dssdev);
struct panel_regulator {
struct regulator *regulator;
const char *name;
int min_uV;
int max_uV;
};
static void free_regulators(struct panel_regulator *regulators, int n)
{
int i;
for (i = 0; i < n; i++) {
/* disable/put in reverse order */
regulator_disable(regulators[n - i - 1].regulator);
regulator_put(regulators[n - i - 1].regulator);
}
}
static int init_regulators(struct omap_dss_device *dssdev,
struct panel_regulator *regulators, int n)
{
int r, i, v;
for (i = 0; i < n; i++) {
struct regulator *reg;
reg = regulator_get(&dssdev->dev, regulators[i].name);
if (IS_ERR(reg)) {
dev_err(&dssdev->dev, "failed to get regulator %s\n",
regulators[i].name);
r = PTR_ERR(reg);
goto err;
}
/* FIXME: better handling of fixed vs. variable regulators */
v = regulator_get_voltage(reg);
if (v < regulators[i].min_uV || v > regulators[i].max_uV) {
r = regulator_set_voltage(reg, regulators[i].min_uV,
regulators[i].max_uV);
if (r) {
dev_err(&dssdev->dev,
"failed to set regulator %s voltage\n",
regulators[i].name);
regulator_put(reg);
goto err;
}
}
r = regulator_enable(reg);
if (r) {
dev_err(&dssdev->dev, "failed to enable regulator %s\n",
regulators[i].name);
regulator_put(reg);
goto err;
}
regulators[i].regulator = reg;
}
return 0;
err:
free_regulators(regulators, i);
return r;
}
/**
* struct panel_config - panel configuration
* @name: panel name
......@@ -150,8 +82,6 @@ struct panel_config {
unsigned int low;
} reset_sequence;
struct panel_regulator *regulators;
int num_regulators;
};
enum {
......@@ -577,12 +507,6 @@ static const struct backlight_ops taal_bl_ops = {
.update_status = taal_bl_update_status,
};
static void taal_get_timings(struct omap_dss_device *dssdev,
struct omap_video_timings *timings)
{
*timings = dssdev->panel.timings;
}
static void taal_get_resolution(struct omap_dss_device *dssdev,
u16 *xres, u16 *yres)
{
......@@ -977,11 +901,6 @@ static int taal_probe(struct omap_dss_device *dssdev)
atomic_set(&td->do_update, 0);
r = init_regulators(dssdev, panel_config->regulators,
panel_config->num_regulators);
if (r)
goto err_reg;
td->workqueue = create_singlethread_workqueue("taal_esd");
if (td->workqueue == NULL) {
dev_err(&dssdev->dev, "can't create ESD workqueue\n");
......@@ -1087,8 +1006,6 @@ static int taal_probe(struct omap_dss_device *dssdev)
err_rst_gpio:
destroy_workqueue(td->workqueue);
err_wq:
free_regulators(panel_config->regulators, panel_config->num_regulators);
err_reg:
kfree(td);
err:
return r;
......@@ -1125,9 +1042,6 @@ static void __exit taal_remove(struct omap_dss_device *dssdev)
/* reset, to be sure that the panel is in a valid state */
taal_hw_reset(dssdev);
free_regulators(td->panel_config->regulators,
td->panel_config->num_regulators);
if (gpio_is_valid(panel_data->reset_gpio))
gpio_free(panel_data->reset_gpio);
......@@ -1909,8 +1823,6 @@ static struct omap_dss_driver taal_driver = {
.run_test = taal_run_test,
.memory_read = taal_memory_read,
.get_timings = taal_get_timings,
.driver = {
.name = "taal",
.owner = THIS_MODULE,
......
......@@ -47,13 +47,9 @@ struct panel_drv_data {
struct mutex lock;
int pd_gpio;
};
static inline struct tfp410_platform_data
*get_pdata(const struct omap_dss_device *dssdev)
{
return dssdev->data;
}
struct i2c_adapter *i2c_adapter;
};
static int tfp410_power_on(struct omap_dss_device *dssdev)
{
......@@ -68,7 +64,7 @@ static int tfp410_power_on(struct omap_dss_device *dssdev)
goto err0;
if (gpio_is_valid(ddata->pd_gpio))
gpio_set_value(ddata->pd_gpio, 1);
gpio_set_value_cansleep(ddata->pd_gpio, 1);
return 0;
err0:
......@@ -83,18 +79,18 @@ static void tfp410_power_off(struct omap_dss_device *dssdev)
return;
if (gpio_is_valid(ddata->pd_gpio))
gpio_set_value(ddata->pd_gpio, 0);
gpio_set_value_cansleep(ddata->pd_gpio, 0);
omapdss_dpi_display_disable(dssdev);
}
static int tfp410_probe(struct omap_dss_device *dssdev)
{
struct tfp410_platform_data *pdata = get_pdata(dssdev);
struct panel_drv_data *ddata;
int r;
int i2c_bus_num;
ddata = kzalloc(sizeof(*ddata), GFP_KERNEL);
ddata = devm_kzalloc(&dssdev->dev, sizeof(*ddata), GFP_KERNEL);
if (!ddata)
return -ENOMEM;
......@@ -104,10 +100,15 @@ static int tfp410_probe(struct omap_dss_device *dssdev)
ddata->dssdev = dssdev;
mutex_init(&ddata->lock);
if (pdata)
if (dssdev->data) {
struct tfp410_platform_data *pdata = dssdev->data;
ddata->pd_gpio = pdata->power_down_gpio;
else
i2c_bus_num = pdata->i2c_bus_num;
} else {
ddata->pd_gpio = -1;
i2c_bus_num = -1;
}
if (gpio_is_valid(ddata->pd_gpio)) {
r = gpio_request_one(ddata->pd_gpio, GPIOF_OUT_INIT_LOW,
......@@ -115,13 +116,31 @@ static int tfp410_probe(struct omap_dss_device *dssdev)
if (r) {
dev_err(&dssdev->dev, "Failed to request PD GPIO %d\n",
ddata->pd_gpio);
ddata->pd_gpio = -1;
return r;
}
}
if (i2c_bus_num != -1) {
struct i2c_adapter *adapter;
adapter = i2c_get_adapter(i2c_bus_num);
if (!adapter) {
dev_err(&dssdev->dev, "Failed to get I2C adapter, bus %d\n",
i2c_bus_num);
r = -EINVAL;
goto err_i2c;
}
ddata->i2c_adapter = adapter;
}
dev_set_drvdata(&dssdev->dev, ddata);
return 0;
err_i2c:
if (gpio_is_valid(ddata->pd_gpio))
gpio_free(ddata->pd_gpio);
return r;
}
static void __exit tfp410_remove(struct omap_dss_device *dssdev)
......@@ -130,14 +149,15 @@ static void __exit tfp410_remove(struct omap_dss_device *dssdev)
mutex_lock(&ddata->lock);
if (ddata->i2c_adapter)
i2c_put_adapter(ddata->i2c_adapter);
if (gpio_is_valid(ddata->pd_gpio))
gpio_free(ddata->pd_gpio);
dev_set_drvdata(&dssdev->dev, NULL);
mutex_unlock(&ddata->lock);
kfree(ddata);
}
static int tfp410_enable(struct omap_dss_device *dssdev)
......@@ -269,27 +289,17 @@ static int tfp410_read_edid(struct omap_dss_device *dssdev,
u8 *edid, int len)
{
struct panel_drv_data *ddata = dev_get_drvdata(&dssdev->dev);
struct tfp410_platform_data *pdata = get_pdata(dssdev);
struct i2c_adapter *adapter;
int r, l, bytes_read;
mutex_lock(&ddata->lock);
if (pdata->i2c_bus_num == 0) {
if (!ddata->i2c_adapter) {
r = -ENODEV;
goto err;
}
adapter = i2c_get_adapter(pdata->i2c_bus_num);
if (!adapter) {
dev_err(&dssdev->dev, "Failed to get I2C adapter, bus %d\n",
pdata->i2c_bus_num);
r = -EINVAL;
goto err;
}
l = min(EDID_LENGTH, len);
r = tfp410_ddc_read(adapter, edid, l, 0);
r = tfp410_ddc_read(ddata->i2c_adapter, edid, l, 0);
if (r)
goto err;
......@@ -299,7 +309,7 @@ static int tfp410_read_edid(struct omap_dss_device *dssdev,
if (len > EDID_LENGTH && edid[0x7e] > 0) {
l = min(EDID_LENGTH, len - EDID_LENGTH);
r = tfp410_ddc_read(adapter, edid + EDID_LENGTH,
r = tfp410_ddc_read(ddata->i2c_adapter, edid + EDID_LENGTH,
l, EDID_LENGTH);
if (r)
goto err;
......@@ -319,21 +329,15 @@ static int tfp410_read_edid(struct omap_dss_device *dssdev,
static bool tfp410_detect(struct omap_dss_device *dssdev)
{
struct panel_drv_data *ddata = dev_get_drvdata(&dssdev->dev);
struct tfp410_platform_data *pdata = get_pdata(dssdev);
struct i2c_adapter *adapter;
unsigned char out;
int r;
mutex_lock(&ddata->lock);
if (pdata->i2c_bus_num == 0)
goto out;
adapter = i2c_get_adapter(pdata->i2c_bus_num);
if (!adapter)
if (!ddata->i2c_adapter)
goto out;
r = tfp410_ddc_read(adapter, &out, 1, 0);
r = tfp410_ddc_read(ddata->i2c_adapter, &out, 1, 0);
mutex_unlock(&ddata->lock);
......
......@@ -272,13 +272,16 @@ static const struct omap_video_timings tpo_td043_timings = {
static int tpo_td043_power_on(struct tpo_td043_device *tpo_td043)
{
int nreset_gpio = tpo_td043->nreset_gpio;
int r;
if (tpo_td043->powered_on)
return 0;
regulator_enable(tpo_td043->vcc_reg);
r = regulator_enable(tpo_td043->vcc_reg);
if (r != 0)
return r;
/* wait for regulator to stabilize */
/* wait for panel to stabilize */
msleep(160);
if (gpio_is_valid(nreset_gpio))
......@@ -470,6 +473,18 @@ static void tpo_td043_remove(struct omap_dss_device *dssdev)
gpio_free(nreset_gpio);
}
static void tpo_td043_set_timings(struct omap_dss_device *dssdev,
struct omap_video_timings *timings)
{
dpi_set_timings(dssdev, timings);
}
static int tpo_td043_check_timings(struct omap_dss_device *dssdev,
struct omap_video_timings *timings)
{
return dpi_check_timings(dssdev, timings);
}
static struct omap_dss_driver tpo_td043_driver = {
.probe = tpo_td043_probe,
.remove = tpo_td043_remove,
......@@ -481,6 +496,9 @@ static struct omap_dss_driver tpo_td043_driver = {
.set_mirror = tpo_td043_set_hmirror,
.get_mirror = tpo_td043_get_hmirror,
.set_timings = tpo_td043_set_timings,
.check_timings = tpo_td043_check_timings,
.driver = {
.name = "tpo_td043mtea1_panel",
.owner = THIS_MODULE,
......
......@@ -68,6 +68,10 @@ config OMAP4_DSS_HDMI
HDMI Interface. This adds the High Definition Multimedia Interface.
See http://www.hdmi.org/ for HDMI specification.
config OMAP4_DSS_HDMI_AUDIO
bool
depends on OMAP4_DSS_HDMI
config OMAP2_DSS_SDI
bool "SDI support"
depends on ARCH_OMAP3
......@@ -90,15 +94,6 @@ config OMAP2_DSS_DSI
See http://www.mipi.org/ for DSI spesifications.
config OMAP2_DSS_FAKE_VSYNC
bool "Fake VSYNC irq from manual update displays"
default n
help
If this is selected, DSI will generate a fake DISPC VSYNC interrupt
when DSI has sent a frame. This is only needed with DSI or RFBI
displays using manual mode, and you want VSYNC to, for example,
time animation.
config OMAP2_DSS_MIN_FCK_PER_PCK
int "Minimum FCK/PCK ratio (for scaling)"
range 0 32
......
......@@ -99,6 +99,11 @@ struct mgr_priv_data {
/* If true, a display is enabled using this manager */
bool enabled;
bool extra_info_dirty;
bool shadow_extra_info_dirty;
struct omap_video_timings timings;
};
static struct {
......@@ -176,7 +181,7 @@ static bool mgr_manual_update(struct omap_overlay_manager *mgr)
}
static int dss_check_settings_low(struct omap_overlay_manager *mgr,
struct omap_dss_device *dssdev, bool applying)
bool applying)
{
struct omap_overlay_info *oi;
struct omap_overlay_manager_info *mi;
......@@ -187,6 +192,9 @@ static int dss_check_settings_low(struct omap_overlay_manager *mgr,
mp = get_mgr_priv(mgr);
if (!mp->enabled)
return 0;
if (applying && mp->user_info_dirty)
mi = &mp->user_info;
else
......@@ -206,26 +214,24 @@ static int dss_check_settings_low(struct omap_overlay_manager *mgr,
ois[ovl->id] = oi;
}
return dss_mgr_check(mgr, dssdev, mi, ois);
return dss_mgr_check(mgr, mi, &mp->timings, ois);
}
/*
* check manager and overlay settings using overlay_info from data->info
*/
static int dss_check_settings(struct omap_overlay_manager *mgr,
struct omap_dss_device *dssdev)
static int dss_check_settings(struct omap_overlay_manager *mgr)
{
return dss_check_settings_low(mgr, dssdev, false);
return dss_check_settings_low(mgr, false);
}
/*
* check manager and overlay settings using overlay_info from ovl->info if
* dirty and from data->info otherwise
*/
static int dss_check_settings_apply(struct omap_overlay_manager *mgr,
struct omap_dss_device *dssdev)
static int dss_check_settings_apply(struct omap_overlay_manager *mgr)
{
return dss_check_settings_low(mgr, dssdev, true);
return dss_check_settings_low(mgr, true);
}
static bool need_isr(void)
......@@ -261,6 +267,20 @@ static bool need_isr(void)
if (mp->shadow_info_dirty)
return true;
/*
* NOTE: we don't check extra_info flags for disabled
* managers, once the manager is enabled, the extra_info
* related manager changes will be taken in by HW.
*/
/* to write new values to registers */
if (mp->extra_info_dirty)
return true;
/* to set GO bit */
if (mp->shadow_extra_info_dirty)
return true;
list_for_each_entry(ovl, &mgr->overlays, list) {
struct ovl_priv_data *op;
......@@ -305,7 +325,7 @@ static bool need_go(struct omap_overlay_manager *mgr)
mp = get_mgr_priv(mgr);
if (mp->shadow_info_dirty)
if (mp->shadow_info_dirty || mp->shadow_extra_info_dirty)
return true;
list_for_each_entry(ovl, &mgr->overlays, list) {
......@@ -320,20 +340,16 @@ static bool need_go(struct omap_overlay_manager *mgr)
/* returns true if an extra_info field is currently being updated */
static bool extra_info_update_ongoing(void)
{
const int num_ovls = omap_dss_get_num_overlays();
struct ovl_priv_data *op;
struct omap_overlay *ovl;
struct mgr_priv_data *mp;
const int num_mgrs = dss_feat_get_num_mgrs();
int i;
for (i = 0; i < num_ovls; ++i) {
ovl = omap_dss_get_overlay(i);
op = get_ovl_priv(ovl);
if (!ovl->manager)
continue;
for (i = 0; i < num_mgrs; ++i) {
struct omap_overlay_manager *mgr;
struct omap_overlay *ovl;
struct mgr_priv_data *mp;
mp = get_mgr_priv(ovl->manager);
mgr = omap_dss_get_overlay_manager(i);
mp = get_mgr_priv(mgr);
if (!mp->enabled)
continue;
......@@ -341,8 +357,15 @@ static bool extra_info_update_ongoing(void)
if (!mp->updating)
continue;
if (op->extra_info_dirty || op->shadow_extra_info_dirty)
if (mp->extra_info_dirty || mp->shadow_extra_info_dirty)
return true;
list_for_each_entry(ovl, &mgr->overlays, list) {
struct ovl_priv_data *op = get_ovl_priv(ovl);
if (op->extra_info_dirty || op->shadow_extra_info_dirty)
return true;
}
}
return false;
......@@ -525,11 +548,13 @@ static void dss_ovl_write_regs(struct omap_overlay *ovl)
oi = &op->info;
mp = get_mgr_priv(ovl->manager);
replication = dss_use_replication(ovl->manager->device, oi->color_mode);
ilace = ovl->manager->device->type == OMAP_DISPLAY_TYPE_VENC;
r = dispc_ovl_setup(ovl->id, oi, ilace, replication);
r = dispc_ovl_setup(ovl->id, oi, ilace, replication, &mp->timings);
if (r) {
/*
* We can't do much here, as this function can be called from
......@@ -543,8 +568,6 @@ static void dss_ovl_write_regs(struct omap_overlay *ovl)
return;
}
mp = get_mgr_priv(ovl->manager);
op->info_dirty = false;
if (mp->updating)
op->shadow_info_dirty = true;
......@@ -601,6 +624,22 @@ static void dss_mgr_write_regs(struct omap_overlay_manager *mgr)
}
}
static void dss_mgr_write_regs_extra(struct omap_overlay_manager *mgr)
{
struct mgr_priv_data *mp = get_mgr_priv(mgr);
DSSDBGF("%d", mgr->id);
if (!mp->extra_info_dirty)
return;
dispc_mgr_set_timings(mgr->id, &mp->timings);
mp->extra_info_dirty = false;
if (mp->updating)
mp->shadow_extra_info_dirty = true;
}
static void dss_write_regs_common(void)
{
const int num_mgrs = omap_dss_get_num_overlay_managers();
......@@ -646,7 +685,7 @@ static void dss_write_regs(void)
if (!mp->enabled || mgr_manual_update(mgr) || mp->busy)
continue;
r = dss_check_settings(mgr, mgr->device);
r = dss_check_settings(mgr);
if (r) {
DSSERR("cannot write registers for manager %s: "
"illegal configuration\n", mgr->name);
......@@ -654,6 +693,7 @@ static void dss_write_regs(void)
}
dss_mgr_write_regs(mgr);
dss_mgr_write_regs_extra(mgr);
}
}
......@@ -693,6 +733,7 @@ static void mgr_clear_shadow_dirty(struct omap_overlay_manager *mgr)
mp = get_mgr_priv(mgr);
mp->shadow_info_dirty = false;
mp->shadow_extra_info_dirty = false;
list_for_each_entry(ovl, &mgr->overlays, list) {
op = get_ovl_priv(ovl);
......@@ -711,7 +752,7 @@ void dss_mgr_start_update(struct omap_overlay_manager *mgr)
WARN_ON(mp->updating);
r = dss_check_settings(mgr, mgr->device);
r = dss_check_settings(mgr);
if (r) {
DSSERR("cannot start manual update: illegal configuration\n");
spin_unlock_irqrestore(&data_lock, flags);
......@@ -719,6 +760,7 @@ void dss_mgr_start_update(struct omap_overlay_manager *mgr)
}
dss_mgr_write_regs(mgr);
dss_mgr_write_regs_extra(mgr);
dss_write_regs_common();
......@@ -857,7 +899,7 @@ int omap_dss_mgr_apply(struct omap_overlay_manager *mgr)
spin_lock_irqsave(&data_lock, flags);
r = dss_check_settings_apply(mgr, mgr->device);
r = dss_check_settings_apply(mgr);
if (r) {
spin_unlock_irqrestore(&data_lock, flags);
DSSERR("failed to apply settings: illegal configuration.\n");
......@@ -918,16 +960,13 @@ static void dss_ovl_setup_fifo(struct omap_overlay *ovl,
bool use_fifo_merge)
{
struct ovl_priv_data *op = get_ovl_priv(ovl);
struct omap_dss_device *dssdev;
u32 fifo_low, fifo_high;
if (!op->enabled && !op->enabling)
return;
dssdev = ovl->manager->device;
dispc_ovl_compute_fifo_thresholds(ovl->id, &fifo_low, &fifo_high,
use_fifo_merge);
use_fifo_merge, ovl_manual_update(ovl));
dss_apply_ovl_fifo_thresholds(ovl, fifo_low, fifo_high);
}
......@@ -1050,7 +1089,7 @@ int dss_mgr_enable(struct omap_overlay_manager *mgr)
mp->enabled = true;
r = dss_check_settings(mgr, mgr->device);
r = dss_check_settings(mgr);
if (r) {
DSSERR("failed to enable manager %d: check_settings failed\n",
mgr->id);
......@@ -1225,6 +1264,35 @@ int dss_mgr_unset_device(struct omap_overlay_manager *mgr)
return r;
}
static void dss_apply_mgr_timings(struct omap_overlay_manager *mgr,
struct omap_video_timings *timings)
{
struct mgr_priv_data *mp = get_mgr_priv(mgr);
mp->timings = *timings;
mp->extra_info_dirty = true;
}
void dss_mgr_set_timings(struct omap_overlay_manager *mgr,
struct omap_video_timings *timings)
{
unsigned long flags;
mutex_lock(&apply_lock);
spin_lock_irqsave(&data_lock, flags);
dss_apply_mgr_timings(mgr, timings);
dss_write_regs();
dss_set_go_bits();
spin_unlock_irqrestore(&data_lock, flags);
wait_pending_extra_info_updates();
mutex_unlock(&apply_lock);
}
int dss_ovl_set_info(struct omap_overlay *ovl,
struct omap_overlay_info *info)
......@@ -1393,7 +1461,7 @@ int dss_ovl_enable(struct omap_overlay *ovl)
op->enabling = true;
r = dss_check_settings(ovl->manager, ovl->manager->device);
r = dss_check_settings(ovl->manager);
if (r) {
DSSERR("failed to enable overlay %d: check_settings failed\n",
ovl->id);
......
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