Commit 80a977e7 authored by Michal Kosiarz's avatar Michal Kosiarz Committed by Jeff Kirsher

i40e/i40evf: Reset Head and Tail on AQ initialization

Reset head and tail on admin queue initialization where H/T are
not reset by HW.

Change-ID: I6db8a2dd3f05ce66410a92cce016191add04760e
Signed-off-by: default avatarMichal Kosiarz <michal.kosiarz@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
parent 407e063c
...@@ -296,6 +296,10 @@ static i40e_status i40e_config_asq_regs(struct i40e_hw *hw) ...@@ -296,6 +296,10 @@ static i40e_status i40e_config_asq_regs(struct i40e_hw *hw)
i40e_status ret_code = 0; i40e_status ret_code = 0;
u32 reg = 0; u32 reg = 0;
/* Clear Head and Tail */
wr32(hw, hw->aq.asq.head, 0);
wr32(hw, hw->aq.asq.tail, 0);
if (hw->mac.type == I40E_MAC_VF) { if (hw->mac.type == I40E_MAC_VF) {
/* configure the transmit queue */ /* configure the transmit queue */
wr32(hw, I40E_VF_ATQBAH1, wr32(hw, I40E_VF_ATQBAH1,
...@@ -334,6 +338,10 @@ static i40e_status i40e_config_arq_regs(struct i40e_hw *hw) ...@@ -334,6 +338,10 @@ static i40e_status i40e_config_arq_regs(struct i40e_hw *hw)
i40e_status ret_code = 0; i40e_status ret_code = 0;
u32 reg = 0; u32 reg = 0;
/* Clear Head and Tail */
wr32(hw, hw->aq.arq.head, 0);
wr32(hw, hw->aq.arq.tail, 0);
if (hw->mac.type == I40E_MAC_VF) { if (hw->mac.type == I40E_MAC_VF) {
/* configure the receive queue */ /* configure the receive queue */
wr32(hw, I40E_VF_ARQBAH1, wr32(hw, I40E_VF_ARQBAH1,
...@@ -677,6 +685,10 @@ static u16 i40e_clean_asq(struct i40e_hw *hw) ...@@ -677,6 +685,10 @@ static u16 i40e_clean_asq(struct i40e_hw *hw)
desc = I40E_ADMINQ_DESC(*asq, ntc); desc = I40E_ADMINQ_DESC(*asq, ntc);
details = I40E_ADMINQ_DETAILS(*asq, ntc); details = I40E_ADMINQ_DETAILS(*asq, ntc);
while (rd32(hw, hw->aq.asq.head) != ntc) { while (rd32(hw, hw->aq.asq.head) != ntc) {
i40e_debug(hw, I40E_DEBUG_AQ_MESSAGE,
"%s: ntc %d head %d.\n", __func__, ntc,
rd32(hw, hw->aq.asq.head));
if (details->callback) { if (details->callback) {
I40E_ADMINQ_CALLBACK cb_func = I40E_ADMINQ_CALLBACK cb_func =
(I40E_ADMINQ_CALLBACK)details->callback; (I40E_ADMINQ_CALLBACK)details->callback;
...@@ -736,6 +748,15 @@ i40e_status i40e_asq_send_command(struct i40e_hw *hw, ...@@ -736,6 +748,15 @@ i40e_status i40e_asq_send_command(struct i40e_hw *hw,
struct i40e_aq_desc *desc_on_ring; struct i40e_aq_desc *desc_on_ring;
bool cmd_completed = false; bool cmd_completed = false;
u16 retval = 0; u16 retval = 0;
u32 val = 0;
val = rd32(hw, hw->aq.asq.head);
if (val >= hw->aq.num_asq_entries) {
i40e_debug(hw, I40E_DEBUG_AQ_MESSAGE,
"AQTX: head overrun at %d\n", val);
status = I40E_ERR_QUEUE_EMPTY;
goto asq_send_command_exit;
}
if (hw->aq.asq.count == 0) { if (hw->aq.asq.count == 0) {
i40e_debug(hw, I40E_DEBUG_AQ_MESSAGE, i40e_debug(hw, I40E_DEBUG_AQ_MESSAGE,
......
...@@ -294,6 +294,10 @@ static i40e_status i40e_config_asq_regs(struct i40e_hw *hw) ...@@ -294,6 +294,10 @@ static i40e_status i40e_config_asq_regs(struct i40e_hw *hw)
i40e_status ret_code = 0; i40e_status ret_code = 0;
u32 reg = 0; u32 reg = 0;
/* Clear Head and Tail */
wr32(hw, hw->aq.asq.head, 0);
wr32(hw, hw->aq.asq.tail, 0);
if (hw->mac.type == I40E_MAC_VF) { if (hw->mac.type == I40E_MAC_VF) {
/* configure the transmit queue */ /* configure the transmit queue */
wr32(hw, I40E_VF_ATQBAH1, wr32(hw, I40E_VF_ATQBAH1,
...@@ -332,6 +336,10 @@ static i40e_status i40e_config_arq_regs(struct i40e_hw *hw) ...@@ -332,6 +336,10 @@ static i40e_status i40e_config_arq_regs(struct i40e_hw *hw)
i40e_status ret_code = 0; i40e_status ret_code = 0;
u32 reg = 0; u32 reg = 0;
/* Clear Head and Tail */
wr32(hw, hw->aq.arq.head, 0);
wr32(hw, hw->aq.arq.tail, 0);
if (hw->mac.type == I40E_MAC_VF) { if (hw->mac.type == I40E_MAC_VF) {
/* configure the receive queue */ /* configure the receive queue */
wr32(hw, I40E_VF_ARQBAH1, wr32(hw, I40E_VF_ARQBAH1,
...@@ -630,6 +638,10 @@ static u16 i40e_clean_asq(struct i40e_hw *hw) ...@@ -630,6 +638,10 @@ static u16 i40e_clean_asq(struct i40e_hw *hw)
desc = I40E_ADMINQ_DESC(*asq, ntc); desc = I40E_ADMINQ_DESC(*asq, ntc);
details = I40E_ADMINQ_DETAILS(*asq, ntc); details = I40E_ADMINQ_DETAILS(*asq, ntc);
while (rd32(hw, hw->aq.asq.head) != ntc) { while (rd32(hw, hw->aq.asq.head) != ntc) {
i40e_debug(hw, I40E_DEBUG_AQ_MESSAGE,
"%s: ntc %d head %d.\n", __func__, ntc,
rd32(hw, hw->aq.asq.head));
if (details->callback) { if (details->callback) {
I40E_ADMINQ_CALLBACK cb_func = I40E_ADMINQ_CALLBACK cb_func =
(I40E_ADMINQ_CALLBACK)details->callback; (I40E_ADMINQ_CALLBACK)details->callback;
...@@ -690,6 +702,15 @@ i40e_status i40evf_asq_send_command(struct i40e_hw *hw, ...@@ -690,6 +702,15 @@ i40e_status i40evf_asq_send_command(struct i40e_hw *hw,
struct i40e_aq_desc *desc_on_ring; struct i40e_aq_desc *desc_on_ring;
bool cmd_completed = false; bool cmd_completed = false;
u16 retval = 0; u16 retval = 0;
u32 val = 0;
val = rd32(hw, hw->aq.asq.head);
if (val >= hw->aq.num_asq_entries) {
i40e_debug(hw, I40E_DEBUG_AQ_MESSAGE,
"AQTX: head overrun at %d\n", val);
status = I40E_ERR_QUEUE_EMPTY;
goto asq_send_command_exit;
}
if (hw->aq.asq.count == 0) { if (hw->aq.asq.count == 0) {
i40e_debug(hw, I40E_DEBUG_AQ_MESSAGE, i40e_debug(hw, I40E_DEBUG_AQ_MESSAGE,
......
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