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Commit 80b8bedf authored by Linus Torvalds's avatar Linus Torvalds
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Merge bk://bart.bkbits.net/ide-2.6 

into ppc970.osdl.org:/home/torvalds/v2.6/linux
parents 1581782e 7778727a
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Showing with 1131 additions and 1396 deletions
drivers/ide/ide-lib.c
View file @ 80b8bedf
......@@ -570,6 +570,7 @@ static u8 ide_dump_atapi_status(ide_drive_t *drive, const char *msg, u8 stat)
atapi_error_t error;
status.all = stat;
error.all = 0;
local_irq_set(flags);
printk("%s: %s: status=0x%02x { ", drive->name, msg, stat);
if (status.b.bsy)
......@@ -584,7 +585,7 @@ static u8 ide_dump_atapi_status(ide_drive_t *drive, const char *msg, u8 stat)
if (status.b.check) printk("Error ");
}
printk("}\n");
if ((status.all & (status.b.bsy|status.b.check)) == status.b.check) {
if (status.b.check && !status.b.bsy) {
error.all = HWIF(drive)->INB(IDE_ERROR_REG);
printk("%s: %s: error=0x%02x { ", drive->name, msg, error.all);
if (error.b.ili) printk("IllegalLengthIndication ");
......
drivers/ide/ide-probe.c
View file @ 80b8bedf
......@@ -1248,8 +1248,9 @@ static int hwif_init(ide_hwif_t *hwif)
{
int old_irq, unit;
/* Return success if no device is connected */
if (!hwif->present)
return 0;
return 1;
if (!hwif->irq) {
if (!(hwif->irq = ide_default_irq(hwif->io_ports[IDE_DATA_OFFSET])))
......
drivers/ide/pci/aec62xx.c
View file @ 80b8bedf
......@@ -16,7 +16,54 @@
#include <asm/io.h>
#include "aec62xx.h"
struct chipset_bus_clock_list_entry {
u8 xfer_speed;
u8 chipset_settings;
u8 ultra_settings;
};
static struct chipset_bus_clock_list_entry aec6xxx_33_base [] = {
{ XFER_UDMA_6, 0x31, 0x07 },
{ XFER_UDMA_5, 0x31, 0x06 },
{ XFER_UDMA_4, 0x31, 0x05 },
{ XFER_UDMA_3, 0x31, 0x04 },
{ XFER_UDMA_2, 0x31, 0x03 },
{ XFER_UDMA_1, 0x31, 0x02 },
{ XFER_UDMA_0, 0x31, 0x01 },
{ XFER_MW_DMA_2, 0x31, 0x00 },
{ XFER_MW_DMA_1, 0x31, 0x00 },
{ XFER_MW_DMA_0, 0x0a, 0x00 },
{ XFER_PIO_4, 0x31, 0x00 },
{ XFER_PIO_3, 0x33, 0x00 },
{ XFER_PIO_2, 0x08, 0x00 },
{ XFER_PIO_1, 0x0a, 0x00 },
{ XFER_PIO_0, 0x00, 0x00 },
{ 0, 0x00, 0x00 }
};
static struct chipset_bus_clock_list_entry aec6xxx_34_base [] = {
{ XFER_UDMA_6, 0x41, 0x06 },
{ XFER_UDMA_5, 0x41, 0x05 },
{ XFER_UDMA_4, 0x41, 0x04 },
{ XFER_UDMA_3, 0x41, 0x03 },
{ XFER_UDMA_2, 0x41, 0x02 },
{ XFER_UDMA_1, 0x41, 0x01 },
{ XFER_UDMA_0, 0x41, 0x01 },
{ XFER_MW_DMA_2, 0x41, 0x00 },
{ XFER_MW_DMA_1, 0x42, 0x00 },
{ XFER_MW_DMA_0, 0x7a, 0x00 },
{ XFER_PIO_4, 0x41, 0x00 },
{ XFER_PIO_3, 0x43, 0x00 },
{ XFER_PIO_2, 0x78, 0x00 },
{ XFER_PIO_1, 0x7a, 0x00 },
{ XFER_PIO_0, 0x70, 0x00 },
{ 0, 0x00, 0x00 }
};
#define BUSCLOCK(D) \
((struct chipset_bus_clock_list_entry *) pci_get_drvdata((D)))
#if 0
if (dev->device == PCI_DEVICE_ID_ARTOP_ATP850UF) {
......@@ -101,8 +148,7 @@ static int aec6210_tune_chipset (ide_drive_t *drive, u8 xferspeed)
/* 0x40|(2*drive->dn): Active, 0x41|(2*drive->dn): Recovery */
pci_read_config_word(dev, 0x40|(2*drive->dn), &d_conf);
tmp0 = pci_bus_clock_list(speed, BUSCLOCK(dev));
SPLIT_BYTE(tmp0,tmp1,tmp2);
MAKE_WORD(d_conf,tmp1,tmp2);
d_conf = ((tmp0 & 0xf0) << 4) | (tmp0 & 0xf);
pci_write_config_word(dev, 0x40|(2*drive->dn), d_conf);
tmp1 = 0x00;
......@@ -343,6 +389,58 @@ static int __devinit init_setup_aec6x80(struct pci_dev *dev, ide_pci_device_t *d
return ide_setup_pci_device(dev, d);
}
static ide_pci_device_t aec62xx_chipsets[] __devinitdata = {
{ /* 0 */
.name = "AEC6210",
.init_setup = init_setup_aec62xx,
.init_chipset = init_chipset_aec62xx,
.init_hwif = init_hwif_aec62xx,
.init_dma = init_dma_aec62xx,
.channels = 2,
.autodma = AUTODMA,
.enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
.bootable = OFF_BOARD,
},{ /* 1 */
.name = "AEC6260",
.init_setup = init_setup_aec62xx,
.init_chipset = init_chipset_aec62xx,
.init_hwif = init_hwif_aec62xx,
.init_dma = init_dma_aec62xx,
.channels = 2,
.autodma = NOAUTODMA,
.bootable = OFF_BOARD,
},{ /* 2 */
.name = "AEC6260R",
.init_setup = init_setup_aec62xx,
.init_chipset = init_chipset_aec62xx,
.init_hwif = init_hwif_aec62xx,
.init_dma = init_dma_aec62xx,
.channels = 2,
.autodma = AUTODMA,
.enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
.bootable = NEVER_BOARD,
},{ /* 3 */
.name = "AEC6X80",
.init_setup = init_setup_aec6x80,
.init_chipset = init_chipset_aec62xx,
.init_hwif = init_hwif_aec62xx,
.init_dma = init_dma_aec62xx,
.channels = 2,
.autodma = AUTODMA,
.bootable = OFF_BOARD,
},{ /* 4 */
.name = "AEC6X80R",
.init_setup = init_setup_aec6x80,
.init_chipset = init_chipset_aec62xx,
.init_hwif = init_hwif_aec62xx,
.init_dma = init_dma_aec62xx,
.channels = 2,
.autodma = AUTODMA,
.enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
.bootable = OFF_BOARD,
}
};
/**
* aec62xx_init_one - called when a AEC is found
* @dev: the aec62xx device
......
drivers/ide/pci/aec62xx.h deleted 100644 → 0
View file @ 1581782e
#ifndef AEC62XX_H
#define AEC62XX_H
#include <linux/config.h>
#include <linux/pci.h>
#include <linux/ide.h>
struct chipset_bus_clock_list_entry {
byte xfer_speed;
byte chipset_settings;
byte ultra_settings;
};
static struct chipset_bus_clock_list_entry aec6xxx_33_base [] = {
{ XFER_UDMA_6, 0x31, 0x07 },
{ XFER_UDMA_5, 0x31, 0x06 },
{ XFER_UDMA_4, 0x31, 0x05 },
{ XFER_UDMA_3, 0x31, 0x04 },
{ XFER_UDMA_2, 0x31, 0x03 },
{ XFER_UDMA_1, 0x31, 0x02 },
{ XFER_UDMA_0, 0x31, 0x01 },
{ XFER_MW_DMA_2, 0x31, 0x00 },
{ XFER_MW_DMA_1, 0x31, 0x00 },
{ XFER_MW_DMA_0, 0x0a, 0x00 },
{ XFER_PIO_4, 0x31, 0x00 },
{ XFER_PIO_3, 0x33, 0x00 },
{ XFER_PIO_2, 0x08, 0x00 },
{ XFER_PIO_1, 0x0a, 0x00 },
{ XFER_PIO_0, 0x00, 0x00 },
{ 0, 0x00, 0x00 }
};
static struct chipset_bus_clock_list_entry aec6xxx_34_base [] = {
{ XFER_UDMA_6, 0x41, 0x06 },
{ XFER_UDMA_5, 0x41, 0x05 },
{ XFER_UDMA_4, 0x41, 0x04 },
{ XFER_UDMA_3, 0x41, 0x03 },
{ XFER_UDMA_2, 0x41, 0x02 },
{ XFER_UDMA_1, 0x41, 0x01 },
{ XFER_UDMA_0, 0x41, 0x01 },
{ XFER_MW_DMA_2, 0x41, 0x00 },
{ XFER_MW_DMA_1, 0x42, 0x00 },
{ XFER_MW_DMA_0, 0x7a, 0x00 },
{ XFER_PIO_4, 0x41, 0x00 },
{ XFER_PIO_3, 0x43, 0x00 },
{ XFER_PIO_2, 0x78, 0x00 },
{ XFER_PIO_1, 0x7a, 0x00 },
{ XFER_PIO_0, 0x70, 0x00 },
{ 0, 0x00, 0x00 }
};
#ifndef SPLIT_BYTE
#define SPLIT_BYTE(B,H,L) ((H)=(B>>4), (L)=(B-((B>>4)<<4)))
#endif
#ifndef MAKE_WORD
#define MAKE_WORD(W,HB,LB) ((W)=((HB<<8)+LB))
#endif
#define BUSCLOCK(D) \
((struct chipset_bus_clock_list_entry *) pci_get_drvdata((D)))
static int init_setup_aec6x80(struct pci_dev *, ide_pci_device_t *);
static int init_setup_aec62xx(struct pci_dev *, ide_pci_device_t *);
static unsigned int init_chipset_aec62xx(struct pci_dev *, const char *);
static void init_hwif_aec62xx(ide_hwif_t *);
static void init_dma_aec62xx(ide_hwif_t *, unsigned long);
static ide_pci_device_t aec62xx_chipsets[] __devinitdata = {
{ /* 0 */
.name = "AEC6210",
.init_setup = init_setup_aec62xx,
.init_chipset = init_chipset_aec62xx,
.init_hwif = init_hwif_aec62xx,
.init_dma = init_dma_aec62xx,
.channels = 2,
.autodma = AUTODMA,
.enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
.bootable = OFF_BOARD,
},{ /* 1 */
.name = "AEC6260",
.init_setup = init_setup_aec62xx,
.init_chipset = init_chipset_aec62xx,
.init_hwif = init_hwif_aec62xx,
.init_dma = init_dma_aec62xx,
.channels = 2,
.autodma = NOAUTODMA,
.bootable = OFF_BOARD,
},{ /* 2 */
.name = "AEC6260R",
.init_setup = init_setup_aec62xx,
.init_chipset = init_chipset_aec62xx,
.init_hwif = init_hwif_aec62xx,
.init_dma = init_dma_aec62xx,
.channels = 2,
.autodma = AUTODMA,
.enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
.bootable = NEVER_BOARD,
},{ /* 3 */
.name = "AEC6X80",
.init_setup = init_setup_aec6x80,
.init_chipset = init_chipset_aec62xx,
.init_hwif = init_hwif_aec62xx,
.init_dma = init_dma_aec62xx,
.channels = 2,
.autodma = AUTODMA,
.bootable = OFF_BOARD,
},{ /* 4 */
.name = "AEC6X80R",
.init_setup = init_setup_aec6x80,
.init_chipset = init_chipset_aec62xx,
.init_hwif = init_hwif_aec62xx,
.init_dma = init_dma_aec62xx,
.channels = 2,
.autodma = AUTODMA,
.enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
.bootable = OFF_BOARD,
}
};
#endif /* AEC62XX_H */
drivers/ide/pci/cmd64x.c
View file @ 80b8bedf
......@@ -25,7 +25,56 @@
#include <asm/io.h>
#include "cmd64x.h"
#define DISPLAY_CMD64X_TIMINGS
#define CMD_DEBUG 0
#if CMD_DEBUG
#define cmdprintk(x...) printk(x)
#else
#define cmdprintk(x...)
#endif
/*
* CMD64x specific registers definition.
*/
#define CFR 0x50
#define CFR_INTR_CH0 0x02
#define CNTRL 0x51
#define CNTRL_DIS_RA0 0x40
#define CNTRL_DIS_RA1 0x80
#define CNTRL_ENA_2ND 0x08
#define CMDTIM 0x52
#define ARTTIM0 0x53
#define DRWTIM0 0x54
#define ARTTIM1 0x55
#define DRWTIM1 0x56
#define ARTTIM23 0x57
#define ARTTIM23_DIS_RA2 0x04
#define ARTTIM23_DIS_RA3 0x08
#define ARTTIM23_INTR_CH1 0x10
#define ARTTIM2 0x57
#define ARTTIM3 0x57
#define DRWTIM23 0x58
#define DRWTIM2 0x58
#define BRST 0x59
#define DRWTIM3 0x5b
#define BMIDECR0 0x70
#define MRDMODE 0x71
#define MRDMODE_INTR_CH0 0x04
#define MRDMODE_INTR_CH1 0x08
#define MRDMODE_BLK_CH0 0x10
#define MRDMODE_BLK_CH1 0x20
#define BMIDESR0 0x72
#define UDIDETCR0 0x73
#define DTPR0 0x74
#define BMIDECR1 0x78
#define BMIDECSR 0x79
#define BMIDESR1 0x7A
#define UDIDETCR1 0x7B
#define DTPR1 0x7C
#if defined(DISPLAY_CMD64X_TIMINGS) && defined(CONFIG_PROC_FS)
#include <linux/stat.h>
......@@ -707,6 +756,39 @@ static void __devinit init_hwif_cmd64x(ide_hwif_t *hwif)
hwif->drives[1].autodma = hwif->autodma;
}
static ide_pci_device_t cmd64x_chipsets[] __devinitdata = {
{ /* 0 */
.name = "CMD643",
.init_chipset = init_chipset_cmd64x,
.init_hwif = init_hwif_cmd64x,
.channels = 2,
.autodma = AUTODMA,
.bootable = ON_BOARD,
},{ /* 1 */
.name = "CMD646",
.init_chipset = init_chipset_cmd64x,
.init_hwif = init_hwif_cmd64x,
.channels = 2,
.autodma = AUTODMA,
.enablebits = {{0x00,0x00,0x00}, {0x51,0x80,0x80}},
.bootable = ON_BOARD,
},{ /* 2 */
.name = "CMD648",
.init_chipset = init_chipset_cmd64x,
.init_hwif = init_hwif_cmd64x,
.channels = 2,
.autodma = AUTODMA,
.bootable = ON_BOARD,
},{ /* 3 */
.name = "CMD649",
.init_chipset = init_chipset_cmd64x,
.init_hwif = init_hwif_cmd64x,
.channels = 2,
.autodma = AUTODMA,
.bootable = ON_BOARD,
}
};
static int __devinit cmd64x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
{
return ide_setup_pci_device(dev, &cmd64x_chipsets[id->driver_data]);
......
drivers/ide/pci/cmd64x.h deleted 100644 → 0
View file @ 1581782e
#ifndef CMD64X_H
#define CMD64X_H
#include <linux/config.h>
#include <linux/pci.h>
#include <linux/ide.h>
#define DISPLAY_CMD64X_TIMINGS
#define CMD_DEBUG 0
#if CMD_DEBUG
#define cmdprintk(x...) printk(x)
#else
#define cmdprintk(x...)
#endif
/*
* CMD64x specific registers definition.
*/
#define CFR 0x50
#define CFR_INTR_CH0 0x02
#define CNTRL 0x51
#define CNTRL_DIS_RA0 0x40
#define CNTRL_DIS_RA1 0x80
#define CNTRL_ENA_2ND 0x08
#define CMDTIM 0x52
#define ARTTIM0 0x53
#define DRWTIM0 0x54
#define ARTTIM1 0x55
#define DRWTIM1 0x56
#define ARTTIM23 0x57
#define ARTTIM23_DIS_RA2 0x04
#define ARTTIM23_DIS_RA3 0x08
#define ARTTIM23_INTR_CH1 0x10
#define ARTTIM2 0x57
#define ARTTIM3 0x57
#define DRWTIM23 0x58
#define DRWTIM2 0x58
#define BRST 0x59
#define DRWTIM3 0x5b
#define BMIDECR0 0x70
#define MRDMODE 0x71
#define MRDMODE_INTR_CH0 0x04
#define MRDMODE_INTR_CH1 0x08
#define MRDMODE_BLK_CH0 0x10
#define MRDMODE_BLK_CH1 0x20
#define BMIDESR0 0x72
#define UDIDETCR0 0x73
#define DTPR0 0x74
#define BMIDECR1 0x78
#define BMIDECSR 0x79
#define BMIDESR1 0x7A
#define UDIDETCR1 0x7B
#define DTPR1 0x7C
static unsigned int init_chipset_cmd64x(struct pci_dev *, const char *);
static void init_hwif_cmd64x(ide_hwif_t *);
static ide_pci_device_t cmd64x_chipsets[] __devinitdata = {
{ /* 0 */
.name = "CMD643",
.init_chipset = init_chipset_cmd64x,
.init_hwif = init_hwif_cmd64x,
.channels = 2,
.autodma = AUTODMA,
.bootable = ON_BOARD,
},{ /* 1 */
.name = "CMD646",
.init_chipset = init_chipset_cmd64x,
.init_hwif = init_hwif_cmd64x,
.channels = 2,
.autodma = AUTODMA,
.enablebits = {{0x00,0x00,0x00}, {0x51,0x80,0x80}},
.bootable = ON_BOARD,
},{ /* 2 */
.name = "CMD648",
.init_chipset = init_chipset_cmd64x,
.init_hwif = init_hwif_cmd64x,
.channels = 2,
.autodma = AUTODMA,
.bootable = ON_BOARD,
},{
.name = "CMD649",
.init_chipset = init_chipset_cmd64x,
.init_hwif = init_hwif_cmd64x,
.channels = 2,
.autodma = AUTODMA,
.bootable = ON_BOARD,
}
};
#endif /* CMD64X_H */
drivers/ide/pci/cy82c693.c
View file @ 80b8bedf
......@@ -54,7 +54,64 @@
#include <asm/io.h>
#include "cy82c693.h"
/* the current version */
#define CY82_VERSION "CY82C693U driver v0.34 99-13-12 Andreas S. Krebs (akrebs@altavista.net)"
/*
* The following are used to debug the driver.
*/
#define CY82C693_DEBUG_LOGS 0
#define CY82C693_DEBUG_INFO 0
/* define CY82C693_SETDMA_CLOCK to set DMA Controller Clock Speed to ATCLK */
#undef CY82C693_SETDMA_CLOCK
/*
* NOTE: the value for busmaster timeout is tricky and I got it by
* trial and error! By using a to low value will cause DMA timeouts
* and drop IDE performance, and by using a to high value will cause
* audio playback to scatter.
* If you know a better value or how to calc it, please let me know.
*/
/* twice the value written in cy82c693ub datasheet */
#define BUSMASTER_TIMEOUT 0x50
/*
* the value above was tested on my machine and it seems to work okay
*/
/* here are the offset definitions for the registers */
#define CY82_IDE_CMDREG 0x04
#define CY82_IDE_ADDRSETUP 0x48
#define CY82_IDE_MASTER_IOR 0x4C
#define CY82_IDE_MASTER_IOW 0x4D
#define CY82_IDE_SLAVE_IOR 0x4E
#define CY82_IDE_SLAVE_IOW 0x4F
#define CY82_IDE_MASTER_8BIT 0x50
#define CY82_IDE_SLAVE_8BIT 0x51
#define CY82_INDEX_PORT 0x22
#define CY82_DATA_PORT 0x23
#define CY82_INDEX_CTRLREG1 0x01
#define CY82_INDEX_CHANNEL0 0x30
#define CY82_INDEX_CHANNEL1 0x31
#define CY82_INDEX_TIMEOUT 0x32
/* the max PIO mode - from datasheet */
#define CY82C693_MAX_PIO 4
/* the min and max PCI bus speed in MHz - from datasheet */
#define CY82C963_MIN_BUS_SPEED 25
#define CY82C963_MAX_BUS_SPEED 33
/* the struct for the PIO mode timings */
typedef struct pio_clocks_s {
u8 address_time; /* Address setup (clocks) */
u8 time_16r; /* clocks for 16bit IOR (0xF0=Active/data, 0x0F=Recovery) */
u8 time_16w; /* clocks for 16bit IOW (0xF0=Active/data, 0x0F=Recovery) */
u8 time_8; /* clocks for 8bit (0xF0=Active/data, 0x0F=Recovery) */
} pio_clocks_t;
/*
* calc clocks using bus_speed
......@@ -422,6 +479,18 @@ void __init init_iops_cy82c693(ide_hwif_t *hwif)
}
}
static ide_pci_device_t cy82c693_chipsets[] __devinitdata = {
{ /* 0 */
.name = "CY82C693",
.init_chipset = init_chipset_cy82c693,
.init_iops = init_iops_cy82c693,
.init_hwif = init_hwif_cy82c693,
.channels = 1,
.autodma = AUTODMA,
.bootable = ON_BOARD,
}
};
static int __devinit cy82c693_init_one(struct pci_dev *dev, const struct pci_device_id *id)
{
ide_pci_device_t *d = &cy82c693_chipsets[id->driver_data];
......
drivers/ide/pci/cy82c693.h deleted 100644 → 0
View file @ 1581782e
#ifndef CY82C693_H
#define CY82C693_H
#include <linux/config.h>
#include <linux/pci.h>
#include <linux/ide.h>
/* the current version */
#define CY82_VERSION "CY82C693U driver v0.34 99-13-12 Andreas S. Krebs (akrebs@altavista.net)"
/*
* The following are used to debug the driver.
*/
#define CY82C693_DEBUG_LOGS 0
#define CY82C693_DEBUG_INFO 0
/* define CY82C693_SETDMA_CLOCK to set DMA Controller Clock Speed to ATCLK */
#undef CY82C693_SETDMA_CLOCK
/*
* NOTE: the value for busmaster timeout is tricky and I got it by
* trial and error! By using a to low value will cause DMA timeouts
* and drop IDE performance, and by using a to high value will cause
* audio playback to scatter.
* If you know a better value or how to calc it, please let me know.
*/
/* twice the value written in cy82c693ub datasheet */
#define BUSMASTER_TIMEOUT 0x50
/*
* the value above was tested on my machine and it seems to work okay
*/
/* here are the offset definitions for the registers */
#define CY82_IDE_CMDREG 0x04
#define CY82_IDE_ADDRSETUP 0x48
#define CY82_IDE_MASTER_IOR 0x4C
#define CY82_IDE_MASTER_IOW 0x4D
#define CY82_IDE_SLAVE_IOR 0x4E
#define CY82_IDE_SLAVE_IOW 0x4F
#define CY82_IDE_MASTER_8BIT 0x50
#define CY82_IDE_SLAVE_8BIT 0x51
#define CY82_INDEX_PORT 0x22
#define CY82_DATA_PORT 0x23
#define CY82_INDEX_CTRLREG1 0x01
#define CY82_INDEX_CHANNEL0 0x30
#define CY82_INDEX_CHANNEL1 0x31
#define CY82_INDEX_TIMEOUT 0x32
/* the max PIO mode - from datasheet */
#define CY82C693_MAX_PIO 4
/* the min and max PCI bus speed in MHz - from datasheet */
#define CY82C963_MIN_BUS_SPEED 25
#define CY82C963_MAX_BUS_SPEED 33
/* the struct for the PIO mode timings */
typedef struct pio_clocks_s {
u8 address_time; /* Address setup (clocks) */
u8 time_16r; /* clocks for 16bit IOR (0xF0=Active/data, 0x0F=Recovery) */
u8 time_16w; /* clocks for 16bit IOW (0xF0=Active/data, 0x0F=Recovery) */
u8 time_8; /* clocks for 8bit (0xF0=Active/data, 0x0F=Recovery) */
} pio_clocks_t;
static unsigned int init_chipset_cy82c693(struct pci_dev *, const char *);
static void init_hwif_cy82c693(ide_hwif_t *);
static void init_iops_cy82c693(ide_hwif_t *);
static ide_pci_device_t cy82c693_chipsets[] __devinitdata = {
{ /* 0 */
.name = "CY82C693",
.init_chipset = init_chipset_cy82c693,
.init_iops = init_iops_cy82c693,
.init_hwif = init_hwif_cy82c693,
.channels = 1,
.autodma = AUTODMA,
.bootable = ON_BOARD,
}
};
#endif /* CY82C693_H */
drivers/ide/pci/generic.c
View file @ 80b8bedf
......@@ -39,13 +39,6 @@
#include <asm/io.h>
#include "generic.h"
static unsigned int __devinit init_chipset_generic (struct pci_dev *dev, const char *name)
{
return 0;
}
static void __devinit init_hwif_generic (ide_hwif_t *hwif)
{
switch(hwif->pci_dev->device) {
......@@ -83,6 +76,89 @@ static void __devinit init_hwif_generic (ide_hwif_t *hwif)
return 0;
#endif
static ide_pci_device_t generic_chipsets[] __devinitdata = {
{ /* 0 */
.name = "NS87410",
.init_hwif = init_hwif_generic,
.channels = 2,
.autodma = AUTODMA,
.enablebits = {{0x43,0x08,0x08}, {0x47,0x08,0x08}},
.bootable = ON_BOARD,
},{ /* 1 */
.name = "SAMURAI",
.init_hwif = init_hwif_generic,
.channels = 2,
.autodma = AUTODMA,
.bootable = ON_BOARD,
},{ /* 2 */
.name = "HT6565",
.init_hwif = init_hwif_generic,
.channels = 2,
.autodma = AUTODMA,
.bootable = ON_BOARD,
},{ /* 3 */
.name = "UM8673F",
.init_hwif = init_hwif_generic,
.channels = 2,
.autodma = NODMA,
.bootable = ON_BOARD,
},{ /* 4 */
.name = "UM8886A",
.init_hwif = init_hwif_generic,
.channels = 2,
.autodma = NODMA,
.bootable = ON_BOARD,
},{ /* 5 */
.name = "UM8886BF",
.init_hwif = init_hwif_generic,
.channels = 2,
.autodma = NODMA,
.bootable = ON_BOARD,
},{ /* 6 */
.name = "HINT_IDE",
.init_hwif = init_hwif_generic,
.channels = 2,
.autodma = AUTODMA,
.bootable = ON_BOARD,
},{ /* 7 */
.name = "VIA_IDE",
.init_hwif = init_hwif_generic,
.channels = 2,
.autodma = NOAUTODMA,
.bootable = ON_BOARD,
},{ /* 8 */
.name = "OPTI621V",
.init_hwif = init_hwif_generic,
.channels = 2,
.autodma = NOAUTODMA,
.bootable = ON_BOARD,
},{ /* 9 */
.name = "VIA8237SATA",
.init_hwif = init_hwif_generic,
.channels = 2,
.autodma = AUTODMA,
.bootable = OFF_BOARD,
},{ /* 10 */
.name = "Piccolo0102",
.init_hwif = init_hwif_generic,
.channels = 2,
.autodma = NOAUTODMA,
.bootable = ON_BOARD,
},{ /* 11 */
.name = "Piccolo0103",
.init_hwif = init_hwif_generic,
.channels = 2,
.autodma = NOAUTODMA,
.bootable = ON_BOARD,
},{ /* 12 */
.name = "Piccolo0105",
.init_hwif = init_hwif_generic,
.channels = 2,
.autodma = NOAUTODMA,
.bootable = ON_BOARD,
}
};
/**
* generic_init_one - called when a PIIX is found
* @dev: the generic device
......
drivers/ide/pci/generic.h deleted 100644 → 0
View file @ 1581782e
#ifndef IDE_GENERIC_H
#define IDE_GENERIC_H
#include <linux/config.h>
#include <linux/pci.h>
#include <linux/ide.h>
static unsigned int init_chipset_generic(struct pci_dev *, const char *);
static void init_hwif_generic(ide_hwif_t *);
static ide_pci_device_t generic_chipsets[] __devinitdata = {
{ /* 0 */
.name = "NS87410",
.init_chipset = init_chipset_generic,
.init_hwif = init_hwif_generic,
.channels = 2,
.autodma = AUTODMA,
.enablebits = {{0x43,0x08,0x08}, {0x47,0x08,0x08}},
.bootable = ON_BOARD,
},{ /* 1 */
.name = "SAMURAI",
.init_chipset = init_chipset_generic,
.init_hwif = init_hwif_generic,
.channels = 2,
.autodma = AUTODMA,
.bootable = ON_BOARD,
},{ /* 2 */
.name = "HT6565",
.init_chipset = init_chipset_generic,
.init_hwif = init_hwif_generic,
.channels = 2,
.autodma = AUTODMA,
.bootable = ON_BOARD,
},{ /* 3 */
.name = "UM8673F",
.init_chipset = init_chipset_generic,
.init_hwif = init_hwif_generic,
.channels = 2,
.autodma = NODMA,
.bootable = ON_BOARD,
},{ /* 4 */
.name = "UM8886A",
.init_chipset = init_chipset_generic,
.init_hwif = init_hwif_generic,
.channels = 2,
.autodma = NODMA,
.bootable = ON_BOARD,
},{ /* 5 */
.name = "UM8886BF",
.init_chipset = init_chipset_generic,
.init_hwif = init_hwif_generic,
.channels = 2,
.autodma = NODMA,
.bootable = ON_BOARD,
},{ /* 6 */
.name = "HINT_IDE",
.init_chipset = init_chipset_generic,
.init_hwif = init_hwif_generic,
.channels = 2,
.autodma = AUTODMA,
.bootable = ON_BOARD,
},{ /* 7 */
.name = "VIA_IDE",
.init_chipset = init_chipset_generic,
.init_hwif = init_hwif_generic,
.channels = 2,
.autodma = NOAUTODMA,
.bootable = ON_BOARD,
},{ /* 8 */
.name = "OPTI621V",
.init_chipset = init_chipset_generic,
.init_hwif = init_hwif_generic,
.channels = 2,
.autodma = NOAUTODMA,
.bootable = ON_BOARD,
},{ /* 9 */
.name = "VIA8237SATA",
.init_chipset = init_chipset_generic,
.init_hwif = init_hwif_generic,
.channels = 2,
.autodma = AUTODMA,
.bootable = OFF_BOARD,
},{ /* 10 */
.name = "Piccolo0102",
.init_chipset = init_chipset_generic,
.init_hwif = init_hwif_generic,
.channels = 2,
.autodma = NOAUTODMA,
.bootable = ON_BOARD,
},{ /* 11 */
.name = "Piccolo0103",
.init_chipset = init_chipset_generic,
.init_hwif = init_hwif_generic,
.channels = 2,
.autodma = NOAUTODMA,
.bootable = ON_BOARD,
},{ /* 12 */
.name = "Piccolo0105",
.init_chipset = init_chipset_generic,
.init_hwif = init_hwif_generic,
.channels = 2,
.autodma = NOAUTODMA,
.bootable = ON_BOARD,
}
};
#if 0
static ide_pci_device_t unknown_chipset[] __devinitdata = {
{ /* 0 */
.name = "PCI_IDE",
.init_chipset = init_chipset_generic,
.init_hwif = init_hwif_generic,
.channels = 2,
.autodma = AUTODMA,
.bootable = ON_BOARD,
}
};
#endif
#endif /* IDE_GENERIC_H */
drivers/ide/pci/hpt366.c
View file @ 80b8bedf
This diff is collapsed.
drivers/ide/pci/hpt366.h deleted 100644 → 0
View file @ 1581782e
This diff is collapsed.
drivers/ide/pci/it8172.c
View file @ 80b8bedf
......@@ -42,8 +42,6 @@
#include <asm/io.h>
#include <asm/it8172/it8172_int.h>
#include "it8172.h"
/*
* Prototypes
*/
......@@ -266,6 +264,18 @@ static void __init init_hwif_it8172 (ide_hwif_t *hwif)
hwif->drives[1].autodma = hwif->autodma;
}
static ide_pci_device_t it8172_chipsets[] __devinitdata = {
{ /* 0 */
.name = "IT8172G",
.init_chipset = init_chipset_it8172,
.init_hwif = init_hwif_it8172,
.channels = 2,
.autodma = AUTODMA,
.enablebits = {{0x00,0x00,0x00}, {0x40,0x00,0x01}},
.bootable = ON_BOARD,
}
};
static int __devinit it8172_init_one(struct pci_dev *dev, const struct pci_device_id *id)
{
if ((!(PCI_FUNC(dev->devfn) & 1) ||
......
drivers/ide/pci/it8172.h deleted 100644 → 0
View file @ 1581782e
#ifndef ITE8172G_H
#define ITE8172G_H
#include <linux/config.h>
#include <linux/pci.h>
#include <linux/ide.h>
static u8 it8172_ratemask(ide_drive_t *drive);
static void it8172_tune_drive(ide_drive_t *drive, u8 pio);
static u8 it8172_dma_2_pio(u8 xfer_rate);
static int it8172_tune_chipset(ide_drive_t *drive, u8 xferspeed);
#ifdef CONFIG_BLK_DEV_IDEDMA
static int it8172_config_chipset_for_dma(ide_drive_t *drive);
#endif
static unsigned int init_chipset_it8172(struct pci_dev *, const char *);
static void init_hwif_it8172(ide_hwif_t *);
static ide_pci_device_t it8172_chipsets[] __devinitdata = {
{ /* 0 */
.name = "IT8172G",
.init_chipset = init_chipset_it8172,
.init_hwif = init_hwif_it8172,
.channels = 2,
.autodma = AUTODMA,
.enablebits = {{0x00,0x00,0x00}, {0x40,0x00,0x01}},
.bootable = ON_BOARD,
}
};
#endif /* ITE8172G_H */
drivers/ide/pci/opti621.c
View file @ 80b8bedf
......@@ -104,8 +104,6 @@
#include <asm/io.h>
#include "opti621.h"
#define OPTI621_MAX_PIO 3
/* In fact, I do not have any PIO 4 drive
* (address: 25 ns, data: 70 ns, recovery: 35 ns),
......@@ -348,6 +346,24 @@ static void __init init_hwif_opti621 (ide_hwif_t *hwif)
hwif->drives[1].autodma = hwif->autodma;
}
static ide_pci_device_t opti621_chipsets[] __devinitdata = {
{ /* 0 */
.name = "OPTI621",
.init_hwif = init_hwif_opti621,
.channels = 2,
.autodma = AUTODMA,
.enablebits = {{0x45,0x80,0x00}, {0x40,0x08,0x00}},
.bootable = ON_BOARD,
},{ /* 1 */
.name = "OPTI621X",
.init_hwif = init_hwif_opti621,
.channels = 2,
.autodma = AUTODMA,
.enablebits = {{0x45,0x80,0x00}, {0x40,0x08,0x00}},
.bootable = ON_BOARD,
}
};
static int __devinit opti621_init_one(struct pci_dev *dev, const struct pci_device_id *id)
{
return ide_setup_pci_device(dev, &opti621_chipsets[id->driver_data]);
......
drivers/ide/pci/opti621.h deleted 100644 → 0
View file @ 1581782e
#ifndef OPTI621_H
#define OPTI621_H
#include <linux/config.h>
#include <linux/pci.h>
#include <linux/ide.h>
static void init_hwif_opti621(ide_hwif_t *);
static ide_pci_device_t opti621_chipsets[] __devinitdata = {
{ /* 0 */
.name = "OPTI621",
.init_hwif = init_hwif_opti621,
.channels = 2,
.autodma = AUTODMA,
.enablebits = {{0x45,0x80,0x00}, {0x40,0x08,0x00}},
.bootable = ON_BOARD,
},{ /* 1 */
.name = "OPTI621X",
.init_hwif = init_hwif_opti621,
.channels = 2,
.autodma = AUTODMA,
.enablebits = {{0x45,0x80,0x00}, {0x40,0x08,0x00}},
.bootable = ON_BOARD,
}
};
#endif /* OPTI621_H */
drivers/ide/pci/pdc202xx_new.c
View file @ 80b8bedf
......@@ -37,10 +37,46 @@
#include <asm/pci-bridge.h>
#endif
#include "pdc202xx_new.h"
#define PDC202_DEBUG_CABLE 0
const static char *pdc_quirk_drives[] = {
"QUANTUM FIREBALLlct08 08",
"QUANTUM FIREBALLP KA6.4",
"QUANTUM FIREBALLP KA9.1",
"QUANTUM FIREBALLP LM20.4",
"QUANTUM FIREBALLP KX13.6",
"QUANTUM FIREBALLP KX20.5",
"QUANTUM FIREBALLP KX27.3",
"QUANTUM FIREBALLP LM20.5",
NULL
};
#define set_2regs(a, b) \
do { \
hwif->OUTB((a + adj), indexreg); \
hwif->OUTB(b, datareg); \
} while(0)
#define set_ultra(a, b, c) \
do { \
set_2regs(0x10,(a)); \
set_2regs(0x11,(b)); \
set_2regs(0x12,(c)); \
} while(0)
#define set_ata2(a, b) \
do { \
set_2regs(0x0e,(a)); \
set_2regs(0x0f,(b)); \
} while(0)
#define set_pio(a, b, c) \
do { \
set_2regs(0x0c,(a)); \
set_2regs(0x0d,(b)); \
set_2regs(0x13,(c)); \
} while(0)
static u8 pdcnew_ratemask (ide_drive_t *drive)
{
u8 mode;
......@@ -360,6 +396,72 @@ static int __devinit init_setup_pdc20276(struct pci_dev *dev,
return ide_setup_pci_device(dev, d);
}
static ide_pci_device_t pdcnew_chipsets[] __devinitdata = {
{ /* 0 */
.name = "PDC20268",
.init_setup = init_setup_pdcnew,
.init_chipset = init_chipset_pdcnew,
.init_hwif = init_hwif_pdc202new,
.channels = 2,
.autodma = AUTODMA,
.bootable = OFF_BOARD,
},{ /* 1 */
.name = "PDC20269",
.init_setup = init_setup_pdcnew,
.init_chipset = init_chipset_pdcnew,
.init_hwif = init_hwif_pdc202new,
.channels = 2,
.autodma = AUTODMA,
.bootable = OFF_BOARD,
},{ /* 2 */
.name = "PDC20270",
.init_setup = init_setup_pdc20270,
.init_chipset = init_chipset_pdcnew,
.init_hwif = init_hwif_pdc202new,
.channels = 2,
.autodma = AUTODMA,
#ifndef CONFIG_PDC202XX_FORCE
.enablebits = {{0x50,0x02,0x02}, {0x50,0x04,0x04}},
#endif
.bootable = OFF_BOARD,
},{ /* 3 */
.name = "PDC20271",
.init_setup = init_setup_pdcnew,
.init_chipset = init_chipset_pdcnew,
.init_hwif = init_hwif_pdc202new,
.channels = 2,
.autodma = AUTODMA,
.bootable = OFF_BOARD,
},{ /* 4 */
.name = "PDC20275",
.init_setup = init_setup_pdcnew,
.init_chipset = init_chipset_pdcnew,
.init_hwif = init_hwif_pdc202new,
.channels = 2,
.autodma = AUTODMA,
.bootable = OFF_BOARD,
},{ /* 5 */
.name = "PDC20276",
.init_setup = init_setup_pdc20276,
.init_chipset = init_chipset_pdcnew,
.init_hwif = init_hwif_pdc202new,
.channels = 2,
.autodma = AUTODMA,
#ifndef CONFIG_PDC202XX_FORCE
.enablebits = {{0x50,0x02,0x02}, {0x50,0x04,0x04}},
#endif
.bootable = OFF_BOARD,
},{ /* 6 */
.name = "PDC20277",
.init_setup = init_setup_pdcnew,
.init_chipset = init_chipset_pdcnew,
.init_hwif = init_hwif_pdc202new,
.channels = 2,
.autodma = AUTODMA,
.bootable = OFF_BOARD,
}
};
/**
* pdc202new_init_one - called when a pdc202xx is found
* @dev: the pdc202new device
......
drivers/ide/pci/pdc202xx_new.h deleted 100644 → 0
View file @ 1581782e
#ifndef PDC202XX_H
#define PDC202XX_H
#include <linux/config.h>
#include <linux/pci.h>
#include <linux/ide.h>
const static char *pdc_quirk_drives[] = {
"QUANTUM FIREBALLlct08 08",
"QUANTUM FIREBALLP KA6.4",
"QUANTUM FIREBALLP KA9.1",
"QUANTUM FIREBALLP LM20.4",
"QUANTUM FIREBALLP KX13.6",
"QUANTUM FIREBALLP KX20.5",
"QUANTUM FIREBALLP KX27.3",
"QUANTUM FIREBALLP LM20.5",
NULL
};
#define set_2regs(a, b) \
do { \
hwif->OUTB((a + adj), indexreg); \
hwif->OUTB(b, datareg); \
} while(0)
#define set_ultra(a, b, c) \
do { \
set_2regs(0x10,(a)); \
set_2regs(0x11,(b)); \
set_2regs(0x12,(c)); \
} while(0)
#define set_ata2(a, b) \
do { \
set_2regs(0x0e,(a)); \
set_2regs(0x0f,(b)); \
} while(0)
#define set_pio(a, b, c) \
do { \
set_2regs(0x0c,(a)); \
set_2regs(0x0d,(b)); \
set_2regs(0x13,(c)); \
} while(0)
static int init_setup_pdcnew(struct pci_dev *, ide_pci_device_t *);
static int init_setup_pdc20270(struct pci_dev *, ide_pci_device_t *);
static int init_setup_pdc20276(struct pci_dev *dev, ide_pci_device_t *d);
static unsigned int init_chipset_pdcnew(struct pci_dev *, const char *);
static void init_hwif_pdc202new(ide_hwif_t *);
static ide_pci_device_t pdcnew_chipsets[] __devinitdata = {
{ /* 0 */
.name = "PDC20268",
.init_setup = init_setup_pdcnew,
.init_chipset = init_chipset_pdcnew,
.init_hwif = init_hwif_pdc202new,
.channels = 2,
.autodma = AUTODMA,
.bootable = OFF_BOARD,
},{ /* 1 */
.name = "PDC20269",
.init_setup = init_setup_pdcnew,
.init_chipset = init_chipset_pdcnew,
.init_hwif = init_hwif_pdc202new,
.channels = 2,
.autodma = AUTODMA,
.bootable = OFF_BOARD,
},{ /* 2 */
.name = "PDC20270",
.init_setup = init_setup_pdc20270,
.init_chipset = init_chipset_pdcnew,
.init_hwif = init_hwif_pdc202new,
.channels = 2,
.autodma = AUTODMA,
#ifndef CONFIG_PDC202XX_FORCE
.enablebits = {{0x50,0x02,0x02}, {0x50,0x04,0x04}},
#endif
.bootable = OFF_BOARD,
},{ /* 3 */
.name = "PDC20271",
.init_setup = init_setup_pdcnew,
.init_chipset = init_chipset_pdcnew,
.init_hwif = init_hwif_pdc202new,
.channels = 2,
.autodma = AUTODMA,
.bootable = OFF_BOARD,
},{ /* 4 */
.name = "PDC20275",
.init_setup = init_setup_pdcnew,
.init_chipset = init_chipset_pdcnew,
.init_hwif = init_hwif_pdc202new,
.channels = 2,
.autodma = AUTODMA,
.bootable = OFF_BOARD,
},{ /* 5 */
.name = "PDC20276",
.init_setup = init_setup_pdc20276,
.init_chipset = init_chipset_pdcnew,
.init_hwif = init_hwif_pdc202new,
.channels = 2,
.autodma = AUTODMA,
#ifndef CONFIG_PDC202XX_FORCE
.enablebits = {{0x50,0x02,0x02}, {0x50,0x04,0x04}},
#endif
.bootable = OFF_BOARD,
},{ /* 6 */
.name = "PDC20277",
.init_setup = init_setup_pdcnew,
.init_chipset = init_chipset_pdcnew,
.init_hwif = init_hwif_pdc202new,
.channels = 2,
.autodma = AUTODMA,
.bootable = OFF_BOARD,
}
};
#endif /* PDC202XX_H */
drivers/ide/pci/pdc202xx_old.c
View file @ 80b8bedf
......@@ -46,9 +46,60 @@
#include <asm/io.h>
#include <asm/irq.h>
#include "pdc202xx_old.h"
#define PDC202_DEBUG_CABLE 0
#define PDC202XX_DEBUG_DRIVE_INFO 0
static const char *pdc_quirk_drives[] = {
"QUANTUM FIREBALLlct08 08",
"QUANTUM FIREBALLP KA6.4",
"QUANTUM FIREBALLP KA9.1",
"QUANTUM FIREBALLP LM20.4",
"QUANTUM FIREBALLP KX13.6",
"QUANTUM FIREBALLP KX20.5",
"QUANTUM FIREBALLP KX27.3",
"QUANTUM FIREBALLP LM20.5",
NULL
};
/* A Register */
#define SYNC_ERRDY_EN 0xC0
#define SYNC_IN 0x80 /* control bit, different for master vs. slave drives */
#define ERRDY_EN 0x40 /* control bit, different for master vs. slave drives */
#define IORDY_EN 0x20 /* PIO: IOREADY */
#define PREFETCH_EN 0x10 /* PIO: PREFETCH */
#define PA3 0x08 /* PIO"A" timing */
#define PA2 0x04 /* PIO"A" timing */
#define PA1 0x02 /* PIO"A" timing */
#define PA0 0x01 /* PIO"A" timing */
/* B Register */
#define MB2 0x80 /* DMA"B" timing */
#define MB1 0x40 /* DMA"B" timing */
#define MB0 0x20 /* DMA"B" timing */
#define PB4 0x10 /* PIO_FORCE 1:0 */
#define PB3 0x08 /* PIO"B" timing */ /* PIO flow Control mode */
#define PB2 0x04 /* PIO"B" timing */ /* PIO 4 */
#define PB1 0x02 /* PIO"B" timing */ /* PIO 3 half */
#define PB0 0x01 /* PIO"B" timing */ /* PIO 3 other half */
/* C Register */
#define IORDYp_NO_SPEED 0x4F
#define SPEED_DIS 0x0F
#define PDC202_DEBUG_CABLE 0
#define DMARQp 0x80
#define IORDYp 0x40
#define DMAR_EN 0x20
#define DMAW_EN 0x10
#define MC3 0x08 /* DMA"C" timing */
#define MC2 0x04 /* DMA"C" timing */
#define MC1 0x02 /* DMA"C" timing */
#define MC0 0x01 /* DMA"C" timing */
#if 0
unsigned long bibma = pci_resource_start(dev, 4);
......@@ -69,7 +120,8 @@
((sc1c & 0x02) == 0x02) ? "8" :
((sc1c & 0x01) == 0x01) ? "6" :
((sc1c & 0x00) == 0x00) ? "4" : "??");
SPLIT_BYTE(sc1e, hi, lo);
hi = sc1e >> 4;
lo = sc1e & 0xf;
p += sprintf(p, "Status Polling Period : %d\n", hi);
p += sprintf(p, "Interrupt Check Status Polling Delay : %d\n", lo);
#endif
......@@ -725,6 +777,77 @@ static int __devinit init_setup_pdc202xx(struct pci_dev *dev,
return ide_setup_pci_device(dev, d);
}
static ide_pci_device_t pdc202xx_chipsets[] __devinitdata = {
{ /* 0 */
.name = "PDC20246",
.init_setup = init_setup_pdc202ata4,
.init_chipset = init_chipset_pdc202xx,
.init_hwif = init_hwif_pdc202xx,
.init_dma = init_dma_pdc202xx,
.channels = 2,
.autodma = AUTODMA,
#ifndef CONFIG_PDC202XX_FORCE
.enablebits = {{0x50,0x02,0x02}, {0x50,0x04,0x04}},
#endif
.bootable = OFF_BOARD,
.extra = 16,
},{ /* 1 */
.name = "PDC20262",
.init_setup = init_setup_pdc202ata4,
.init_chipset = init_chipset_pdc202xx,
.init_hwif = init_hwif_pdc202xx,
.init_dma = init_dma_pdc202xx,
.channels = 2,
.autodma = AUTODMA,
#ifndef CONFIG_PDC202XX_FORCE
.enablebits = {{0x50,0x02,0x02}, {0x50,0x04,0x04}},
#endif
.bootable = OFF_BOARD,
.extra = 48,
.flags = IDEPCI_FLAG_FORCE_PDC,
},{ /* 2 */
.name = "PDC20263",
.init_setup = init_setup_pdc202ata4,
.init_chipset = init_chipset_pdc202xx,
.init_hwif = init_hwif_pdc202xx,
.init_dma = init_dma_pdc202xx,
.channels = 2,
.autodma = AUTODMA,
#ifndef CONFIG_PDC202XX_FORCE
.enablebits = {{0x50,0x02,0x02}, {0x50,0x04,0x04}},
#endif
.bootable = OFF_BOARD,
.extra = 48,
},{ /* 3 */
.name = "PDC20265",
.init_setup = init_setup_pdc20265,
.init_chipset = init_chipset_pdc202xx,
.init_hwif = init_hwif_pdc202xx,
.init_dma = init_dma_pdc202xx,
.channels = 2,
.autodma = AUTODMA,
#ifndef CONFIG_PDC202XX_FORCE
.enablebits = {{0x50,0x02,0x02}, {0x50,0x04,0x04}},
#endif
.bootable = OFF_BOARD,
.extra = 48,
.flags = IDEPCI_FLAG_FORCE_PDC,
},{ /* 4 */
.name = "PDC20267",
.init_setup = init_setup_pdc202xx,
.init_chipset = init_chipset_pdc202xx,
.init_hwif = init_hwif_pdc202xx,
.init_dma = init_dma_pdc202xx,
.channels = 2,
.autodma = AUTODMA,
#ifndef CONFIG_PDC202XX_FORCE
.enablebits = {{0x50,0x02,0x02}, {0x50,0x04,0x04}},
#endif
.bootable = OFF_BOARD,
.extra = 48,
}
};
/**
* pdc202xx_init_one - called when a PDC202xx is found
* @dev: the pdc202xx device
......
drivers/ide/pci/pdc202xx_old.h deleted 100644 → 0
View file @ 1581782e
#ifndef PDC202XX_H
#define PDC202XX_H
#include <linux/config.h>
#include <linux/pci.h>
#include <linux/ide.h>
#ifndef SPLIT_BYTE
#define SPLIT_BYTE(B,H,L) ((H)=(B>>4), (L)=(B-((B>>4)<<4)))
#endif
#define PDC202XX_DEBUG_DRIVE_INFO 0
static const char *pdc_quirk_drives[] = {
"QUANTUM FIREBALLlct08 08",
"QUANTUM FIREBALLP KA6.4",
"QUANTUM FIREBALLP KA9.1",
"QUANTUM FIREBALLP LM20.4",
"QUANTUM FIREBALLP KX13.6",
"QUANTUM FIREBALLP KX20.5",
"QUANTUM FIREBALLP KX27.3",
"QUANTUM FIREBALLP LM20.5",
NULL
};
/* A Register */
#define SYNC_ERRDY_EN 0xC0
#define SYNC_IN 0x80 /* control bit, different for master vs. slave drives */
#define ERRDY_EN 0x40 /* control bit, different for master vs. slave drives */
#define IORDY_EN 0x20 /* PIO: IOREADY */
#define PREFETCH_EN 0x10 /* PIO: PREFETCH */
#define PA3 0x08 /* PIO"A" timing */
#define PA2 0x04 /* PIO"A" timing */
#define PA1 0x02 /* PIO"A" timing */
#define PA0 0x01 /* PIO"A" timing */
/* B Register */
#define MB2 0x80 /* DMA"B" timing */
#define MB1 0x40 /* DMA"B" timing */
#define MB0 0x20 /* DMA"B" timing */
#define PB4 0x10 /* PIO_FORCE 1:0 */
#define PB3 0x08 /* PIO"B" timing */ /* PIO flow Control mode */
#define PB2 0x04 /* PIO"B" timing */ /* PIO 4 */
#define PB1 0x02 /* PIO"B" timing */ /* PIO 3 half */
#define PB0 0x01 /* PIO"B" timing */ /* PIO 3 other half */
/* C Register */
#define IORDYp_NO_SPEED 0x4F
#define SPEED_DIS 0x0F
#define DMARQp 0x80
#define IORDYp 0x40
#define DMAR_EN 0x20
#define DMAW_EN 0x10
#define MC3 0x08 /* DMA"C" timing */
#define MC2 0x04 /* DMA"C" timing */
#define MC1 0x02 /* DMA"C" timing */
#define MC0 0x01 /* DMA"C" timing */
static int init_setup_pdc202ata4(struct pci_dev *dev, ide_pci_device_t *d);
static int init_setup_pdc20265(struct pci_dev *, ide_pci_device_t *);
static int init_setup_pdc202xx(struct pci_dev *, ide_pci_device_t *);
static unsigned int init_chipset_pdc202xx(struct pci_dev *, const char *);
static void init_hwif_pdc202xx(ide_hwif_t *);
static void init_dma_pdc202xx(ide_hwif_t *, unsigned long);
static ide_pci_device_t pdc202xx_chipsets[] __devinitdata = {
{ /* 0 */
.name = "PDC20246",
.init_setup = init_setup_pdc202ata4,
.init_chipset = init_chipset_pdc202xx,
.init_hwif = init_hwif_pdc202xx,
.init_dma = init_dma_pdc202xx,
.channels = 2,
.autodma = AUTODMA,
#ifndef CONFIG_PDC202XX_FORCE
.enablebits = {{0x50,0x02,0x02}, {0x50,0x04,0x04}},
#endif
.bootable = OFF_BOARD,
.extra = 16,
},{ /* 1 */
.name = "PDC20262",
.init_setup = init_setup_pdc202ata4,
.init_chipset = init_chipset_pdc202xx,
.init_hwif = init_hwif_pdc202xx,
.init_dma = init_dma_pdc202xx,
.channels = 2,
.autodma = AUTODMA,
#ifndef CONFIG_PDC202XX_FORCE
.enablebits = {{0x50,0x02,0x02}, {0x50,0x04,0x04}},
#endif
.bootable = OFF_BOARD,
.extra = 48,
.flags = IDEPCI_FLAG_FORCE_PDC,
},{ /* 2 */
.name = "PDC20263",
.init_setup = init_setup_pdc202ata4,
.init_chipset = init_chipset_pdc202xx,
.init_hwif = init_hwif_pdc202xx,
.init_dma = init_dma_pdc202xx,
.channels = 2,
.autodma = AUTODMA,
#ifndef CONFIG_PDC202XX_FORCE
.enablebits = {{0x50,0x02,0x02}, {0x50,0x04,0x04}},
#endif
.bootable = OFF_BOARD,
.extra = 48,
},{ /* 3 */
.name = "PDC20265",
.init_setup = init_setup_pdc20265,
.init_chipset = init_chipset_pdc202xx,
.init_hwif = init_hwif_pdc202xx,
.init_dma = init_dma_pdc202xx,
.channels = 2,
.autodma = AUTODMA,
#ifndef CONFIG_PDC202XX_FORCE
.enablebits = {{0x50,0x02,0x02}, {0x50,0x04,0x04}},
#endif
.bootable = OFF_BOARD,
.extra = 48,
.flags = IDEPCI_FLAG_FORCE_PDC,
},{ /* 4 */
.name = "PDC20267",
.init_setup = init_setup_pdc202xx,
.init_chipset = init_chipset_pdc202xx,
.init_hwif = init_hwif_pdc202xx,
.init_dma = init_dma_pdc202xx,
.channels = 2,
.autodma = AUTODMA,
#ifndef CONFIG_PDC202XX_FORCE
.enablebits = {{0x50,0x02,0x02}, {0x50,0x04,0x04}},
#endif
.bootable = OFF_BOARD,
.extra = 48,
}
};
#endif /* PDC202XX_H */
drivers/ide/pci/piix.c
View file @ 80b8bedf
......@@ -103,8 +103,6 @@
#include <asm/io.h>
#include "piix.h"
static int no_piix_dma;
/**
......@@ -530,6 +528,52 @@ static void __devinit init_hwif_piix(ide_hwif_t *hwif)
hwif->drives[0].autodma = hwif->autodma;
}
#define DECLARE_PIIX_DEV(name_str) \
{ \
.name = name_str, \
.init_chipset = init_chipset_piix, \
.init_hwif = init_hwif_piix, \
.channels = 2, \
.autodma = AUTODMA, \
.enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, \
.bootable = ON_BOARD, \
}
static ide_pci_device_t piix_pci_info[] __devinitdata = {
/* 0 */ DECLARE_PIIX_DEV("PIIXa"),
/* 1 */ DECLARE_PIIX_DEV("PIIXb"),
{ /* 2 */
.name = "MPIIX",
.init_hwif = init_hwif_piix,
.channels = 2,
.autodma = NODMA,
.enablebits = {{0x6D,0x80,0x80}, {0x6F,0x80,0x80}},
.bootable = ON_BOARD,
},
/* 3 */ DECLARE_PIIX_DEV("PIIX3"),
/* 4 */ DECLARE_PIIX_DEV("PIIX4"),
/* 5 */ DECLARE_PIIX_DEV("ICH0"),
/* 6 */ DECLARE_PIIX_DEV("PIIX4"),
/* 7 */ DECLARE_PIIX_DEV("ICH"),
/* 8 */ DECLARE_PIIX_DEV("PIIX4"),
/* 9 */ DECLARE_PIIX_DEV("PIIX4"),
/* 10 */ DECLARE_PIIX_DEV("ICH2"),
/* 11 */ DECLARE_PIIX_DEV("ICH2M"),
/* 12 */ DECLARE_PIIX_DEV("ICH3M"),
/* 13 */ DECLARE_PIIX_DEV("ICH3"),
/* 14 */ DECLARE_PIIX_DEV("ICH4"),
/* 15 */ DECLARE_PIIX_DEV("ICH5"),
/* 16 */ DECLARE_PIIX_DEV("C-ICH"),
/* 17 */ DECLARE_PIIX_DEV("ICH4"),
/* 18 */ DECLARE_PIIX_DEV("ICH5-SATA"),
/* 19 */ DECLARE_PIIX_DEV("ICH5"),
/* 20 */ DECLARE_PIIX_DEV("ICH6"),
/* 21 */ DECLARE_PIIX_DEV("ICH7"),
/* 22 */ DECLARE_PIIX_DEV("ICH4"),
};
/**
* piix_init_one - called when a PIIX is found
* @dev: the piix device
......
drivers/ide/pci/piix.h deleted 100644 → 0
View file @ 1581782e
#ifndef PIIX_H
#define PIIX_H
#include <linux/config.h>
#include <linux/pci.h>
#include <linux/ide.h>
static unsigned int __devinit init_chipset_piix(struct pci_dev *, const char *);
static void init_hwif_piix(ide_hwif_t *);
#define DECLARE_PIIX_DEV(name_str) \
{ \
.name = name_str, \
.init_chipset = init_chipset_piix, \
.init_hwif = init_hwif_piix, \
.channels = 2, \
.autodma = AUTODMA, \
.enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, \
.bootable = ON_BOARD, \
}
/*
* Table of the various PIIX capability blocks
*
*/
static ide_pci_device_t piix_pci_info[] __devinitdata = {
/* 0 */ DECLARE_PIIX_DEV("PIIXa"),
/* 1 */ DECLARE_PIIX_DEV("PIIXb"),
{ /* 2 */
.name = "MPIIX",
.init_hwif = init_hwif_piix,
.channels = 2,
.autodma = NODMA,
.enablebits = {{0x6D,0x80,0x80}, {0x6F,0x80,0x80}},
.bootable = ON_BOARD,
},
/* 3 */ DECLARE_PIIX_DEV("PIIX3"),
/* 4 */ DECLARE_PIIX_DEV("PIIX4"),
/* 5 */ DECLARE_PIIX_DEV("ICH0"),
/* 6 */ DECLARE_PIIX_DEV("PIIX4"),
/* 7 */ DECLARE_PIIX_DEV("ICH"),
/* 8 */ DECLARE_PIIX_DEV("PIIX4"),
/* 9 */ DECLARE_PIIX_DEV("PIIX4"),
/* 10 */ DECLARE_PIIX_DEV("ICH2"),
/* 11 */ DECLARE_PIIX_DEV("ICH2M"),
/* 12 */ DECLARE_PIIX_DEV("ICH3M"),
/* 13 */ DECLARE_PIIX_DEV("ICH3"),
/* 14 */ DECLARE_PIIX_DEV("ICH4"),
/* 15 */ DECLARE_PIIX_DEV("ICH5"),
/* 16 */ DECLARE_PIIX_DEV("C-ICH"),
/* 17 */ DECLARE_PIIX_DEV("ICH4"),
/* 18 */ DECLARE_PIIX_DEV("ICH5-SATA"),
/* 19 */ DECLARE_PIIX_DEV("ICH5"),
/* 20 */ DECLARE_PIIX_DEV("ICH6"),
/* 21 */ DECLARE_PIIX_DEV("ICH7"),
/* 22 */ DECLARE_PIIX_DEV("ICH4"),
};
#endif /* PIIX_H */
drivers/ide/pci/serverworks.c
View file @ 80b8bedf
......@@ -39,7 +39,18 @@
#include <asm/io.h>
#include "serverworks.h"
#define SVWKS_CSB5_REVISION_NEW 0x92 /* min PCI_REVISION_ID for UDMA5 (A2.0) */
#define SVWKS_CSB6_REVISION 0xa0 /* min PCI_REVISION_ID for UDMA4 (A1.0) */
/* Seagate Barracuda ATA IV Family drives in UDMA mode 5
* can overrun their FIFOs when used with the CSB5 */
static const char *svwks_bad_ata100[] = {
"ST320011A",
"ST340016A",
"ST360021A",
"ST380021A",
NULL
};
static u8 svwks_revision = 0;
static struct pci_dev *isa_dev;
......@@ -582,6 +593,44 @@ static int __init init_setup_csb6 (struct pci_dev *dev, ide_pci_device_t *d)
return ide_setup_pci_device(dev, d);
}
static ide_pci_device_t serverworks_chipsets[] __devinitdata = {
{ /* 0 */
.name = "SvrWks OSB4",
.init_setup = init_setup_svwks,
.init_chipset = init_chipset_svwks,
.init_hwif = init_hwif_svwks,
.channels = 2,
.autodma = AUTODMA,
.bootable = ON_BOARD,
},{ /* 1 */
.name = "SvrWks CSB5",
.init_setup = init_setup_svwks,
.init_chipset = init_chipset_svwks,
.init_hwif = init_hwif_svwks,
.init_dma = init_dma_svwks,
.channels = 2,
.autodma = AUTODMA,
.bootable = ON_BOARD,
},{ /* 2 */
.name = "SvrWks CSB6",
.init_setup = init_setup_csb6,
.init_chipset = init_chipset_svwks,
.init_hwif = init_hwif_svwks,
.init_dma = init_dma_svwks,
.channels = 2,
.autodma = AUTODMA,
.bootable = ON_BOARD,
},{ /* 3 */
.name = "SvrWks CSB6",
.init_setup = init_setup_csb6,
.init_chipset = init_chipset_svwks,
.init_hwif = init_hwif_svwks,
.init_dma = init_dma_svwks,
.channels = 1, /* 2 */
.autodma = AUTODMA,
.bootable = ON_BOARD,
}
};
/**
* svwks_init_one - called when a OSB/CSB is found
......
drivers/ide/pci/serverworks.h deleted 100644 → 0
View file @ 1581782e
#ifndef SERVERWORKS_H
#define SERVERWORKS_H
#include <linux/config.h>
#include <linux/pci.h>
#include <linux/ide.h>
#undef SVWKS_DEBUG_DRIVE_INFO
#define SVWKS_CSB5_REVISION_NEW 0x92 /* min PCI_REVISION_ID for UDMA5 (A2.0) */
#define SVWKS_CSB6_REVISION 0xa0 /* min PCI_REVISION_ID for UDMA4 (A1.0) */
/* Seagate Barracuda ATA IV Family drives in UDMA mode 5
* can overrun their FIFOs when used with the CSB5 */
static const char *svwks_bad_ata100[] = {
"ST320011A",
"ST340016A",
"ST360021A",
"ST380021A",
NULL
};
static int init_setup_svwks(struct pci_dev *, ide_pci_device_t *);
static int init_setup_csb6(struct pci_dev *, ide_pci_device_t *);
static unsigned int init_chipset_svwks(struct pci_dev *, const char *);
static void init_hwif_svwks(ide_hwif_t *);
static void init_dma_svwks(ide_hwif_t *, unsigned long);
static ide_pci_device_t serverworks_chipsets[] __devinitdata = {
{ /* 0 */
.name = "SvrWks OSB4",
.init_setup = init_setup_svwks,
.init_chipset = init_chipset_svwks,
.init_hwif = init_hwif_svwks,
.channels = 2,
.autodma = AUTODMA,
.bootable = ON_BOARD,
},{ /* 1 */
.name = "SvrWks CSB5",
.init_setup = init_setup_svwks,
.init_chipset = init_chipset_svwks,
.init_hwif = init_hwif_svwks,
.init_dma = init_dma_svwks,
.channels = 2,
.autodma = AUTODMA,
.bootable = ON_BOARD,
},{ /* 2 */
.name = "SvrWks CSB6",
.init_setup = init_setup_csb6,
.init_chipset = init_chipset_svwks,
.init_hwif = init_hwif_svwks,
.init_dma = init_dma_svwks,
.channels = 2,
.autodma = AUTODMA,
.bootable = ON_BOARD,
},{ /* 3 */
.name = "SvrWks CSB6",
.init_setup = init_setup_csb6,
.init_chipset = init_chipset_svwks,
.init_hwif = init_hwif_svwks,
.init_dma = init_dma_svwks,
.channels = 1, /* 2 */
.autodma = AUTODMA,
.bootable = ON_BOARD,
}
};
#endif /* SERVERWORKS_H */
include/linux/ide.h
View file @ 80b8bedf
......@@ -1275,20 +1275,6 @@ typedef struct ide_task_s {
void *special; /* valid_t generally */
} ide_task_t;
typedef struct pkt_task_s {
/*
* struct hd_drive_task_hdr pktf;
* task_struct_t pktf;
* u8 pkcdb[12];
*/
task_ioreg_t tfRegister[8];
int data_phase;
int command_type;
ide_handler_t *handler;
struct request *rq; /* copy of request */
void *special;
} pkt_task_t;
extern u32 ide_read_24(ide_drive_t *);
extern void SELECT_DRIVE(ide_drive_t *);
......
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