Commit 80d67b95 authored by Peng Li's avatar Peng Li Committed by David S. Miller

net: wan: fix the comments style issue

Block comments use * on subsequent lines.
Block comments use a trailing */ on a separate line.
Signed-off-by: default avatarPeng Li <lipeng321@huawei.com>
Signed-off-by: default avatarGuangbin Huang <huangguangbin2@huawei.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 336d781b
......@@ -569,12 +569,14 @@ static int wanxl_pci_init_one(struct pci_dev *pdev,
return i;
/* QUICC can only access first 256 MB of host RAM directly,
but PLX9060 DMA does 32-bits for actual packet data transfers */
* but PLX9060 DMA does 32-bits for actual packet data transfers
*/
/* FIXME when PCI/DMA subsystems are fixed.
We set both dma_mask and consistent_dma_mask to 28 bits
and pray pci_alloc_consistent() will use this info. It should
work on most platforms */
* We set both dma_mask and consistent_dma_mask to 28 bits
* and pray pci_alloc_consistent() will use this info. It should
* work on most platforms
*/
if (dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(28)) ||
dma_set_mask(&pdev->dev, DMA_BIT_MASK(28))) {
pr_err("No usable DMA configuration\n");
......@@ -624,8 +626,9 @@ static int wanxl_pci_init_one(struct pci_dev *pdev,
#endif
/* FIXME when PCI/DMA subsystems are fixed.
We set both dma_mask and consistent_dma_mask back to 32 bits
to indicate the card can do 32-bit DMA addressing */
* We set both dma_mask and consistent_dma_mask back to 32 bits
* to indicate the card can do 32-bit DMA addressing
*/
if (dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)) ||
dma_set_mask(&pdev->dev, DMA_BIT_MASK(32))) {
pr_err("No usable DMA configuration\n");
......
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