Commit 80fa66b6 authored by Rodrigo Vivi's avatar Rodrigo Vivi Committed by Ander Conselvan de Oliveira

drm/i915: Create a common GEN9_LP_FEATURE.

The following LP platform inherits a lot of this platform
So let's simplify here to re-use this later.

v2: Keep ddb_size out of the new macro.
v3: Rebase (has_decoupled_mmio). (Imre)
Signed-off-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: default avatarAnder Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: default avatarImre Deak <imre.deak@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1480584796-19466-1-git-send-email-ander.conselvan.de.oliveira@intel.com
parent cd8bddc4
...@@ -343,31 +343,34 @@ static const struct intel_device_info intel_skylake_gt3_info = { ...@@ -343,31 +343,34 @@ static const struct intel_device_info intel_skylake_gt3_info = {
.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING, .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
}; };
#define GEN9_LP_FEATURES \
.gen = 9, \
.has_hotplug = 1, \
.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, \
.num_pipes = 3, \
.has_64bit_reloc = 1, \
.has_ddi = 1, \
.has_fpga_dbg = 1, \
.has_fbc = 1, \
.has_runtime_pm = 1, \
.has_pooled_eu = 0, \
.has_csr = 1, \
.has_resource_streamer = 1, \
.has_rc6 = 1, \
.has_dp_mst = 1, \
.has_gmbus_irq = 1, \
.has_hw_contexts = 1, \
.has_logical_ring_contexts = 1, \
.has_guc = 1, \
.has_decoupled_mmio = 1, \
GEN_DEFAULT_PIPEOFFSETS, \
IVB_CURSOR_OFFSETS, \
BDW_COLORS
static const struct intel_device_info intel_broxton_info = { static const struct intel_device_info intel_broxton_info = {
.is_broxton = 1, .is_broxton = 1,
.gen = 9, GEN9_LP_FEATURES,
.has_hotplug = 1,
.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
.num_pipes = 3,
.has_64bit_reloc = 1,
.has_ddi = 1,
.has_fpga_dbg = 1,
.has_fbc = 1,
.has_runtime_pm = 1,
.has_pooled_eu = 0,
.has_csr = 1,
.has_resource_streamer = 1,
.has_rc6 = 1,
.has_dp_mst = 1,
.has_gmbus_irq = 1,
.has_hw_contexts = 1,
.has_logical_ring_contexts = 1,
.has_guc = 1,
.has_decoupled_mmio = 1,
.ddb_size = 512, .ddb_size = 512,
GEN_DEFAULT_PIPEOFFSETS,
IVB_CURSOR_OFFSETS,
BDW_COLORS,
}; };
static const struct intel_device_info intel_kabylake_info = { static const struct intel_device_info intel_kabylake_info = {
......
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