Commit 80fbe6ac authored by Daniel Glöckner's avatar Daniel Glöckner Committed by Mark Brown

ASoC: correct s6000 I2S clock polarity

According to the data sheet data is clocked out on the falling edge
and latched on the rising edge of the bit clock. While the left sample
is transmitted the word clock line is low.
Signed-off-by: default avatarDaniel Glöckner <dg@emlix.com>
Signed-off-by: default avatarMark Brown <broonie@opensource.wolfsonmicro.com>
parent 2b7dbbe0
......@@ -252,10 +252,10 @@ static int s6000_i2s_set_dai_fmt(struct snd_soc_dai *cpu_dai,
}
switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
case SND_SOC_DAIFMT_IB_IF:
case SND_SOC_DAIFMT_NB_NF:
w |= S6_I2S_LEFT_FIRST;
break;
case SND_SOC_DAIFMT_IB_NF:
case SND_SOC_DAIFMT_NB_IF:
w |= S6_I2S_RIGHT_FIRST;
break;
default:
......
......@@ -43,7 +43,7 @@ static int s6105_hw_params(struct snd_pcm_substream *substream,
/* set cpu DAI configuration */
ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_CBM_CFM |
SND_SOC_DAIFMT_IB_IF);
SND_SOC_DAIFMT_NB_NF);
if (ret < 0)
return ret;
......
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