Commit 82045b8c authored by Nick Hu's avatar Nick Hu Committed by Greg Kroah-Hartman

riscv: Fix udelay in RV32.

[ Upstream commit d0e1f211 ]

In RV32, udelay would delay the wrong cycle. When it shifts right
"UDELAY_SHIFT" bits, it either delays 0 cycle or 1 cycle. It only works
correctly in RV64. Because the 'ucycles' always needs to be 64 bits
variable.
Signed-off-by: default avatarNick Hu <nickhu@andestech.com>
Reviewed-by: default avatarPalmer Dabbelt <palmer@sifive.com>
[paul.walmsley@sifive.com: fixed minor spelling error]
Signed-off-by: default avatarPaul Walmsley <paul.walmsley@sifive.com>
Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
parent 1ef49d30
...@@ -88,7 +88,7 @@ EXPORT_SYMBOL(__delay); ...@@ -88,7 +88,7 @@ EXPORT_SYMBOL(__delay);
void udelay(unsigned long usecs) void udelay(unsigned long usecs)
{ {
unsigned long ucycles = usecs * lpj_fine * UDELAY_MULT; u64 ucycles = (u64)usecs * lpj_fine * UDELAY_MULT;
if (unlikely(usecs > MAX_UDELAY_US)) { if (unlikely(usecs > MAX_UDELAY_US)) {
__delay((u64)usecs * riscv_timebase / 1000000ULL); __delay((u64)usecs * riscv_timebase / 1000000ULL);
......
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