Commit 824831fa authored by David S. Miller's avatar David S. Miller

Merge branch 'dsa-mv88e6xxx-debugfs'

Andrew Lunn says:

====================
debugfs for mv88e6xxx

This patchset adds some debugfs files for seeing into a mv88e6xxx
family of switch chips.

DB   T/P  Vec State Addr
003  Port 008   7   00:22:02:00:18:44
003  Port 008   6   80:ee:73:83:60:27
005  Port 020   7   94:10:3e:80:bc:f3
0f8  Port 001   6   8e:25:13:53:44:de

This walks all possible entries, so is a bit slow, but is always
correct.

Target Port
   0   15
   1   15
   2   15
   3   15
   4   15
   5   15
   6   15
   7   15
   8   15
   9   15
-->snip<--
  31   15

A rather boring example, since i only have one switch here. But this shows
the routing between multiple switches.

    GLOBAL GLOBAL2   0    1    2    3    4    5    6
 0:  c804       0  1e4f 100f 100f 1e4f 1e0f  e07  e07
 1:    fe       0     3    3    3    3    3 c03e c03f
 2:     0    ffff     0    0    0    0    0    0    0
 3:     0    ffff  1721 1721 1721 1721 1721 1721 1721
 4:  6000     258   433  431  431  433  433 373f  433
 5:     0      ff     0    0    0    0    0    0    0
 6:  c000    1f0f  2026 2025 2023 3020 4020 501f 6020
 7:     0    707f     0    0    0    0    0    0    0
 8:     0    7800  2080 2080 2080 2080 2080 2080 2080
 9:     0    1600     1    1    1    1    1    1    1
 a:   148       0     0    0    0    0    0    0    0
 b:  4000    1000     1    2    4    8   10   20   40
 c:     0      7f     0    0    0    0    0    0    0
 d:  ffff     5f3     0    0    0    0    0    0    0
 e:  ffff       6     0    0    0    0    0    0    0
 f:  ffff     f00  dada dada dada dada dada dada dada
10:     0       0     0    0    0    0    0    0    0
11:     0       0     0    0    0    0    0    0    0
12:  5555       0     0    0    0    0    0    0    0
13:  5555       0    1a    0    0 1df0    0 1e07    0
14:  aaaa     400     0    0    0    0    0    0    0
15:  aaaa       0     0    0    0    0    0    0    0
16:  ffff       0  6011 6011 6011 6011   33   33    0
17:  ffff       0     0    0    0    0    0    0    0
18:  fa41    1844  3210 3210 3210 3210 3210 3210 3210
19:     0     1e1  7654 7654 7654 7654 7654 7654 7654
1a:  5550       0     0    0    0    0    0    0    0
1b:   1fb    f869  8000 8000 8000 8000 8000 8000 8000
1c:     0       0     0    0    0    0    0    0    0
1d:   c00       0     0    0    0    0    0    0    0
1e:     0       0     0    0    0    0    0    0    0
1f:     0       0     0    0    0    0    0    0    0

All the switch registers which are directly accessible.

      Statistic       Port  0  Port  1  Port  2  Port  3  Port  4  Port  5  Port 6
     in_good_octets:     2176        0        0  4263711        0   499540       0
      in_bad_octets:    46050        0        0    50196        0        0       0
         in_unicast:        0        0        0     7693        0     7691       0
      in_broadcasts:        0        0        0        0        0        3       0
      in_multicasts:       34        0        0        0        0       27       0
           in_pause:        0        0        0        0        0        0       0
       in_undersize:        0        0        0        0        0        0       0
       in_fragments:       45        0        0        2        0        0       0
        in_oversize:        0        0        0        0        0        0       0
          in_jabber:        0        0        0        0        0        0       0
        in_rx_error:        0        0        0        0        0        0       0
       in_fcs_error:      159        0        0       37        0        0       0
         out_octets:      808        0        0   496608      336  4267159       0
        out_unicast:        0        0        0     7691        0     7693       0
     out_broadcasts:        1        0        0        3        0        0       0
     out_multicasts:        9        0        0        6        4       34       0
          out_pause:        0        0        0        0        0        0       0
          excessive:        0        0        0        0        0        0       0
         collisions:        0        0        0        0        0        0       0
           deferred:        0        0        0        0        0        0       0
             single:        0        0        0        0        0        0       0
           multiple:        0        0        0        0        0        0       0
      out_fcs_error:        0        0        0        0        0        0       0
               late:        0        0        0        0        0        0       0
       hist_64bytes:       36        0        0     7577        0     7574       0
   hist_65_127bytes:       53        0        0      241        4      298       0
  hist_128_255bytes:       50        0        0       12        0       10       0
  hist_256_511bytes:       43        0        0        8        0        2       0
 hist_512_1023bytes:       18        0        0     7573        0     7564       0
hist_1024_max_bytes:        3        0        0       19        0        0       0
     sw_in_discards:        0        0        0        0        0        0       0
     sw_in_filtered:        0        0        0        0        0        0       0
    sw_out_filtered:       34        0        0     7693        0     7721       0

Of particular interest here is that you get to see all ports,
including the CPU port and any DSA ports. You cannot get statistics
for these ports via ethtool.
====================
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 45dac1d6 56d95e22
This diff is collapsed.
......@@ -11,6 +11,10 @@
#ifndef __MV88E6XXX_H
#define __MV88E6XXX_H
#ifndef UINT64_MAX
#define UINT64_MAX (u64)(~((u64)0))
#endif
#define SMI_CMD 0x00
#define SMI_CMD_BUSY BIT(15)
#define SMI_CMD_CLAUSE_22 BIT(12)
......@@ -193,6 +197,9 @@
#define GLOBAL_ATU_OP_FLUSH_NON_STATIC_DB ((6 << 12) | GLOBAL_ATU_OP_BUSY)
#define GLOBAL_ATU_OP_GET_CLR_VIOLATION ((7 << 12) | GLOBAL_ATU_OP_BUSY)
#define GLOBAL_ATU_DATA 0x0c
#define GLOBAL_ATU_DATA_TRUNK BIT(15)
#define GLOBAL_ATU_DATA_PORT_VECTOR_MASK 0x3ff0
#define GLOBAL_ATU_DATA_PORT_VECTOR_SHIFT 4
#define GLOBAL_ATU_DATA_STATE_MASK 0x0f
#define GLOBAL_ATU_DATA_STATE_UNUSED 0x00
#define GLOBAL_ATU_DATA_STATE_UC_MGMT 0x0d
......@@ -253,6 +260,7 @@
#define GLOBAL2_DEVICE_MAPPING 0x06
#define GLOBAL2_DEVICE_MAPPING_UPDATE BIT(15)
#define GLOBAL2_DEVICE_MAPPING_TARGET_SHIFT 8
#define GLOBAL2_DEVICE_MAPPING_PORT_MASK 0x0f
#define GLOBAL2_TRUNK_MASK 0x07
#define GLOBAL2_TRUNK_MASK_UPDATE BIT(15)
#define GLOBAL2_TRUNK_MASK_NUM_SHIFT 12
......@@ -289,6 +297,9 @@
#define GLOBAL2_SMI_OP_45_READ_DATA ((2 << 10) | GLOBAL2_SMI_OP_BUSY)
#define GLOBAL2_SMI_DATA 0x19
#define GLOBAL2_SCRATCH_MISC 0x1a
#define GLOBAL2_SCRATCH_BUSY BIT(15)
#define GLOBAL2_SCRATCH_REGISTER_SHIFT 8
#define GLOBAL2_SCRATCH_VALUE_MASK 0xff
#define GLOBAL2_WDOG_CONTROL 0x1b
#define GLOBAL2_QOS_WEIGHT 0x1c
#define GLOBAL2_MISC 0x1d
......@@ -339,6 +350,8 @@ struct mv88e6xxx_priv_state {
u8 port_state[DSA_MAX_PORTS];
struct work_struct bridge_work;
struct dentry *dbgfs;
};
struct mv88e6xxx_hw_stat {
......
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