Commit 82809601 authored by Tony Lindgren's avatar Tony Lindgren

ARM: OMAP: Remove cpu_is_omap usage from plat-omap/dma.c

This code will be eventually in drivers, and for the
code in the drivers we don't want to have any cpu_is_omap
usage. Those macros should be private to arch/arm/mach-omap1
and arch/arm/mach-omap2.

To fix this, let's move the define for dma_omap2plus()
to dma-omap.h, and use the existing dma_attr passed in
the platform_data as the revision registers are what they
are.

Note that we can now also remove the relative includes
introduced by the recent clean-up patches.

Cc: Russell King <linux@arm.linux.org.uk>
Cc: Vinod Koul <vinod.koul@intel.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent 32dee01e
......@@ -321,6 +321,9 @@ static int __init omap1_system_dma_init(void)
d->dev_caps = ENABLE_1510_MODE;
enable_1510_mode = d->dev_caps & ENABLE_1510_MODE;
if (cpu_is_omap16xx())
d->dev_caps = ENABLE_16XX_MODE;
d->dev_caps |= SRC_PORT;
d->dev_caps |= DST_PORT;
d->dev_caps |= SRC_INDEX;
......
......@@ -276,6 +276,9 @@ static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused)
return -ENOMEM;
}
if (cpu_is_omap34xx() && (omap_type() != OMAP2_DEVICE_TYPE_GP))
d->dev_caps |= HS_CHANNELS_RESERVED;
/* Check the capabilities register for descriptor loading feature */
if (dma_read(CAPS_0, 0) & DMA_HAS_DESCRIPTOR_CAPS)
dma_common_ch_end = CCDN;
......
This diff is collapsed.
......@@ -130,10 +130,12 @@
#define SRC_PORT BIT(0x7)
#define DST_PORT BIT(0x8)
#define SRC_INDEX BIT(0x9)
#define DST_INDEX BIT(0xA)
#define IS_BURST_ONLY4 BIT(0xB)
#define CLEAR_CSR_ON_READ BIT(0xC)
#define IS_WORD_16 BIT(0xD)
#define DST_INDEX BIT(0xa)
#define IS_BURST_ONLY4 BIT(0xb)
#define CLEAR_CSR_ON_READ BIT(0xc)
#define IS_WORD_16 BIT(0xd)
#define ENABLE_16XX_MODE BIT(0xe)
#define HS_CHANNELS_RESERVED BIT(0xf)
/* Defines for DMA Capabilities */
#define DMA_HAS_TRANSPARENT_CAPS (0x1 << 18)
......@@ -270,6 +272,15 @@ struct omap_system_dma_plat_info {
u32 (*dma_read)(int reg, int lch);
};
#ifdef CONFIG_ARCH_OMAP2PLUS
#define dma_omap2plus() 1
#else
#define dma_omap2plus() 0
#endif
#define dma_omap1() (!dma_omap2plus())
#define dma_omap15xx() ((dma_omap1() && (d->dev_caps & ENABLE_1510_MODE)))
#define dma_omap16xx() ((dma_omap1() && (d->dev_caps & ENABLE_16XX_MODE)))
extern void __init omap_init_consistent_dma_size(void);
extern void omap_set_dma_priority(int lch, int dst_port, int priority);
extern int omap_request_dma(int dev_id, const char *dev_name,
......
......@@ -21,12 +21,6 @@
#include <plat-omap/dma-omap.h>
#ifdef CONFIG_ARCH_OMAP2PLUS
#define dma_omap2plus() 1
#else
#define dma_omap2plus() 0
#endif
struct omap_dmadev {
struct dma_device ddev;
spinlock_t lock;
......
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