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Commit 828369f2 authored by Thomas Zimmermann's avatar Thomas Zimmermann
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drm/mgag200: Move CRTC atomic_enable to model-specific code 

The CRTC atomic_enable helper contains per-model branches for
G200ER, G200EV and G200SE devices. Implement a dedicated helper
for each of them and remove the branches from the shared helper.
Signed-off-by: default avatarThomas Zimmermann <tzimmermann@suse.de>
Reviewed-by: default avatarJocelyn Falempe <jfalempe@redhat.com>
Tested-by: default avatarJocelyn Falempe <jfalempe@redhat.com>
Acked-by: default avatarSam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20220728124103.30159-14-tzimmermann@suse.de
parent bc835040
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Showing with 172 additions and 85 deletions
drivers/gpu/drm/mgag200/mgag200_drv.h
View file @ 828369f2
......@@ -210,8 +210,6 @@ enum mga_type {
G200_EW3,
};
#define IS_G200_SE(mdev) (mdev->type == G200_SE_A || mdev->type == G200_SE_B)
struct mgag200_device_info {
u16 max_hdisplay;
u16 max_vdisplay;
......@@ -438,7 +436,9 @@ int mgag200_vga_connector_helper_get_modes(struct drm_connector *connector);
.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, \
.atomic_destroy_state = drm_atomic_helper_connector_destroy_state
resource_size_t mgag200_device_probe_vram(struct mga_device *mdev);
void mgag200_set_mode_regs(struct mga_device *mdev, const struct drm_display_mode *mode);
void mgag200_set_format_regs(struct mga_device *mdev, const struct drm_format_info *format);
void mgag200_enable_display(struct mga_device *mdev);
void mgag200_init_registers(struct mga_device *mdev);
int mgag200_mode_config_init(struct mga_device *mdev, resource_size_t vram_available);
......
drivers/gpu/drm/mgag200/mgag200_g200er.c
View file @ 828369f2
......@@ -36,6 +36,22 @@ static void mgag200_g200er_init_registers(struct mga_device *mdev)
WREG_ECRT(0x24, 0x5); /* G200ER specific */
}
static void mgag200_g200er_reset_tagfifo(struct mga_device *mdev)
{
static const uint32_t RESET_FLAG = 0x00200000; /* undocumented magic value */
u32 memctl;
memctl = RREG32(MGAREG_MEMCTL);
memctl |= RESET_FLAG;
WREG32(MGAREG_MEMCTL, memctl);
udelay(1000);
memctl &= ~RESET_FLAG;
WREG32(MGAREG_MEMCTL, memctl);
}
/*
* PIXPLLC
*/
......@@ -164,8 +180,40 @@ static const struct drm_plane_funcs mgag200_g200er_primary_plane_funcs = {
MGAG200_PRIMARY_PLANE_FUNCS,
};
static void mgag200_g200er_crtc_helper_atomic_enable(struct drm_crtc *crtc,
struct drm_atomic_state *old_state)
{
struct drm_device *dev = crtc->dev;
struct mga_device *mdev = to_mga_device(dev);
const struct mgag200_device_funcs *funcs = mdev->funcs;
struct drm_crtc_state *crtc_state = crtc->state;
struct drm_display_mode *adjusted_mode = &crtc_state->adjusted_mode;
struct mgag200_crtc_state *mgag200_crtc_state = to_mgag200_crtc_state(crtc_state);
const struct drm_format_info *format = mgag200_crtc_state->format;
if (funcs->disable_vidrst)
funcs->disable_vidrst(mdev);
mgag200_set_format_regs(mdev, format);
mgag200_set_mode_regs(mdev, adjusted_mode);
if (funcs->pixpllc_atomic_update)
funcs->pixpllc_atomic_update(crtc, old_state);
mgag200_g200er_reset_tagfifo(mdev);
mgag200_enable_display(mdev);
if (funcs->enable_vidrst)
funcs->enable_vidrst(mdev);
}
static const struct drm_crtc_helper_funcs mgag200_g200er_crtc_helper_funcs = {
MGAG200_CRTC_HELPER_FUNCS,
.mode_valid = mgag200_crtc_helper_mode_valid,
.atomic_check = mgag200_crtc_helper_atomic_check,
.atomic_flush = mgag200_crtc_helper_atomic_flush,
.atomic_enable = mgag200_g200er_crtc_helper_atomic_enable,
.atomic_disable = mgag200_crtc_helper_atomic_disable
};
static const struct drm_crtc_funcs mgag200_g200er_crtc_funcs = {
......
drivers/gpu/drm/mgag200/mgag200_g200ev.c
View file @ 828369f2
......@@ -36,6 +36,11 @@ static void mgag200_g200ev_init_registers(struct mga_device *mdev)
mgag200_init_registers(mdev);
}
static void mgag200_g200ev_set_hiprilvl(struct mga_device *mdev)
{
WREG_ECRT(0x06, 0x00);
}
/*
* PIXPLLC
*/
......@@ -176,8 +181,40 @@ static const struct drm_plane_funcs mgag200_g200ev_primary_plane_funcs = {
MGAG200_PRIMARY_PLANE_FUNCS,
};
static void mgag200_g200ev_crtc_helper_atomic_enable(struct drm_crtc *crtc,
struct drm_atomic_state *old_state)
{
struct drm_device *dev = crtc->dev;
struct mga_device *mdev = to_mga_device(dev);
const struct mgag200_device_funcs *funcs = mdev->funcs;
struct drm_crtc_state *crtc_state = crtc->state;
struct drm_display_mode *adjusted_mode = &crtc_state->adjusted_mode;
struct mgag200_crtc_state *mgag200_crtc_state = to_mgag200_crtc_state(crtc_state);
const struct drm_format_info *format = mgag200_crtc_state->format;
if (funcs->disable_vidrst)
funcs->disable_vidrst(mdev);
mgag200_set_format_regs(mdev, format);
mgag200_set_mode_regs(mdev, adjusted_mode);
if (funcs->pixpllc_atomic_update)
funcs->pixpllc_atomic_update(crtc, old_state);
mgag200_g200ev_set_hiprilvl(mdev);
mgag200_enable_display(mdev);
if (funcs->enable_vidrst)
funcs->enable_vidrst(mdev);
}
static const struct drm_crtc_helper_funcs mgag200_g200ev_crtc_helper_funcs = {
MGAG200_CRTC_HELPER_FUNCS,
.mode_valid = mgag200_crtc_helper_mode_valid,
.atomic_check = mgag200_crtc_helper_atomic_check,
.atomic_flush = mgag200_crtc_helper_atomic_flush,
.atomic_enable = mgag200_g200ev_crtc_helper_atomic_enable,
.atomic_disable = mgag200_crtc_helper_atomic_disable
};
static const struct drm_crtc_funcs mgag200_g200ev_crtc_funcs = {
......
drivers/gpu/drm/mgag200/mgag200_g200se.c
View file @ 828369f2
......@@ -61,6 +61,52 @@ static void mgag200_g200se_init_registers(struct mgag200_g200se_device *g200se)
mgag200_init_registers(mdev);
}
static void mgag200_g200se_set_hiprilvl(struct mga_device *mdev,
const struct drm_display_mode *mode,
const struct drm_format_info *format)
{
struct mgag200_g200se_device *g200se = to_mgag200_g200se_device(&mdev->base);
unsigned int hiprilvl;
u8 crtcext6;
if (g200se->unique_rev_id >= 0x04) {
hiprilvl = 0;
} else if (g200se->unique_rev_id >= 0x02) {
unsigned int bpp;
unsigned long mb;
if (format->cpp[0] * 8 > 16)
bpp = 32;
else if (format->cpp[0] * 8 > 8)
bpp = 16;
else
bpp = 8;
mb = (mode->clock * bpp) / 1000;
if (mb > 3100)
hiprilvl = 0;
else if (mb > 2600)
hiprilvl = 1;
else if (mb > 1900)
hiprilvl = 2;
else if (mb > 1160)
hiprilvl = 3;
else if (mb > 440)
hiprilvl = 4;
else
hiprilvl = 5;
} else if (g200se->unique_rev_id >= 0x01) {
hiprilvl = 3;
} else {
hiprilvl = 4;
}
crtcext6 = hiprilvl; /* implicitly sets maxhipri to 0 */
WREG_ECRT(0x06, crtcext6);
}
/*
* PIXPLLC
*/
......@@ -265,8 +311,40 @@ static const struct drm_plane_funcs mgag200_g200se_primary_plane_funcs = {
MGAG200_PRIMARY_PLANE_FUNCS,
};
static void mgag200_g200se_crtc_helper_atomic_enable(struct drm_crtc *crtc,
struct drm_atomic_state *old_state)
{
struct drm_device *dev = crtc->dev;
struct mga_device *mdev = to_mga_device(dev);
const struct mgag200_device_funcs *funcs = mdev->funcs;
struct drm_crtc_state *crtc_state = crtc->state;
struct drm_display_mode *adjusted_mode = &crtc_state->adjusted_mode;
struct mgag200_crtc_state *mgag200_crtc_state = to_mgag200_crtc_state(crtc_state);
const struct drm_format_info *format = mgag200_crtc_state->format;
if (funcs->disable_vidrst)
funcs->disable_vidrst(mdev);
mgag200_set_format_regs(mdev, format);
mgag200_set_mode_regs(mdev, adjusted_mode);
if (funcs->pixpllc_atomic_update)
funcs->pixpllc_atomic_update(crtc, old_state);
mgag200_g200se_set_hiprilvl(mdev, adjusted_mode, format);
mgag200_enable_display(mdev);
if (funcs->enable_vidrst)
funcs->enable_vidrst(mdev);
}
static const struct drm_crtc_helper_funcs mgag200_g200se_crtc_helper_funcs = {
MGAG200_CRTC_HELPER_FUNCS,
.mode_valid = mgag200_crtc_helper_mode_valid,
.atomic_check = mgag200_crtc_helper_atomic_check,
.atomic_flush = mgag200_crtc_helper_atomic_flush,
.atomic_enable = mgag200_g200se_crtc_helper_atomic_enable,
.atomic_disable = mgag200_crtc_helper_atomic_disable
};
static const struct drm_crtc_funcs mgag200_g200se_crtc_funcs = {
......
drivers/gpu/drm/mgag200/mgag200_mode.c
View file @ 828369f2
......@@ -199,8 +199,7 @@ void mgag200_init_registers(struct mga_device *mdev)
WREG8(MGA_MISC_OUT, misc);
}
static void mgag200_set_mode_regs(struct mga_device *mdev,
const struct drm_display_mode *mode)
void mgag200_set_mode_regs(struct mga_device *mdev, const struct drm_display_mode *mode)
{
const struct mgag200_device_info *info = mdev->info;
unsigned int hdisplay, hsyncstart, hsyncend, htotal;
......@@ -324,7 +323,7 @@ static void mgag200_set_offset(struct mga_device *mdev,
WREG_ECRT(0x00, crtcext0);
}
static void mgag200_set_format_regs(struct mga_device *mdev, const struct drm_format_info *format)
void mgag200_set_format_regs(struct mga_device *mdev, const struct drm_format_info *format)
{
struct drm_device *dev = &mdev->base;
unsigned int bpp, bppshift, scale;
......@@ -387,74 +386,7 @@ static void mgag200_set_format_regs(struct mga_device *mdev, const struct drm_fo
WREG_ECRT(3, crtcext3);
}
static void mgag200_g200er_reset_tagfifo(struct mga_device *mdev)
{
static uint32_t RESET_FLAG = 0x00200000; /* undocumented magic value */
u32 memctl;
memctl = RREG32(MGAREG_MEMCTL);
memctl |= RESET_FLAG;
WREG32(MGAREG_MEMCTL, memctl);
udelay(1000);
memctl &= ~RESET_FLAG;
WREG32(MGAREG_MEMCTL, memctl);
}
static void mgag200_g200se_set_hiprilvl(struct mga_device *mdev,
const struct drm_display_mode *mode,
const struct drm_format_info *format)
{
struct mgag200_g200se_device *g200se = to_mgag200_g200se_device(&mdev->base);
unsigned int hiprilvl;
u8 crtcext6;
if (g200se->unique_rev_id >= 0x04) {
hiprilvl = 0;
} else if (g200se->unique_rev_id >= 0x02) {
unsigned int bpp;
unsigned long mb;
if (format->cpp[0] * 8 > 16)
bpp = 32;
else if (format->cpp[0] * 8 > 8)
bpp = 16;
else
bpp = 8;
mb = (mode->clock * bpp) / 1000;
if (mb > 3100)
hiprilvl = 0;
else if (mb > 2600)
hiprilvl = 1;
else if (mb > 1900)
hiprilvl = 2;
else if (mb > 1160)
hiprilvl = 3;
else if (mb > 440)
hiprilvl = 4;
else
hiprilvl = 5;
} else if (g200se->unique_rev_id >= 0x01) {
hiprilvl = 3;
} else {
hiprilvl = 4;
}
crtcext6 = hiprilvl; /* implicitly sets maxhipri to 0 */
WREG_ECRT(0x06, crtcext6);
}
static void mgag200_g200ev_set_hiprilvl(struct mga_device *mdev)
{
WREG_ECRT(0x06, 0x00);
}
static void mgag200_enable_display(struct mga_device *mdev)
void mgag200_enable_display(struct mga_device *mdev)
{
u8 seq0, crtcext1;
......@@ -709,14 +641,6 @@ void mgag200_crtc_helper_atomic_enable(struct drm_crtc *crtc, struct drm_atomic_
if (funcs->pixpllc_atomic_update)
funcs->pixpllc_atomic_update(crtc, old_state);
if (mdev->type == G200_ER)
mgag200_g200er_reset_tagfifo(mdev);
if (IS_G200_SE(mdev))
mgag200_g200se_set_hiprilvl(mdev, adjusted_mode, format);
else if (mdev->type == G200_EV)
mgag200_g200ev_set_hiprilvl(mdev);
mgag200_enable_display(mdev);
if (funcs->enable_vidrst)
......
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