Commit 833f2cbf authored by Shengjiu Wang's avatar Shengjiu Wang Committed by Shawn Guo

ARM: dts: imx6: change the core clock of spdif

The correct core clock of spdif is SPDIF_GCLK, which is added to
clock tree. So the dts also need to be updated.
Signed-off-by: default avatarShengjiu Wang <shengjiu.wang@freescale.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 65425265
...@@ -218,16 +218,16 @@ spdif: spdif@02004000 { ...@@ -218,16 +218,16 @@ spdif: spdif@02004000 {
dmas = <&sdma 14 18 0>, dmas = <&sdma 14 18 0>,
<&sdma 15 18 0>; <&sdma 15 18 0>;
dma-names = "rx", "tx"; dma-names = "rx", "tx";
clocks = <&clks IMX6QDL_CLK_SPDIF>, <&clks IMX6QDL_CLK_OSC>, clocks = <&clks IMX6QDL_CLK_SPDIF_GCLK>, <&clks IMX6QDL_CLK_OSC>,
<&clks IMX6QDL_CLK_SPDIF>, <&clks IMX6QDL_CLK_DUMMY>, <&clks IMX6QDL_CLK_SPDIF>, <&clks IMX6QDL_CLK_ASRC>,
<&clks IMX6QDL_CLK_DUMMY>, <&clks IMX6QDL_CLK_DUMMY>, <&clks IMX6QDL_CLK_DUMMY>, <&clks IMX6QDL_CLK_ESAI_EXTAL>,
<&clks IMX6QDL_CLK_DUMMY>, <&clks IMX6QDL_CLK_DUMMY>, <&clks IMX6QDL_CLK_IPG>, <&clks IMX6QDL_CLK_MLB>,
<&clks IMX6QDL_CLK_DUMMY>; <&clks IMX6QDL_CLK_DUMMY>, <&clks IMX6QDL_CLK_SPBA>;
clock-names = "core", "rxtx0", clock-names = "core", "rxtx0",
"rxtx1", "rxtx2", "rxtx1", "rxtx2",
"rxtx3", "rxtx4", "rxtx3", "rxtx4",
"rxtx5", "rxtx6", "rxtx5", "rxtx6",
"rxtx7"; "rxtx7", "dma";
status = "disabled"; status = "disabled";
}; };
......
...@@ -135,8 +135,24 @@ spba: spba-bus@02000000 { ...@@ -135,8 +135,24 @@ spba: spba-bus@02000000 {
ranges; ranges;
spdif: spdif@02004000 { spdif: spdif@02004000 {
compatible = "fsl,imx6sl-spdif",
"fsl,imx35-spdif";
reg = <0x02004000 0x4000>; reg = <0x02004000 0x4000>;
interrupts = <0 52 IRQ_TYPE_LEVEL_HIGH>; interrupts = <0 52 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&sdma 14 18 0>,
<&sdma 15 18 0>;
dma-names = "rx", "tx";
clocks = <&clks IMX6SL_CLK_SPDIF_GCLK>, <&clks IMX6SL_CLK_OSC>,
<&clks IMX6SL_CLK_SPDIF>, <&clks IMX6SL_CLK_DUMMY>,
<&clks IMX6SL_CLK_DUMMY>, <&clks IMX6SL_CLK_DUMMY>,
<&clks IMX6SL_CLK_IPG>, <&clks IMX6SL_CLK_DUMMY>,
<&clks IMX6SL_CLK_DUMMY>, <&clks IMX6SL_CLK_SPBA>;
clock-names = "core", "rxtx0",
"rxtx1", "rxtx2",
"rxtx3", "rxtx4",
"rxtx5", "rxtx6",
"rxtx7", "dma";
status = "disabled";
}; };
ecspi1: ecspi@02008000 { ecspi1: ecspi@02008000 {
......
...@@ -211,7 +211,7 @@ spdif: spdif@02004000 { ...@@ -211,7 +211,7 @@ spdif: spdif@02004000 {
dmas = <&sdma 14 18 0>, dmas = <&sdma 14 18 0>,
<&sdma 15 18 0>; <&sdma 15 18 0>;
dma-names = "rx", "tx"; dma-names = "rx", "tx";
clocks = <&clks IMX6SX_CLK_SPDIF>, clocks = <&clks IMX6SX_CLK_SPDIF_GCLK>,
<&clks IMX6SX_CLK_OSC>, <&clks IMX6SX_CLK_OSC>,
<&clks IMX6SX_CLK_SPDIF>, <&clks IMX6SX_CLK_SPDIF>,
<&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>,
......
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