Commit 84059a0e authored by Marc Kleine-Budde's avatar Marc Kleine-Budde

Revert "riscv: dts: allwinner: d1: Add CAN controller nodes"

It turned out the dtsi changes were not quite ready, revert them for
now.

This reverts commit 6ea1ad88.

Link: https://lore.kernel.org/all/2690764.mvXUDI8C0e@jernej-laptopSuggested-by: default avatarJernej Škrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/all/20230807-riscv-allwinner-d1-revert-can-controller-nodes-v1-1-eb3f70b435d9@pengutronix.deSigned-off-by: default avatarMarc Kleine-Budde <mkl@pengutronix.de>
parent c35e927c
......@@ -131,18 +131,6 @@ uart3_pb_pins: uart3-pb-pins {
pins = "PB6", "PB7";
function = "uart3";
};
/omit-if-no-ref/
can0_pins: can0-pins {
pins = "PB2", "PB3";
function = "can0";
};
/omit-if-no-ref/
can1_pins: can1-pins {
pins = "PB4", "PB5";
function = "can1";
};
};
ccu: clock-controller@2001000 {
......@@ -891,23 +879,5 @@ rtc: rtc@7090000 {
clock-names = "bus", "hosc", "ahb";
#clock-cells = <1>;
};
can0: can@2504000 {
compatible = "allwinner,sun20i-d1-can";
reg = <0x02504000 0x400>;
interrupts = <SOC_PERIPHERAL_IRQ(21) IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_CAN0>;
resets = <&ccu RST_BUS_CAN0>;
status = "disabled";
};
can1: can@2504400 {
compatible = "allwinner,sun20i-d1-can";
reg = <0x02504400 0x400>;
interrupts = <SOC_PERIPHERAL_IRQ(22) IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_CAN1>;
resets = <&ccu RST_BUS_CAN1>;
status = "disabled";
};
};
};
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