Commit 8435cf75 authored by Thomas Gleixner's avatar Thomas Gleixner

arm: Replace various irq_desc accesses

Use the proper functions. There is no need to fiddle with irq_desc.
Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>C
Acked-by: default avatarTony Lindgren <tony@atomide.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: arm <linux-arm-kernel@lists.infradead.org>
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Link: http://lkml.kernel.org/r/20140223212737.099151500@linutronix.deSigned-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
parent f7bfca6d
...@@ -120,7 +120,7 @@ static void imx6q_enable_wb(bool enable) ...@@ -120,7 +120,7 @@ static void imx6q_enable_wb(bool enable)
int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode) int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode)
{ {
struct irq_desc *iomuxc_irq_desc; struct irq_data *iomuxc_irq_data = irq_get_irq_data(32);
u32 val = readl_relaxed(ccm_base + CLPCR); u32 val = readl_relaxed(ccm_base + CLPCR);
val &= ~BM_CLPCR_LPM; val &= ~BM_CLPCR_LPM;
...@@ -167,10 +167,9 @@ int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode) ...@@ -167,10 +167,9 @@ int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode)
* 3) Software should mask IRQ #32 right after CCM Low-Power mode * 3) Software should mask IRQ #32 right after CCM Low-Power mode
* is set (set bits 0-1 of CCM_CLPCR). * is set (set bits 0-1 of CCM_CLPCR).
*/ */
iomuxc_irq_desc = irq_to_desc(32); imx_gpc_irq_unmask(iomuxc_irq_data);
imx_gpc_irq_unmask(&iomuxc_irq_desc->irq_data);
writel_relaxed(val, ccm_base + CLPCR); writel_relaxed(val, ccm_base + CLPCR);
imx_gpc_irq_mask(&iomuxc_irq_desc->irq_data); imx_gpc_irq_mask(iomuxc_irq_data);
return 0; return 0;
} }
......
...@@ -44,13 +44,10 @@ static unsigned int irq_counter[16]; ...@@ -44,13 +44,10 @@ static unsigned int irq_counter[16];
static irqreturn_t deferred_fiq(int irq, void *dev_id) static irqreturn_t deferred_fiq(int irq, void *dev_id)
{ {
struct irq_desc *irq_desc;
struct irq_chip *irq_chip = NULL;
int gpio, irq_num, fiq_count; int gpio, irq_num, fiq_count;
struct irq_chip *irq_chip;
irq_desc = irq_to_desc(gpio_to_irq(AMS_DELTA_GPIO_PIN_KEYBRD_CLK)); irq_chip = irq_get_irq_chip(gpio_to_irq(AMS_DELTA_GPIO_PIN_KEYBRD_CLK));
if (irq_desc)
irq_chip = irq_desc->irq_data.chip;
/* /*
* For each handled GPIO interrupt, keep calling its interrupt handler * For each handled GPIO interrupt, keep calling its interrupt handler
......
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