Commit 849139d4 authored by Bryan O'Donoghue's avatar Bryan O'Donoghue Committed by Mauro Carvalho Chehab

media: dt-bindings: media: camss: Fixup vdda regulator descriptions sdm845

If we review the schematic for RB3 Thundercomm document Turbox-845 we see
that the CAMSS CSI PHY has the same basic power-rail layout as UFS, PCIe
and USB PHYs.

We should therefore have two regulator declarations as is the case for UFS,
PCIe and USB.
Reviewed-by: default avatarRobert Foss <robert.foss@linaro.org>
Signed-off-by: default avatarBryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarHans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab@kernel.org>
parent 87137d55
...@@ -186,9 +186,13 @@ properties: ...@@ -186,9 +186,13 @@ properties:
- const: vfe1 - const: vfe1
- const: vfe_lite - const: vfe_lite
vdda-supply: vdda-phy-supply:
description: description:
Definition of the regulator used as analog power supply. Phandle to a regulator supply to PHY core block.
vdda-pll-supply:
description:
Phandle to 1.8V regulator supply to PHY refclk pll block.
required: required:
- clock-names - clock-names
...@@ -200,7 +204,8 @@ required: ...@@ -200,7 +204,8 @@ required:
- power-domains - power-domains
- reg - reg
- reg-names - reg-names
- vdda-supply - vdda-phy-supply
- vdda-pll-supply
additionalProperties: false additionalProperties: false
...@@ -344,7 +349,8 @@ examples: ...@@ -344,7 +349,8 @@ examples:
"vfe1", "vfe1",
"vfe_lite"; "vfe_lite";
vdda-supply = <&reg_2v8>; vdda-phy-supply = <&vreg_l1a_0p875>;
vdda-pll-supply = <&vreg_l26a_1p2>;
ports { ports {
#address-cells = <1>; #address-cells = <1>;
......
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