Commit 84b7290c authored by Linus Torvalds's avatar Linus Torvalds

Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/fbdev-2.6

* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/fbdev-2.6: (55 commits)
  video: udlfb: Kill off special printk wrappers, use pr_fmt().
  video: udlfb: Kill off some magic constants for EDID sizing.
  video: udlfb: deifdefify (yes, that's a word).
  fbdev: modedb: Add a new mode for 864x480 TAAL panels.
  drivers/video/i810/i810-i2c.c: fix i2c bus handling
  video: Fix the HGA framebuffer driver
  drivers/video/carminefb.c: improve error handling
  video: imxfb: Fix the maximum value for yres
  fbdev: sh_mobile_lcdcfb: Enable 32 bpp and 24 bpp support
  fbdev: sh_mipi_dsi: use platform provided register layout and values
  ARM: mach-shmobile: specify sh7372 MIPI DSI register layout
  fbdev: sh_mipi_dsi: support different register layouts
  ARM: mach-shmobile: improve MIPI DSI clock configuration
  fbdev: sh-mobile: implement MIPI DSI runtime PM support
  sisfb: eliminate compiler warnings
  sisfb: delete unused register I/O macros
  sisfb: replace setSISIDXREG with SiS_SetRegANDOR
  sisfb: replace andSISIDXREG with SiS_SetRegAND
  sisfb: replace orSISIDXREG with SiS_SetRegOR
  sisfb: replace outSISIDXREG with SiS_SetReg
  ...
parents 9858a38e 1928e87b
......@@ -501,7 +501,12 @@ static struct platform_device keysc_device = {
static struct resource mipidsi0_resources[] = {
[0] = {
.start = 0xffc60000,
.end = 0xffc68fff,
.end = 0xffc63073,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 0xffc68000,
.end = 0xffc680ef,
.flags = IORESOURCE_MEM,
},
};
......@@ -509,6 +514,7 @@ static struct resource mipidsi0_resources[] = {
static struct sh_mipi_dsi_info mipidsi0_info = {
.data_format = MIPI_RGB888,
.lcd_chan = &lcdc_info.ch[0],
.vsynw_offset = 17,
};
static struct platform_device mipidsi0_device = {
......@@ -521,44 +527,6 @@ static struct platform_device mipidsi0_device = {
},
};
/* This function will disappear when we switch to (runtime) PM */
static int __init ap4evb_init_display_clk(void)
{
struct clk *lcdc_clk;
struct clk *dsitx_clk;
int ret;
lcdc_clk = clk_get(&lcdc_device.dev, "sh_mobile_lcdc_fb.0");
if (IS_ERR(lcdc_clk))
return PTR_ERR(lcdc_clk);
dsitx_clk = clk_get(&mipidsi0_device.dev, "sh-mipi-dsi.0");
if (IS_ERR(dsitx_clk)) {
ret = PTR_ERR(dsitx_clk);
goto eclkdsitxget;
}
ret = clk_enable(lcdc_clk);
if (ret < 0)
goto eclklcdcon;
ret = clk_enable(dsitx_clk);
if (ret < 0)
goto eclkdsitxon;
return 0;
eclkdsitxon:
clk_disable(lcdc_clk);
eclklcdcon:
clk_put(dsitx_clk);
eclkdsitxget:
clk_put(lcdc_clk);
return ret;
}
device_initcall(ap4evb_init_display_clk);
static struct platform_device *qhd_devices[] __initdata = {
&mipidsi0_device,
&keysc_device,
......@@ -764,10 +732,15 @@ static struct platform_device lcdc1_device = {
},
};
static long ap4evb_clk_optimize(unsigned long target, unsigned long *best_freq,
unsigned long *parent_freq);
static struct sh_mobile_hdmi_info hdmi_info = {
.lcd_chan = &sh_mobile_lcdc1_info.ch[0],
.lcd_dev = &lcdc1_device.dev,
.flags = HDMI_SND_SRC_SPDIF,
.clk_optimize_parent = ap4evb_clk_optimize,
};
static struct resource hdmi_resources[] = {
......@@ -794,6 +767,25 @@ static struct platform_device hdmi_device = {
},
};
static long ap4evb_clk_optimize(unsigned long target, unsigned long *best_freq,
unsigned long *parent_freq)
{
struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick");
long error;
if (IS_ERR(hdmi_ick)) {
int ret = PTR_ERR(hdmi_ick);
pr_err("Cannot get HDMI ICK: %d\n", ret);
return ret;
}
error = clk_round_parent(hdmi_ick, target, best_freq, parent_freq, 1, 64);
clk_put(hdmi_ick);
return error;
}
static struct gpio_led ap4evb_leds[] = {
{
.name = "led4",
......
......@@ -507,7 +507,7 @@ enum { MSTP001,
MSTP223,
MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
MSTP329, MSTP328, MSTP323, MSTP322, MSTP314, MSTP313, MSTP312,
MSTP415, MSTP413, MSTP411, MSTP410, MSTP406, MSTP403,
MSTP423, MSTP415, MSTP413, MSTP411, MSTP410, MSTP406, MSTP403,
MSTP_NR };
#define MSTP(_parent, _reg, _bit, _flags) \
......@@ -543,6 +543,7 @@ static struct clk mstp_clks[MSTP_NR] = {
[MSTP314] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 14, 0), /* SDHI0 */
[MSTP313] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 13, 0), /* SDHI1 */
[MSTP312] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 12, 0), /* MMC */
[MSTP423] = MSTP(&div4_clks[DIV4_B], SMSTPCR4, 23, 0), /* DSITX1 */
[MSTP415] = MSTP(&div4_clks[DIV4_HP], SMSTPCR4, 15, 0), /* SDHI2 */
[MSTP413] = MSTP(&pllc1_div2_clk, SMSTPCR4, 13, 0), /* HDMI */
[MSTP411] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR4, 11, 0), /* IIC3 */
......@@ -596,9 +597,10 @@ static struct clk_lookup lookups[] = {
CLKDEV_CON_ID("spu_clk", &div6_clks[DIV6_SPU]),
CLKDEV_CON_ID("vou_clk", &div6_clks[DIV6_VOU]),
CLKDEV_CON_ID("hdmi_clk", &div6_reparent_clks[DIV6_HDMI]),
CLKDEV_CON_ID("dsit_clk", &div6_clks[DIV6_DSIT]),
CLKDEV_CON_ID("dsi0p_clk", &div6_clks[DIV6_DSI0P]),
CLKDEV_CON_ID("dsi1p_clk", &div6_clks[DIV6_DSI1P]),
CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSIT]),
CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSIT]),
CLKDEV_ICK_ID("dsi0p_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSI0P]),
CLKDEV_ICK_ID("dsi1p_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSI1P]),
/* MSTP32 clocks */
CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* IIC2 */
......@@ -610,7 +612,7 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("sh-mobile-csi2.0", &mstp_clks[MSTP126]), /* CSI2 */
CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP125]), /* TMU00 */
CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP125]), /* TMU01 */
CLKDEV_DEV_ID("sh-mipi-dsi.0", &mstp_clks[MSTP118]), /* DSITX */
CLKDEV_DEV_ID("sh-mipi-dsi.0", &mstp_clks[MSTP118]), /* DSITX0 */
CLKDEV_DEV_ID("sh_mobile_lcdc_fb.1", &mstp_clks[MSTP117]), /* LCDC1 */
CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* IIC0 */
CLKDEV_DEV_ID("uio_pdrv_genirq.5", &mstp_clks[MSTP106]), /* JPU */
......@@ -633,6 +635,7 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), /* SDHI0 */
CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */
CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMC */
CLKDEV_DEV_ID("sh-mipi-dsi.1", &mstp_clks[MSTP423]), /* DSITX1 */
CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP415]), /* SDHI2 */
CLKDEV_DEV_ID("sh-mobile-hdmi", &mstp_clks[MSTP413]), /* HDMI */
CLKDEV_DEV_ID("i2c-sh_mobile.3", &mstp_clks[MSTP411]), /* IIC3 */
......
......@@ -111,8 +111,6 @@ source "drivers/staging/vt6655/Kconfig"
source "drivers/staging/vt6656/Kconfig"
source "drivers/staging/udlfb/Kconfig"
source "drivers/staging/hv/Kconfig"
source "drivers/staging/vme/Kconfig"
......
......@@ -38,7 +38,6 @@ obj-$(CONFIG_USB_SERIAL_QUATECH_USB2) += quatech_usb2/
obj-$(CONFIG_OCTEON_ETHERNET) += octeon/
obj-$(CONFIG_VT6655) += vt6655/
obj-$(CONFIG_VT6656) += vt6656/
obj-$(CONFIG_FB_UDL) += udlfb/
obj-$(CONFIG_HYPERV) += hv/
obj-$(CONFIG_VME_BUS) += vme/
obj-$(CONFIG_MRST_RAR_HANDLER) += memrar/
......
config FB_UDL
tristate "Displaylink USB Framebuffer support"
depends on FB && USB
select FB_MODE_HELPERS
select FB_SYS_FILLRECT
select FB_SYS_COPYAREA
select FB_SYS_IMAGEBLIT
select FB_SYS_FOPS
select FB_DEFERRED_IO
---help---
This is a kernel framebuffer driver for DisplayLink USB devices.
Supports fbdev clients like xf86-video-fbdev, kdrive, fbi, and
mplayer -vo fbdev. Supports all USB 2.0 era DisplayLink devices.
To compile as a module, choose M here: the module name is udlfb.
obj-$(CONFIG_FB_UDL) += udlfb.o
......@@ -186,6 +186,14 @@ config FB_SYS_FOPS
depends on FB
default n
config FB_WMT_GE_ROPS
tristate
depends on FB
default n
---help---
Include functions for accelerated rectangle filling and area
copying using WonderMedia Graphics Engine operations.
config FB_DEFERRED_IO
bool
depends on FB
......@@ -635,6 +643,72 @@ config FB_BFIN_LQ035Q1
To compile this driver as a module, choose M here: the
module will be called bfin-lq035q1-fb.
config FB_BF537_LQ035
tristate "SHARP LQ035 TFT LCD (BF537 STAMP)"
depends on FB && (BF534 || BF536 || BF537) && I2C_BLACKFIN_TWI
select FB_CFB_FILLRECT
select FB_CFB_COPYAREA
select FB_CFB_IMAGEBLIT
select BFIN_GPTIMERS
help
This is the framebuffer device for a SHARP LQ035Q7DB03 TFT LCD
attached to a BF537.
To compile this driver as a module, choose M here: the
module will be called bf537-lq035.
config FB_BFIN_7393
tristate "Blackfin ADV7393 Video encoder"
depends on FB && BLACKFIN
select I2C
select FB_CFB_FILLRECT
select FB_CFB_COPYAREA
select FB_CFB_IMAGEBLIT
help
This is the framebuffer device for a ADV7393 video encoder
attached to a Blackfin on the PPI port.
If your Blackfin board has a ADV7393 select Y.
To compile this driver as a module, choose M here: the
module will be called bfin_adv7393fb.
choice
prompt "Video mode support"
depends on FB_BFIN_7393
default NTSC
config NTSC
bool 'NTSC 720x480'
config PAL
bool 'PAL 720x576'
config NTSC_640x480
bool 'NTSC 640x480 (Experimental)'
config PAL_640x480
bool 'PAL 640x480 (Experimental)'
config NTSC_YCBCR
bool 'NTSC 720x480 YCbCR input'
config PAL_YCBCR
bool 'PAL 720x576 YCbCR input'
endchoice
choice
prompt "Size of ADV7393 frame buffer memory Single/Double Size"
depends on (FB_BFIN_7393)
default ADV7393_1XMEM
config ADV7393_1XMEM
bool 'Single'
config ADV7393_2XMEM
bool 'Double'
endchoice
config FB_STI
tristate "HP STI frame buffer device support"
depends on FB && PARISC
......@@ -750,24 +824,14 @@ config FB_N411
config FB_HGA
tristate "Hercules mono graphics support"
depends on FB && X86
select FB_CFB_FILLRECT
select FB_CFB_COPYAREA
select FB_CFB_IMAGEBLIT
help
Say Y here if you have a Hercules mono graphics card.
To compile this driver as a module, choose M here: the
module will be called hgafb.
As this card technology is 15 years old, most people will answer N
here.
config FB_HGA_ACCEL
bool "Hercules mono Acceleration functions (EXPERIMENTAL)"
depends on FB_HGA && EXPERIMENTAL
---help---
This will compile the Hercules mono graphics with
acceleration functions.
As this card technology is at least 25 years old,
most people will answer N here.
config FB_SGIVW
tristate "SGI Visual Workstation framebuffer support"
......@@ -1722,6 +1786,24 @@ config FB_AU1200
various panels and CRTs by passing in kernel cmd line option
au1200fb:panel=<name>.
config FB_VT8500
bool "VT8500 LCD Driver"
depends on (FB = y) && ARM && ARCH_VT8500 && VTWM_VERSION_VT8500
select FB_WMT_GE_ROPS
select FB_SYS_IMAGEBLIT
help
This is the framebuffer driver for VIA VT8500 integrated LCD
controller.
config FB_WM8505
bool "WM8505 frame buffer support"
depends on (FB = y) && ARM && ARCH_VT8500 && VTWM_VERSION_WM8505
select FB_WMT_GE_ROPS
select FB_SYS_IMAGEBLIT
help
This is the framebuffer driver for WonderMedia WM8505
integrated LCD controller.
source "drivers/video/geode/Kconfig"
config FB_HIT
......@@ -2034,6 +2116,20 @@ config FB_SM501
If unsure, say N.
config FB_UDL
tristate "Displaylink USB Framebuffer support"
depends on FB && USB
select FB_MODE_HELPERS
select FB_SYS_FILLRECT
select FB_SYS_COPYAREA
select FB_SYS_IMAGEBLIT
select FB_SYS_FOPS
select FB_DEFERRED_IO
---help---
This is a kernel framebuffer driver for DisplayLink USB devices.
Supports fbdev clients like xf86-video-fbdev, kdrive, fbi, and
mplayer -vo fbdev. Supports all USB 2.0 era DisplayLink devices.
To compile as a module, choose M here: the module name is udlfb.
config FB_PNX4008_DUM
tristate "Display Update Module support on Philips PNX4008 board"
......
......@@ -26,6 +26,7 @@ obj-$(CONFIG_FB_SVGALIB) += svgalib.o
obj-$(CONFIG_FB_MACMODES) += macmodes.o
obj-$(CONFIG_FB_DDC) += fb_ddc.o
obj-$(CONFIG_FB_DEFERRED_IO) += fb_defio.o
obj-$(CONFIG_FB_WMT_GE_ROPS) += wmt_ge_rops.o
# Hardware specific drivers go first
obj-$(CONFIG_FB_AMIGA) += amifb.o c2p_planar.o
......@@ -104,6 +105,8 @@ obj-$(CONFIG_FB_W100) += w100fb.o
obj-$(CONFIG_FB_TMIO) += tmiofb.o
obj-$(CONFIG_FB_AU1100) += au1100fb.o
obj-$(CONFIG_FB_AU1200) += au1200fb.o
obj-$(CONFIG_FB_VT8500) += vt8500lcdfb.o
obj-$(CONFIG_FB_WM8505) += wm8505fb.o
obj-$(CONFIG_FB_PMAG_AA) += pmag-aa-fb.o
obj-$(CONFIG_FB_PMAG_BA) += pmag-ba-fb.o
obj-$(CONFIG_FB_PMAGB_B) += pmagb-b-fb.o
......@@ -122,6 +125,7 @@ obj-$(CONFIG_FB_PNX4008_DUM_RGB) += pnx4008/
obj-$(CONFIG_FB_IBM_GXT4500) += gxt4500.o
obj-$(CONFIG_FB_PS3) += ps3fb.o
obj-$(CONFIG_FB_SM501) += sm501fb.o
obj-$(CONFIG_FB_UDL) += udlfb.o
obj-$(CONFIG_FB_XILINX) += xilinxfb.o
obj-$(CONFIG_SH_MIPI_DSI) += sh_mipi_dsi.o
obj-$(CONFIG_FB_SH_MOBILE_HDMI) += sh_mobile_hdmi.o
......@@ -141,9 +145,11 @@ obj-$(CONFIG_FB_VESA) += vesafb.o
obj-$(CONFIG_FB_EFI) += efifb.o
obj-$(CONFIG_FB_VGA16) += vga16fb.o
obj-$(CONFIG_FB_OF) += offb.o
obj-$(CONFIG_FB_BF537_LQ035) += bf537-lq035.o
obj-$(CONFIG_FB_BF54X_LQ043) += bf54x-lq043fb.o
obj-$(CONFIG_FB_BFIN_LQ035Q1) += bfin-lq035q1-fb.o
obj-$(CONFIG_FB_BFIN_T350MCQB) += bfin-t350mcqb-fb.o
obj-$(CONFIG_FB_BFIN_7393) += bfin_adv7393fb.o
obj-$(CONFIG_FB_MX3) += mx3fb.o
obj-$(CONFIG_FB_DA8XX) += da8xx-fb.o
......
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/*
* Frame buffer driver for ADV7393/2 video encoder
*
* Copyright 2006-2009 Analog Devices Inc.
* Licensed under the GPL-2 or late.
*/
#ifndef __BFIN_ADV7393FB_H__
#define __BFIN_ADV7393FB_H__
#define BFIN_LCD_NBR_PALETTE_ENTRIES 256
#ifdef CONFIG_NTSC
# define VMODE 0
#endif
#ifdef CONFIG_PAL
# define VMODE 1
#endif
#ifdef CONFIG_NTSC_640x480
# define VMODE 2
#endif
#ifdef CONFIG_PAL_640x480
# define VMODE 3
#endif
#ifdef CONFIG_NTSC_YCBCR
# define VMODE 4
#endif
#ifdef CONFIG_PAL_YCBCR
# define VMODE 5
#endif
#ifndef VMODE
# define VMODE 1
#endif
#ifdef CONFIG_ADV7393_2XMEM
# define VMEM 2
#else
# define VMEM 1
#endif
#if defined(CONFIG_BF537) || defined(CONFIG_BF536) || defined(CONFIG_BF534)
# define DMA_CFG_VAL 0x7935 /* Set Sync Bit */
# define VB_DUMMY_MEMORY_SOURCE L1_DATA_B_START
#else
# define DMA_CFG_VAL 0x7915
# define VB_DUMMY_MEMORY_SOURCE BOOT_ROM_START
#endif
enum {
DESTRUCT,
BUILD,
};
enum {
POWER_ON,
POWER_DOWN,
BLANK_ON,
BLANK_OFF,
};
#define DRIVER_NAME "bfin-adv7393"
struct adv7393fb_modes {
const s8 name[25]; /* Full name */
u16 xres; /* Active Horizonzal Pixels */
u16 yres; /* Active Vertical Pixels */
u16 bpp;
u16 vmode;
u16 a_lines; /* Active Lines per Field */
u16 vb1_lines; /* Vertical Blanking Field 1 Lines */
u16 vb2_lines; /* Vertical Blanking Field 2 Lines */
u16 tot_lines; /* Total Lines per Frame */
u16 boeft_blank; /* Before Odd/Even Field Transition No. of Blank Pixels */
u16 aoeft_blank; /* After Odd/Even Field Transition No. of Blank Pixels */
const s8 *adv7393_i2c_initd;
u16 adv7393_i2c_initd_len;
};
static const u8 init_NTSC_TESTPATTERN[] = {
0x00, 0x1E, /* Power up all DACs and PLL */
0x01, 0x00, /* SD-Only Mode */
0x80, 0x10, /* SSAF Luma Filter Enabled, NTSC Mode */
0x82, 0xCB, /* Step control on, pixel data valid, pedestal on, PrPb SSAF on, CVBS/YC output */
0x84, 0x40, /* SD Color Bar Test Pattern Enabled, DAC 2 = Luma, DAC 3 = Chroma */
};
static const u8 init_NTSC[] = {
0x00, 0x1E, /* Power up all DACs and PLL */
0xC3, 0x26, /* Program RGB->YCrCb Color Space convertion matrix */
0xC5, 0x12, /* Program RGB->YCrCb Color Space convertion matrix */
0xC2, 0x4A, /* Program RGB->YCrCb Color Space convertion matrix */
0xC6, 0x5E, /* Program RGB->YCrCb Color Space convertion matrix */
0xBD, 0x19, /* Program RGB->YCrCb Color Space convertion matrix */
0xBF, 0x42, /* Program RGB->YCrCb Color Space convertion matrix */
0x8C, 0x1F, /* NTSC Subcarrier Frequency */
0x8D, 0x7C, /* NTSC Subcarrier Frequency */
0x8E, 0xF0, /* NTSC Subcarrier Frequency */
0x8F, 0x21, /* NTSC Subcarrier Frequency */
0x01, 0x00, /* SD-Only Mode */
0x80, 0x30, /* SSAF Luma Filter Enabled, NTSC Mode */
0x82, 0x8B, /* Step control on, pixel data invalid, pedestal on, PrPb SSAF on, CVBS/YC output */
0x87, 0x80, /* SD Color Bar Test Pattern Enabled, DAC 2 = Luma, DAC 3 = Chroma */
0x86, 0x82,
0x8B, 0x11,
0x88, 0x20,
0x8A, 0x0d,
};
static const u8 init_PAL[] = {
0x00, 0x1E, /* Power up all DACs and PLL */
0xC3, 0x26, /* Program RGB->YCrCb Color Space convertion matrix */
0xC5, 0x12, /* Program RGB->YCrCb Color Space convertion matrix */
0xC2, 0x4A, /* Program RGB->YCrCb Color Space convertion matrix */
0xC6, 0x5E, /* Program RGB->YCrCb Color Space convertion matrix */
0xBD, 0x19, /* Program RGB->YCrCb Color Space convertion matrix */
0xBF, 0x42, /* Program RGB->YCrCb Color Space convertion matrix */
0x8C, 0xCB, /* PAL Subcarrier Frequency */
0x8D, 0x8A, /* PAL Subcarrier Frequency */
0x8E, 0x09, /* PAL Subcarrier Frequency */
0x8F, 0x2A, /* PAL Subcarrier Frequency */
0x01, 0x00, /* SD-Only Mode */
0x80, 0x11, /* SSAF Luma Filter Enabled, PAL Mode */
0x82, 0x8B, /* Step control on, pixel data invalid, pedestal on, PrPb SSAF on, CVBS/YC output */
0x87, 0x80, /* SD Color Bar Test Pattern Enabled, DAC 2 = Luma, DAC 3 = Chroma */
0x86, 0x82,
0x8B, 0x11,
0x88, 0x20,
0x8A, 0x0d,
};
static const u8 init_NTSC_YCbCr[] = {
0x00, 0x1E, /* Power up all DACs and PLL */
0x8C, 0x1F, /* NTSC Subcarrier Frequency */
0x8D, 0x7C, /* NTSC Subcarrier Frequency */
0x8E, 0xF0, /* NTSC Subcarrier Frequency */
0x8F, 0x21, /* NTSC Subcarrier Frequency */
0x01, 0x00, /* SD-Only Mode */
0x80, 0x30, /* SSAF Luma Filter Enabled, NTSC Mode */
0x82, 0x8B, /* Step control on, pixel data invalid, pedestal on, PrPb SSAF on, CVBS/YC output */
0x87, 0x00, /* DAC 2 = Luma, DAC 3 = Chroma */
0x86, 0x82,
0x8B, 0x11,
0x88, 0x08,
0x8A, 0x0d,
};
static const u8 init_PAL_YCbCr[] = {
0x00, 0x1E, /* Power up all DACs and PLL */
0x8C, 0xCB, /* PAL Subcarrier Frequency */
0x8D, 0x8A, /* PAL Subcarrier Frequency */
0x8E, 0x09, /* PAL Subcarrier Frequency */
0x8F, 0x2A, /* PAL Subcarrier Frequency */
0x01, 0x00, /* SD-Only Mode */
0x80, 0x11, /* SSAF Luma Filter Enabled, PAL Mode */
0x82, 0x8B, /* Step control on, pixel data invalid, pedestal on, PrPb SSAF on, CVBS/YC output */
0x87, 0x00, /* DAC 2 = Luma, DAC 3 = Chroma */
0x86, 0x82,
0x8B, 0x11,
0x88, 0x08,
0x8A, 0x0d,
};
static struct adv7393fb_modes known_modes[] = {
/* NTSC 720x480 CRT */
{
.name = "NTSC 720x480",
.xres = 720,
.yres = 480,
.bpp = 16,
.vmode = FB_VMODE_INTERLACED,
.a_lines = 240,
.vb1_lines = 22,
.vb2_lines = 23,
.tot_lines = 525,
.boeft_blank = 16,
.aoeft_blank = 122,
.adv7393_i2c_initd = init_NTSC,
.adv7393_i2c_initd_len = sizeof(init_NTSC)
},
/* PAL 720x480 CRT */
{
.name = "PAL 720x576",
.xres = 720,
.yres = 576,
.bpp = 16,
.vmode = FB_VMODE_INTERLACED,
.a_lines = 288,
.vb1_lines = 24,
.vb2_lines = 25,
.tot_lines = 625,
.boeft_blank = 12,
.aoeft_blank = 132,
.adv7393_i2c_initd = init_PAL,
.adv7393_i2c_initd_len = sizeof(init_PAL)
},
/* NTSC 640x480 CRT Experimental */
{
.name = "NTSC 640x480",
.xres = 640,
.yres = 480,
.bpp = 16,
.vmode = FB_VMODE_INTERLACED,
.a_lines = 240,
.vb1_lines = 22,
.vb2_lines = 23,
.tot_lines = 525,
.boeft_blank = 16 + 40,
.aoeft_blank = 122 + 40,
.adv7393_i2c_initd = init_NTSC,
.adv7393_i2c_initd_len = sizeof(init_NTSC)
},
/* PAL 640x480 CRT Experimental */
{
.name = "PAL 640x480",
.xres = 640,
.yres = 480,
.bpp = 16,
.vmode = FB_VMODE_INTERLACED,
.a_lines = 288 - 20,
.vb1_lines = 24 + 20,
.vb2_lines = 25 + 20,
.tot_lines = 625,
.boeft_blank = 12 + 40,
.aoeft_blank = 132 + 40,
.adv7393_i2c_initd = init_PAL,
.adv7393_i2c_initd_len = sizeof(init_PAL)
},
/* NTSC 720x480 YCbCR */
{
.name = "NTSC 720x480 YCbCR",
.xres = 720,
.yres = 480,
.bpp = 16,
.vmode = FB_VMODE_INTERLACED,
.a_lines = 240,
.vb1_lines = 22,
.vb2_lines = 23,
.tot_lines = 525,
.boeft_blank = 16,
.aoeft_blank = 122,
.adv7393_i2c_initd = init_NTSC_YCbCr,
.adv7393_i2c_initd_len = sizeof(init_NTSC_YCbCr)
},
/* PAL 720x480 CRT */
{
.name = "PAL 720x576 YCbCR",
.xres = 720,
.yres = 576,
.bpp = 16,
.vmode = FB_VMODE_INTERLACED,
.a_lines = 288,
.vb1_lines = 24,
.vb2_lines = 25,
.tot_lines = 625,
.boeft_blank = 12,
.aoeft_blank = 132,
.adv7393_i2c_initd = init_PAL_YCbCr,
.adv7393_i2c_initd_len = sizeof(init_PAL_YCbCr)
}
};
struct adv7393fb_regs {
};
struct adv7393fb_device {
struct fb_info info; /* FB driver info record */
struct i2c_client *client;
struct dmasg *descriptor_list_head;
struct dmasg *vb1;
struct dmasg *av1;
struct dmasg *vb2;
struct dmasg *av2;
dma_addr_t dma_handle;
struct fb_info bfin_adv7393_fb;
struct adv7393fb_modes *modes;
struct adv7393fb_regs *regs; /* Registers memory map */
size_t regs_len;
size_t fb_len;
size_t line_len;
u16 open;
u16 *fb_mem; /* RGB Buffer */
};
#define to_adv7393fb_device(_info) \
(_info ? container_of(_info, struct adv7393fb_device, info) : NULL);
static int bfin_adv7393_fb_open(struct fb_info *info, int user);
static int bfin_adv7393_fb_release(struct fb_info *info, int user);
static int bfin_adv7393_fb_check_var(struct fb_var_screeninfo *var,
struct fb_info *info);
static int bfin_adv7393_fb_pan_display(struct fb_var_screeninfo *var,
struct fb_info *info);
static int bfin_adv7393_fb_blank(int blank, struct fb_info *info);
static void bfin_config_ppi(struct adv7393fb_device *fbdev);
static int bfin_config_dma(struct adv7393fb_device *fbdev);
static void bfin_disable_dma(void);
static void bfin_enable_ppi(void);
static void bfin_disable_ppi(void);
static inline int adv7393_write(struct i2c_client *client, u8 reg, u8 value);
static inline int adv7393_read(struct i2c_client *client, u8 reg);
static int adv7393_write_block(struct i2c_client *client, const u8 *data,
unsigned int len);
int bfin_adv7393_fb_cursor(struct fb_info *info, struct fb_cursor *cursor);
static int bfin_adv7393_fb_setcolreg(u_int, u_int, u_int, u_int,
u_int, struct fb_info *info);
#endif
......@@ -654,7 +654,7 @@ static int __devinit carminefb_probe(struct pci_dev *dev,
printk(KERN_ERR "carminefb: Memory bar is only %d bytes, %d "
"are required.", carminefb_fix.smem_len,
CARMINE_TOTAL_DIPLAY_MEM);
goto err_free_reg_mmio;
goto err_unmap_vregs;
}
if (!request_mem_region(carminefb_fix.smem_start,
......@@ -667,8 +667,6 @@ static int __devinit carminefb_probe(struct pci_dev *dev,
carminefb_fix.smem_len);
if (!hw->screen_mem) {
printk(KERN_ERR "carmine: Can't ioremap smem area.\n");
release_mem_region(carminefb_fix.smem_start,
carminefb_fix.smem_len);
goto err_reg_smem;
}
......@@ -710,7 +708,7 @@ static int __devinit carminefb_probe(struct pci_dev *dev,
err_unmap_screen:
iounmap(hw->screen_mem);
err_reg_smem:
release_mem_region(carminefb_fix.mmio_start, carminefb_fix.mmio_len);
release_mem_region(carminefb_fix.smem_start, carminefb_fix.smem_len);
err_unmap_vregs:
iounmap(hw->v_regs);
err_free_reg_mmio:
......
......@@ -973,6 +973,90 @@ void fb_edid_to_monspecs(unsigned char *edid, struct fb_monspecs *specs)
DPRINTK("========================================\n");
}
/**
* fb_edid_add_monspecs() - add monitor video modes from E-EDID data
* @edid: 128 byte array with an E-EDID block
* @spacs: monitor specs to be extended
*/
void fb_edid_add_monspecs(unsigned char *edid, struct fb_monspecs *specs)
{
unsigned char *block;
struct fb_videomode *m;
int num = 0, i;
u8 svd[64], edt[(128 - 4) / DETAILED_TIMING_DESCRIPTION_SIZE];
u8 pos = 4, svd_n = 0;
if (!edid)
return;
if (!edid_checksum(edid))
return;
if (edid[0] != 0x2 ||
edid[2] < 4 || edid[2] > 128 - DETAILED_TIMING_DESCRIPTION_SIZE)
return;
DPRINTK(" Short Video Descriptors\n");
while (pos < edid[2]) {
u8 len = edid[pos] & 0x1f, type = (edid[pos] >> 5) & 7;
pr_debug("Data block %u of %u bytes\n", type, len);
if (type == 2)
for (i = pos; i < pos + len; i++) {
u8 idx = edid[pos + i] & 0x7f;
svd[svd_n++] = idx;
pr_debug("N%sative mode #%d\n",
edid[pos + i] & 0x80 ? "" : "on-n", idx);
}
pos += len + 1;
}
block = edid + edid[2];
DPRINTK(" Extended Detailed Timings\n");
for (i = 0; i < (128 - edid[2]) / DETAILED_TIMING_DESCRIPTION_SIZE;
i++, block += DETAILED_TIMING_DESCRIPTION_SIZE)
if (PIXEL_CLOCK)
edt[num++] = block - edid;
/* Yikes, EDID data is totally useless */
if (!(num + svd_n))
return;
m = kzalloc((specs->modedb_len + num + svd_n) *
sizeof(struct fb_videomode), GFP_KERNEL);
if (!m)
return;
memcpy(m, specs->modedb, specs->modedb_len * sizeof(struct fb_videomode));
for (i = specs->modedb_len; i < specs->modedb_len + num; i++) {
get_detailed_timing(edid + edt[i - specs->modedb_len], &m[i]);
if (i == specs->modedb_len)
m[i].flag |= FB_MODE_IS_FIRST;
pr_debug("Adding %ux%u@%u\n", m[i].xres, m[i].yres, m[i].refresh);
}
for (i = specs->modedb_len + num; i < specs->modedb_len + num + svd_n; i++) {
int idx = svd[i - specs->modedb_len - num];
if (!idx || idx > 63) {
pr_warning("Reserved SVD code %d\n", idx);
} else if (idx > ARRAY_SIZE(cea_modes) || !cea_modes[idx].xres) {
pr_warning("Unimplemented SVD code %d\n", idx);
} else {
memcpy(&m[i], cea_modes + idx, sizeof(m[i]));
pr_debug("Adding SVD #%d: %ux%u@%u\n", idx,
m[i].xres, m[i].yres, m[i].refresh);
}
}
kfree(specs->modedb);
specs->modedb = m;
specs->modedb_len = specs->modedb_len + num + svd_n;
}
/*
* VESA Generalized Timing Formula (GTF)
*/
......@@ -1289,6 +1373,9 @@ void fb_edid_to_monspecs(unsigned char *edid, struct fb_monspecs *specs)
{
specs = NULL;
}
void fb_edid_add_monspecs(unsigned char *edid, struct fb_monspecs *specs)
{
}
void fb_destroy_modedb(struct fb_videomode *modedb)
{
}
......@@ -1396,6 +1483,7 @@ EXPORT_SYMBOL(fb_firmware_edid);
EXPORT_SYMBOL(fb_parse_edid);
EXPORT_SYMBOL(fb_edid_to_monspecs);
EXPORT_SYMBOL(fb_edid_add_monspecs);
EXPORT_SYMBOL(fb_get_mode);
EXPORT_SYMBOL(fb_validate_mode);
EXPORT_SYMBOL(fb_destroy_modedb);
......@@ -454,7 +454,6 @@ static int hgafb_blank(int blank_mode, struct fb_info *info)
/*
* Accel functions
*/
#ifdef CONFIG_FB_HGA_ACCEL
static void hgafb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
{
u_int rows, y;
......@@ -466,7 +465,7 @@ static void hgafb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
dest = rowaddr(info, y) + (rect->dx >> 3);
switch (rect->rop) {
case ROP_COPY:
//fb_memset(dest, rect->color, (rect->width >> 3));
memset_io(dest, rect->color, (rect->width >> 3));
break;
case ROP_XOR:
fb_writeb(~(fb_readb(dest)), dest);
......@@ -488,7 +487,7 @@ static void hgafb_copyarea(struct fb_info *info, const struct fb_copyarea *area)
for (rows = area->height; rows--; ) {
src = rowaddr(info, y1) + (area->sx >> 3);
dest = rowaddr(info, y2) + (area->dx >> 3);
//fb_memmove(dest, src, (area->width >> 3));
memmove(dest, src, (area->width >> 3));
y1++;
y2++;
}
......@@ -499,7 +498,7 @@ static void hgafb_copyarea(struct fb_info *info, const struct fb_copyarea *area)
for (rows = area->height; rows--;) {
src = rowaddr(info, y1) + (area->sx >> 3);
dest = rowaddr(info, y2) + (area->dx >> 3);
//fb_memmove(dest, src, (area->width >> 3));
memmove(dest, src, (area->width >> 3));
y1--;
y2--;
}
......@@ -511,20 +510,17 @@ static void hgafb_imageblit(struct fb_info *info, const struct fb_image *image)
u8 __iomem *dest;
u8 *cdat = (u8 *) image->data;
u_int rows, y = image->dy;
u_int x;
u8 d;
for (rows = image->height; rows--; y++) {
d = *cdat++;
dest = rowaddr(info, y) + (image->dx >> 3);
fb_writeb(d, dest);
for (x = 0; x < image->width; x+= 8) {
d = *cdat++;
dest = rowaddr(info, y) + ((image->dx + x)>> 3);
fb_writeb(d, dest);
}
}
}
#else /* !CONFIG_FB_HGA_ACCEL */
#define hgafb_fillrect cfb_fillrect
#define hgafb_copyarea cfb_copyarea
#define hgafb_imageblit cfb_imageblit
#endif /* CONFIG_FB_HGA_ACCEL */
static struct fb_ops hgafb_ops = {
.owner = THIS_MODULE,
......
......@@ -45,8 +45,10 @@ static void i810i2c_setscl(void *data, int state)
struct i810fb_par *par = chan->par;
u8 __iomem *mmio = par->mmio_start_virtual;
i810_writel(mmio, chan->ddc_base, (state ? SCL_VAL_OUT : 0) | SCL_DIR |
SCL_DIR_MASK | SCL_VAL_MASK);
if (state)
i810_writel(mmio, chan->ddc_base, SCL_DIR_MASK | SCL_VAL_MASK);
else
i810_writel(mmio, chan->ddc_base, SCL_DIR | SCL_DIR_MASK | SCL_VAL_MASK);
i810_readl(mmio, chan->ddc_base); /* flush posted write */
}
......@@ -56,8 +58,10 @@ static void i810i2c_setsda(void *data, int state)
struct i810fb_par *par = chan->par;
u8 __iomem *mmio = par->mmio_start_virtual;
i810_writel(mmio, chan->ddc_base, (state ? SDA_VAL_OUT : 0) | SDA_DIR |
SDA_DIR_MASK | SDA_VAL_MASK);
if (state)
i810_writel(mmio, chan->ddc_base, SDA_DIR_MASK | SDA_VAL_MASK);
else
i810_writel(mmio, chan->ddc_base, SDA_DIR | SDA_DIR_MASK | SDA_VAL_MASK);
i810_readl(mmio, chan->ddc_base); /* flush posted write */
}
......
......@@ -274,10 +274,61 @@ static const struct fb_videomode modedb[] = {
/* 800x520i @ 50 Hz, 15.625 kHz hsync (PAL RGB) */
NULL, 50, 800, 520, 58823, 144, 64, 72, 28, 80, 5,
0, FB_VMODE_INTERLACED
}, {
/* 864x480 @ 60 Hz, 35.15 kHz hsync */
NULL, 60, 864, 480, 27777, 1, 1, 1, 1, 0, 0,
0, FB_VMODE_NONINTERLACED
},
};
#ifdef CONFIG_FB_MODE_HELPERS
const struct fb_videomode cea_modes[64] = {
/* #1: 640x480p@59.94/60Hz */
[1] = {
NULL, 60, 640, 480, 39722, 48, 16, 33, 10, 96, 2, 0, FB_VMODE_NONINTERLACED, 0,
},
/* #3: 720x480p@59.94/60Hz */
[3] = {
NULL, 60, 720, 480, 37037, 60, 16, 30, 9, 62, 6, 0, FB_VMODE_NONINTERLACED, 0,
},
/* #5: 1920x1080i@59.94/60Hz */
[5] = {
NULL, 60, 1920, 1080, 13763, 148, 88, 15, 2, 44, 5,
FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_INTERLACED, 0,
},
/* #7: 720(1440)x480iH@59.94/60Hz */
[7] = {
NULL, 60, 1440, 480, 18554/*37108*/, 114, 38, 15, 4, 124, 3, 0, FB_VMODE_INTERLACED, 0,
},
/* #9: 720(1440)x240pH@59.94/60Hz */
[9] = {
NULL, 60, 1440, 240, 18554, 114, 38, 16, 4, 124, 3, 0, FB_VMODE_NONINTERLACED, 0,
},
/* #18: 720x576pH@50Hz */
[18] = {
NULL, 50, 720, 576, 37037, 68, 12, 39, 5, 64, 5, 0, FB_VMODE_NONINTERLACED, 0,
},
/* #19: 1280x720p@50Hz */
[19] = {
NULL, 50, 1280, 720, 13468, 220, 440, 20, 5, 40, 5,
FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED, 0,
},
/* #20: 1920x1080i@50Hz */
[20] = {
NULL, 50, 1920, 1080, 13480, 148, 528, 15, 5, 528, 5,
FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_INTERLACED, 0,
},
/* #32: 1920x1080p@23.98/24Hz */
[32] = {
NULL, 24, 1920, 1080, 13468, 148, 638, 36, 4, 44, 5,
FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED, 0,
},
/* #35: (2880)x480p4x@59.94/60Hz */
[35] = {
NULL, 60, 2880, 480, 9250, 240, 64, 30, 9, 248, 6, 0, FB_VMODE_NONINTERLACED, 0,
},
};
const struct fb_videomode vesa_modes[] = {
/* 0 640x350-85 VESA */
{ NULL, 85, 640, 350, 31746, 96, 32, 60, 32, 64, 3,
......
......@@ -1474,8 +1474,7 @@ static int mx3fb_probe(struct platform_device *pdev)
goto eremap;
}
pr_debug("Remapped %x to %x at %p\n", sdc_reg->start, sdc_reg->end,
mx3fb->reg_base);
pr_debug("Remapped %pR at %p\n", sdc_reg, mx3fb->reg_base);
/* IDMAC interface */
dmaengine_get();
......
......@@ -409,28 +409,6 @@ s1d13xxxfb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)
functions to handle bitblt acceleration
************************************************************/
/**
* bltbit_wait_bitset - waits for change in register value
* @info : framebuffer structure
* @bit : value expected in register
* @timeout : ...
*
* waits until value changes INTO bit
*/
static u8
bltbit_wait_bitset(struct fb_info *info, u8 bit, int timeout)
{
while (!(s1d13xxxfb_readreg(info->par, S1DREG_BBLT_CTL0) & bit)) {
udelay(10);
if (!--timeout) {
dbg_blit("wait_bitset timeout\n");
break;
}
}
return timeout;
}
/**
* bltbit_wait_bitclear - waits for change in register value
* @info : frambuffer structure
......@@ -454,34 +432,6 @@ bltbit_wait_bitclear(struct fb_info *info, u8 bit, int timeout)
return timeout;
}
/**
* bltbit_fifo_status - checks the current status of the fifo
* @info : framebuffer structure
*
* returns number of free words in buffer
*/
static u8
bltbit_fifo_status(struct fb_info *info)
{
u8 status;
status = s1d13xxxfb_readreg(info->par, S1DREG_BBLT_CTL0);
/* its empty so room for 16 words */
if (status & BBLT_FIFO_EMPTY)
return 16;
/* its full so we dont want to add */
if (status & BBLT_FIFO_FULL)
return 0;
/* its atleast half full but we can add one atleast */
if (status & BBLT_FIFO_NOT_FULL)
return 1;
return 0;
}
/*
* s1d13xxxfb_bitblt_copyarea - accelerated copyarea function
* @info : framebuffer structure
......
......@@ -23,6 +23,7 @@
#include <linux/io.h>
#include <linux/uaccess.h>
#include <linux/interrupt.h>
#include <linux/pm_runtime.h>
#include <mach/map.h>
#include <plat/regs-fb-v4.h>
......@@ -1013,8 +1014,30 @@ static int s3c_fb_ioctl(struct fb_info *info, unsigned int cmd,
return ret;
}
static int s3c_fb_open(struct fb_info *info, int user)
{
struct s3c_fb_win *win = info->par;
struct s3c_fb *sfb = win->parent;
pm_runtime_get_sync(sfb->dev);
return 0;
}
static int s3c_fb_release(struct fb_info *info, int user)
{
struct s3c_fb_win *win = info->par;
struct s3c_fb *sfb = win->parent;
pm_runtime_put_sync(sfb->dev);
return 0;
}
static struct fb_ops s3c_fb_ops = {
.owner = THIS_MODULE,
.fb_open = s3c_fb_open,
.fb_release = s3c_fb_release,
.fb_check_var = s3c_fb_check_var,
.fb_set_par = s3c_fb_set_par,
.fb_blank = s3c_fb_blank,
......@@ -1322,6 +1345,8 @@ static int __devinit s3c_fb_probe(struct platform_device *pdev)
clk_enable(sfb->bus_clk);
pm_runtime_enable(sfb->dev);
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res) {
dev_err(dev, "failed to find registers\n");
......@@ -1360,6 +1385,9 @@ static int __devinit s3c_fb_probe(struct platform_device *pdev)
dev_dbg(dev, "got resources (regs %p), probing windows\n", sfb->regs);
platform_set_drvdata(pdev, sfb);
pm_runtime_get_sync(sfb->dev);
/* setup gpio and output polarity controls */
pd->setup_gpio();
......@@ -1400,6 +1428,7 @@ static int __devinit s3c_fb_probe(struct platform_device *pdev)
}
platform_set_drvdata(pdev, sfb);
pm_runtime_put_sync(sfb->dev);
return 0;
......@@ -1434,6 +1463,8 @@ static int __devexit s3c_fb_remove(struct platform_device *pdev)
struct s3c_fb *sfb = platform_get_drvdata(pdev);
int win;
pm_runtime_get_sync(sfb->dev);
for (win = 0; win < S3C_FB_MAX_WIN; win++)
if (sfb->windows[win])
s3c_fb_release_win(sfb, sfb->windows[win]);
......@@ -1450,12 +1481,74 @@ static int __devexit s3c_fb_remove(struct platform_device *pdev)
kfree(sfb);
pm_runtime_put_sync(sfb->dev);
pm_runtime_disable(sfb->dev);
return 0;
}
#ifdef CONFIG_PM
static int s3c_fb_suspend(struct platform_device *pdev, pm_message_t state)
static int s3c_fb_suspend(struct device *dev)
{
struct platform_device *pdev = to_platform_device(dev);
struct s3c_fb *sfb = platform_get_drvdata(pdev);
struct s3c_fb_win *win;
int win_no;
for (win_no = S3C_FB_MAX_WIN - 1; win_no >= 0; win_no--) {
win = sfb->windows[win_no];
if (!win)
continue;
/* use the blank function to push into power-down */
s3c_fb_blank(FB_BLANK_POWERDOWN, win->fbinfo);
}
clk_disable(sfb->bus_clk);
return 0;
}
static int s3c_fb_resume(struct device *dev)
{
struct platform_device *pdev = to_platform_device(dev);
struct s3c_fb *sfb = platform_get_drvdata(pdev);
struct s3c_fb_platdata *pd = sfb->pdata;
struct s3c_fb_win *win;
int win_no;
clk_enable(sfb->bus_clk);
/* setup registers */
writel(pd->vidcon1, sfb->regs + VIDCON1);
/* zero all windows before we do anything */
for (win_no = 0; win_no < sfb->variant.nr_windows; win_no++)
s3c_fb_clear_win(sfb, win_no);
for (win_no = 0; win_no < sfb->variant.nr_windows - 1; win_no++) {
void __iomem *regs = sfb->regs + sfb->variant.keycon;
regs += (win_no * 8);
writel(0xffffff, regs + WKEYCON0);
writel(0xffffff, regs + WKEYCON1);
}
/* restore framebuffers */
for (win_no = 0; win_no < S3C_FB_MAX_WIN; win_no++) {
win = sfb->windows[win_no];
if (!win)
continue;
dev_dbg(&pdev->dev, "resuming window %d\n", win_no);
s3c_fb_set_par(win->fbinfo);
}
return 0;
}
int s3c_fb_runtime_suspend(struct device *dev)
{
struct platform_device *pdev = to_platform_device(dev);
struct s3c_fb *sfb = platform_get_drvdata(pdev);
struct s3c_fb_win *win;
int win_no;
......@@ -1473,8 +1566,9 @@ static int s3c_fb_suspend(struct platform_device *pdev, pm_message_t state)
return 0;
}
static int s3c_fb_resume(struct platform_device *pdev)
int s3c_fb_runtime_resume(struct device *dev)
{
struct platform_device *pdev = to_platform_device(dev);
struct s3c_fb *sfb = platform_get_drvdata(pdev);
struct s3c_fb_platdata *pd = sfb->pdata;
struct s3c_fb_win *win;
......@@ -1509,9 +1603,12 @@ static int s3c_fb_resume(struct platform_device *pdev)
return 0;
}
#else
#define s3c_fb_suspend NULL
#define s3c_fb_resume NULL
#define s3c_fb_runtime_suspend NULL
#define s3c_fb_runtime_resume NULL
#endif
......@@ -1710,15 +1807,21 @@ static struct platform_device_id s3c_fb_driver_ids[] = {
};
MODULE_DEVICE_TABLE(platform, s3c_fb_driver_ids);
static const struct dev_pm_ops s3cfb_pm_ops = {
.suspend = s3c_fb_suspend,
.resume = s3c_fb_resume,
.runtime_suspend = s3c_fb_runtime_suspend,
.runtime_resume = s3c_fb_runtime_resume,
};
static struct platform_driver s3c_fb_driver = {
.probe = s3c_fb_probe,
.remove = __devexit_p(s3c_fb_remove),
.suspend = s3c_fb_suspend,
.resume = s3c_fb_resume,
.id_table = s3c_fb_driver_ids,
.driver = {
.name = "s3c-fb",
.owner = THIS_MODULE,
.pm = &s3cfb_pm_ops,
},
};
......
......@@ -13,6 +13,7 @@
#include <linux/init.h>
#include <linux/io.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
#include <linux/slab.h>
#include <linux/string.h>
#include <linux/types.h>
......@@ -21,18 +22,40 @@
#include <video/sh_mipi_dsi.h>
#include <video/sh_mobile_lcdc.h>
#define CMTSRTCTR 0x80d0
#define CMTSRTREQ 0x8070
#define SYSCTRL 0x0000
#define SYSCONF 0x0004
#define TIMSET 0x0008
#define RESREQSET0 0x0018
#define RESREQSET1 0x001c
#define HSTTOVSET 0x0020
#define LPRTOVSET 0x0024
#define TATOVSET 0x0028
#define PRTOVSET 0x002c
#define DSICTRL 0x0030
#define DSIINTE 0x0060
#define PHYCTRL 0x0070
/* relative to linkbase */
#define DTCTR 0x0000
#define VMCTR1 0x0020
#define VMCTR2 0x0024
#define VMLEN1 0x0028
#define CMTSRTREQ 0x0070
#define CMTSRTCTR 0x00d0
/* E.g., sh7372 has 2 MIPI-DSIs - one for each LCDC */
#define MAX_SH_MIPI_DSI 2
struct sh_mipi {
void __iomem *base;
void __iomem *linkbase;
struct clk *dsit_clk;
struct clk *dsip_clk;
struct device *dev;
void *next_board_data;
void (*next_display_on)(void *board_data, struct fb_info *info);
void (*next_display_off)(void *board_data);
};
static struct sh_mipi *mipi_dsi[MAX_SH_MIPI_DSI];
......@@ -55,10 +78,10 @@ static int sh_mipi_send_short(struct sh_mipi *mipi, u8 dsi_cmd,
int cnt = 100;
/* transmit a short packet to LCD panel */
iowrite32(1 | data, mipi->base + 0x80d0); /* CMTSRTCTR */
iowrite32(1, mipi->base + 0x8070); /* CMTSRTREQ */
iowrite32(1 | data, mipi->linkbase + CMTSRTCTR);
iowrite32(1, mipi->linkbase + CMTSRTREQ);
while ((ioread32(mipi->base + 0x8070) & 1) && --cnt)
while ((ioread32(mipi->linkbase + CMTSRTREQ) & 1) && --cnt)
udelay(1);
return cnt ? 0 : -ETIMEDOUT;
......@@ -90,7 +113,7 @@ static void sh_mipi_dsi_enable(struct sh_mipi *mipi, bool enable)
* enable LCDC data tx, transition to LPS after completion of each HS
* packet
*/
iowrite32(0x00000002 | enable, mipi->base + 0x8000); /* DTCTR */
iowrite32(0x00000002 | enable, mipi->linkbase + DTCTR);
}
static void sh_mipi_shutdown(struct platform_device *pdev)
......@@ -104,14 +127,22 @@ static void mipi_display_on(void *arg, struct fb_info *info)
{
struct sh_mipi *mipi = arg;
pm_runtime_get_sync(mipi->dev);
sh_mipi_dsi_enable(mipi, true);
if (mipi->next_display_on)
mipi->next_display_on(mipi->next_board_data, info);
}
static void mipi_display_off(void *arg)
{
struct sh_mipi *mipi = arg;
if (mipi->next_display_off)
mipi->next_display_off(mipi->next_board_data);
sh_mipi_dsi_enable(mipi, false);
pm_runtime_put(mipi->dev);
}
static int __init sh_mipi_setup(struct sh_mipi *mipi,
......@@ -119,8 +150,7 @@ static int __init sh_mipi_setup(struct sh_mipi *mipi,
{
void __iomem *base = mipi->base;
struct sh_mobile_lcdc_chan_cfg *ch = pdata->lcd_chan;
u32 pctype, datatype, pixfmt;
u32 linelength;
u32 pctype, datatype, pixfmt, linelength, vmctr2 = 0x00e00000;
bool yuv;
/*
......@@ -223,10 +253,10 @@ static int __init sh_mipi_setup(struct sh_mipi *mipi,
return -EINVAL;
/* reset DSI link */
iowrite32(0x00000001, base); /* SYSCTRL */
iowrite32(0x00000001, base + SYSCTRL);
/* Hold reset for 100 cycles of the slowest of bus, HS byte and LP clock */
udelay(50);
iowrite32(0x00000000, base); /* SYSCTRL */
iowrite32(0x00000000, base + SYSCTRL);
/* setup DSI link */
......@@ -238,7 +268,7 @@ static int __init sh_mipi_setup(struct sh_mipi *mipi,
* ECC check enable
* additionally enable first two lanes
*/
iowrite32(0x00003703, base + 0x04); /* SYSCONF */
iowrite32(0x00003703, base + SYSCONF);
/*
* T_wakeup = 0x7000
* T_hs-trail = 3
......@@ -246,28 +276,28 @@ static int __init sh_mipi_setup(struct sh_mipi *mipi,
* T_clk-trail = 3
* T_clk-prepare = 2
*/
iowrite32(0x70003332, base + 0x08); /* TIMSET */
iowrite32(0x70003332, base + TIMSET);
/* no responses requested */
iowrite32(0x00000000, base + 0x18); /* RESREQSET0 */
iowrite32(0x00000000, base + RESREQSET0);
/* request response to packets of type 0x28 */
iowrite32(0x00000100, base + 0x1c); /* RESREQSET1 */
iowrite32(0x00000100, base + RESREQSET1);
/* High-speed transmission timeout, default 0xffffffff */
iowrite32(0x0fffffff, base + 0x20); /* HSTTOVSET */
iowrite32(0x0fffffff, base + HSTTOVSET);
/* LP reception timeout, default 0xffffffff */
iowrite32(0x0fffffff, base + 0x24); /* LPRTOVSET */
iowrite32(0x0fffffff, base + LPRTOVSET);
/* Turn-around timeout, default 0xffffffff */
iowrite32(0x0fffffff, base + 0x28); /* TATOVSET */
iowrite32(0x0fffffff, base + TATOVSET);
/* Peripheral reset timeout, default 0xffffffff */
iowrite32(0x0fffffff, base + 0x2c); /* PRTOVSET */
iowrite32(0x0fffffff, base + PRTOVSET);
/* Enable timeout counters */
iowrite32(0x00000f00, base + 0x30); /* DSICTRL */
iowrite32(0x00000f00, base + DSICTRL);
/* Interrupts not used, disable all */
iowrite32(0, base + DSIINTE);
/* DSI-Tx bias on */
iowrite32(0x00000001, base + 0x70); /* PHYCTRL */
iowrite32(0x00000001, base + PHYCTRL);
udelay(200);
/* Deassert resets, power on, set multiplier */
iowrite32(0x03070b01, base + 0x70); /* PHYCTRL */
iowrite32(0x03070b01, base + PHYCTRL);
/* setup l-bridge */
......@@ -275,20 +305,28 @@ static int __init sh_mipi_setup(struct sh_mipi *mipi,
* Enable transmission of all packets,
* transmit LPS after each HS packet completion
*/
iowrite32(0x00000006, base + 0x8000); /* DTCTR */
iowrite32(0x00000006, mipi->linkbase + DTCTR);
/* VSYNC width = 2 (<< 17) */
iowrite32(0x00040000 | (pctype << 12) | datatype, base + 0x8020); /* VMCTR1 */
iowrite32((ch->lcd_cfg[0].vsync_len << pdata->vsynw_offset) |
(pdata->clksrc << 16) | (pctype << 12) | datatype,
mipi->linkbase + VMCTR1);
/*
* Non-burst mode with sync pulses: VSE and HSE are output,
* HSA period allowed, no commands in LP
*/
iowrite32(0x00e00000, base + 0x8024); /* VMCTR2 */
if (pdata->flags & SH_MIPI_DSI_HSABM)
vmctr2 |= 0x20;
if (pdata->flags & SH_MIPI_DSI_HSPBM)
vmctr2 |= 0x10;
iowrite32(vmctr2, mipi->linkbase + VMCTR2);
/*
* 0x660 = 1632 bytes per line (RGB24, 544 pixels: see
* sh_mobile_lcdc_info.ch[0].lcd_cfg[0].xres), HSALEN = 1 - default
* (unused, since VMCTR2[HSABM] = 0)
* (unused if VMCTR2[HSABM] = 0)
*/
iowrite32(1 | (linelength << 16), base + 0x8028); /* VMLEN1 */
iowrite32(1 | (linelength << 16), mipi->linkbase + VMLEN1);
msleep(5);
......@@ -321,11 +359,12 @@ static int __init sh_mipi_probe(struct platform_device *pdev)
struct sh_mipi *mipi;
struct sh_mipi_dsi_info *pdata = pdev->dev.platform_data;
struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
struct resource *res2 = platform_get_resource(pdev, IORESOURCE_MEM, 1);
unsigned long rate, f_current;
int idx = pdev->id, ret;
char dsip_clk[] = "dsi.p_clk";
if (!res || idx >= ARRAY_SIZE(mipi_dsi) || !pdata)
if (!res || !res2 || idx >= ARRAY_SIZE(mipi_dsi) || !pdata)
return -ENODEV;
mutex_lock(&array_lock);
......@@ -356,6 +395,20 @@ static int __init sh_mipi_probe(struct platform_device *pdev)
goto emap;
}
if (!request_mem_region(res2->start, resource_size(res2), pdev->name)) {
dev_err(&pdev->dev, "MIPI register region 2 already claimed\n");
ret = -EBUSY;
goto ereqreg2;
}
mipi->linkbase = ioremap(res2->start, resource_size(res2));
if (!mipi->linkbase) {
ret = -ENOMEM;
goto emap2;
}
mipi->dev = &pdev->dev;
mipi->dsit_clk = clk_get(&pdev->dev, "dsit_clk");
if (IS_ERR(mipi->dsit_clk)) {
ret = PTR_ERR(mipi->dsit_clk);
......@@ -405,6 +458,9 @@ static int __init sh_mipi_probe(struct platform_device *pdev)
mipi_dsi[idx] = mipi;
pm_runtime_enable(&pdev->dev);
pm_runtime_resume(&pdev->dev);
ret = sh_mipi_setup(mipi, pdata);
if (ret < 0)
goto emipisetup;
......@@ -412,15 +468,22 @@ static int __init sh_mipi_probe(struct platform_device *pdev)
mutex_unlock(&array_lock);
platform_set_drvdata(pdev, mipi);
/* Save original LCDC callbacks */
mipi->next_board_data = pdata->lcd_chan->board_cfg.board_data;
mipi->next_display_on = pdata->lcd_chan->board_cfg.display_on;
mipi->next_display_off = pdata->lcd_chan->board_cfg.display_off;
/* Set up LCDC callbacks */
pdata->lcd_chan->board_cfg.board_data = mipi;
pdata->lcd_chan->board_cfg.display_on = mipi_display_on;
pdata->lcd_chan->board_cfg.display_off = mipi_display_off;
pdata->lcd_chan->board_cfg.owner = THIS_MODULE;
return 0;
emipisetup:
mipi_dsi[idx] = NULL;
pm_runtime_disable(&pdev->dev);
clk_disable(mipi->dsip_clk);
eclkpon:
clk_disable(mipi->dsit_clk);
......@@ -431,6 +494,10 @@ static int __init sh_mipi_probe(struct platform_device *pdev)
esettrate:
clk_put(mipi->dsit_clk);
eclktget:
iounmap(mipi->linkbase);
emap2:
release_mem_region(res2->start, resource_size(res2));
ereqreg2:
iounmap(mipi->base);
emap:
release_mem_region(res->start, resource_size(res));
......@@ -447,6 +514,7 @@ static int __exit sh_mipi_remove(struct platform_device *pdev)
{
struct sh_mipi_dsi_info *pdata = pdev->dev.platform_data;
struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
struct resource *res2 = platform_get_resource(pdev, IORESOURCE_MEM, 1);
struct sh_mipi *mipi = platform_get_drvdata(pdev);
int i, ret;
......@@ -467,14 +535,19 @@ static int __exit sh_mipi_remove(struct platform_device *pdev)
if (ret < 0)
return ret;
pdata->lcd_chan->board_cfg.owner = NULL;
pdata->lcd_chan->board_cfg.display_on = NULL;
pdata->lcd_chan->board_cfg.display_off = NULL;
pdata->lcd_chan->board_cfg.board_data = NULL;
pm_runtime_disable(&pdev->dev);
clk_disable(mipi->dsip_clk);
clk_disable(mipi->dsit_clk);
clk_put(mipi->dsit_clk);
clk_put(mipi->dsip_clk);
iounmap(mipi->linkbase);
if (res2)
release_mem_region(res2->start, resource_size(res2));
iounmap(mipi->base);
if (res)
release_mem_region(res->start, resource_size(res));
......
This diff is collapsed.
......@@ -139,6 +139,7 @@ struct sh_mobile_lcdc_priv {
struct notifier_block notifier;
unsigned long saved_shared_regs[NR_SHARED_REGS];
int started;
int forced_bpp; /* 2 channel LCDC must share bpp setting */
};
static bool banked(int reg_nr)
......@@ -461,13 +462,18 @@ static int sh_mobile_lcdc_start(struct sh_mobile_lcdc_priv *priv)
struct sh_mobile_lcdc_chan *ch;
struct sh_mobile_lcdc_board_cfg *board_cfg;
unsigned long tmp;
int bpp = 0;
int k, m;
int ret = 0;
/* enable clocks before accessing the hardware */
for (k = 0; k < ARRAY_SIZE(priv->ch); k++)
if (priv->ch[k].enabled)
for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
if (priv->ch[k].enabled) {
sh_mobile_lcdc_clk_on(priv);
if (!bpp)
bpp = priv->ch[k].info->var.bits_per_pixel;
}
}
/* reset */
lcdc_write(priv, _LDCNT2R, lcdc_read(priv, _LDCNT2R) | LCDC_RESET);
......@@ -535,7 +541,17 @@ static int sh_mobile_lcdc_start(struct sh_mobile_lcdc_priv *priv)
}
/* word and long word swap */
lcdc_write(priv, _LDDDSR, lcdc_read(priv, _LDDDSR) | 6);
switch (bpp) {
case 16:
lcdc_write(priv, _LDDDSR, lcdc_read(priv, _LDDDSR) | 6);
break;
case 24:
lcdc_write(priv, _LDDDSR, lcdc_read(priv, _LDDDSR) | 7);
break;
case 32:
lcdc_write(priv, _LDDDSR, lcdc_read(priv, _LDDDSR) | 4);
break;
}
for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
ch = &priv->ch[k];
......@@ -546,7 +562,16 @@ static int sh_mobile_lcdc_start(struct sh_mobile_lcdc_priv *priv)
/* set bpp format in PKF[4:0] */
tmp = lcdc_read_chan(ch, LDDFR);
tmp &= ~0x0001001f;
tmp |= (ch->info->var.bits_per_pixel == 16) ? 3 : 0;
switch (ch->info->var.bits_per_pixel) {
case 16:
tmp |= 0x03;
break;
case 24:
tmp |= 0x0b;
break;
case 32:
break;
}
lcdc_write_chan(ch, LDDFR, tmp);
/* point out our frame buffer */
......@@ -913,15 +938,30 @@ static int sh_mobile_open(struct fb_info *info, int user)
static int sh_mobile_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
{
struct sh_mobile_lcdc_chan *ch = info->par;
struct sh_mobile_lcdc_priv *p = ch->lcdc;
if (var->xres > MAX_XRES || var->yres > MAX_YRES ||
var->xres * var->yres * (ch->cfg.bpp / 8) * 2 > info->fix.smem_len) {
dev_warn(info->dev, "Invalid info: %u-%u-%u-%u x %u-%u-%u-%u @ %ukHz!\n",
dev_warn(info->dev, "Invalid info: %u-%u-%u-%u x %u-%u-%u-%u @ %lukHz!\n",
var->left_margin, var->xres, var->right_margin, var->hsync_len,
var->upper_margin, var->yres, var->lower_margin, var->vsync_len,
PICOS2KHZ(var->pixclock));
return -EINVAL;
}
/* only accept the forced_bpp for dual channel configurations */
if (p->forced_bpp && p->forced_bpp != var->bits_per_pixel)
return -EINVAL;
switch (var->bits_per_pixel) {
case 16: /* PKF[4:0] = 00011 - RGB 565 */
case 24: /* PKF[4:0] = 01011 - RGB 888 */
case 32: /* PKF[4:0] = 00000 - RGBA 888 */
break;
default:
return -EINVAL;
}
return 0;
}
......@@ -954,19 +994,27 @@ static int sh_mobile_lcdc_set_bpp(struct fb_var_screeninfo *var, int bpp)
var->transp.length = 0;
break;
case 32: /* PKF[4:0] = 00000 - RGB 888
* sh7722 pdf says 00RRGGBB but reality is GGBB00RR
* this may be because LDDDSR has word swap enabled..
*/
var->red.offset = 0;
case 24: /* PKF[4:0] = 01011 - RGB 888 */
var->red.offset = 16;
var->red.length = 8;
var->green.offset = 24;
var->green.offset = 8;
var->green.length = 8;
var->blue.offset = 16;
var->blue.offset = 0;
var->blue.length = 8;
var->transp.offset = 0;
var->transp.length = 0;
break;
case 32: /* PKF[4:0] = 00000 - RGBA 888 */
var->red.offset = 16;
var->red.length = 8;
var->green.offset = 8;
var->green.length = 8;
var->blue.offset = 0;
var->blue.length = 8;
var->transp.offset = 24;
var->transp.length = 8;
break;
default:
return -EINVAL;
}
......@@ -1170,6 +1218,10 @@ static int __devinit sh_mobile_lcdc_probe(struct platform_device *pdev)
goto err1;
}
/* for dual channel LCDC (MAIN + SUB) force shared bpp setting */
if (j == 2)
priv->forced_bpp = pdata->ch[0].bpp;
priv->base = ioremap_nocache(res->start, resource_size(res));
if (!priv->base)
goto err1;
......
......@@ -56,10 +56,6 @@
* Used by permission.
*/
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
#include "init.h"
#ifdef CONFIG_FB_SIS_300
......@@ -880,59 +876,59 @@ SiS_GetModeID_VGA2(int VGAEngine, unsigned int VBFlags, int HDisplay, int VDispl
/*********************************************/
void
SiS_SetReg(SISIOADDRESS port, unsigned short index, unsigned short data)
SiS_SetReg(SISIOADDRESS port, u8 index, u8 data)
{
outb((u8)index, port);
outb((u8)data, port + 1);
outb(index, port);
outb(data, port + 1);
}
void
SiS_SetRegByte(SISIOADDRESS port, unsigned short data)
SiS_SetRegByte(SISIOADDRESS port, u8 data)
{
outb((u8)data, port);
outb(data, port);
}
void
SiS_SetRegShort(SISIOADDRESS port, unsigned short data)
SiS_SetRegShort(SISIOADDRESS port, u16 data)
{
outw((u16)data, port);
outw(data, port);
}
void
SiS_SetRegLong(SISIOADDRESS port, unsigned int data)
SiS_SetRegLong(SISIOADDRESS port, u32 data)
{
outl((u32)data, port);
outl(data, port);
}
unsigned char
SiS_GetReg(SISIOADDRESS port, unsigned short index)
u8
SiS_GetReg(SISIOADDRESS port, u8 index)
{
outb((u8)index, port);
outb(index, port);
return inb(port + 1);
}
unsigned char
u8
SiS_GetRegByte(SISIOADDRESS port)
{
return inb(port);
}
unsigned short
u16
SiS_GetRegShort(SISIOADDRESS port)
{
return inw(port);
}
unsigned int
u32
SiS_GetRegLong(SISIOADDRESS port)
{
return inl(port);
}
void
SiS_SetRegANDOR(SISIOADDRESS Port, unsigned short Index, unsigned short DataAND, unsigned short DataOR)
SiS_SetRegANDOR(SISIOADDRESS Port, u8 Index, u8 DataAND, u8 DataOR)
{
unsigned short temp;
u8 temp;
temp = SiS_GetReg(Port, Index);
temp = (temp & (DataAND)) | DataOR;
......@@ -940,9 +936,9 @@ SiS_SetRegANDOR(SISIOADDRESS Port, unsigned short Index, unsigned short DataAND,
}
void
SiS_SetRegAND(SISIOADDRESS Port, unsigned short Index, unsigned short DataAND)
SiS_SetRegAND(SISIOADDRESS Port, u8 Index, u8 DataAND)
{
unsigned short temp;
u8 temp;
temp = SiS_GetReg(Port, Index);
temp &= DataAND;
......@@ -950,9 +946,9 @@ SiS_SetRegAND(SISIOADDRESS Port, unsigned short Index, unsigned short DataAND)
}
void
SiS_SetRegOR(SISIOADDRESS Port, unsigned short Index, unsigned short DataOR)
SiS_SetRegOR(SISIOADDRESS Port, u8 Index, u8 DataOR)
{
unsigned short temp;
u8 temp;
temp = SiS_GetReg(Port, Index);
temp |= DataOR;
......
......@@ -1516,19 +1516,6 @@ unsigned short SiS_GetModeID_TV(int VGAEngine, unsigned int VBFlags, int HDispla
unsigned short SiS_GetModeID_VGA2(int VGAEngine, unsigned int VBFlags, int HDisplay,
int VDisplay, int Depth, unsigned int VBFlags2);
void SiS_SetReg(SISIOADDRESS port, unsigned short index, unsigned short data);
void SiS_SetRegByte(SISIOADDRESS port, unsigned short data);
void SiS_SetRegShort(SISIOADDRESS port, unsigned short data);
void SiS_SetRegLong(SISIOADDRESS port, unsigned int data);
unsigned char SiS_GetReg(SISIOADDRESS port, unsigned short index);
unsigned char SiS_GetRegByte(SISIOADDRESS port);
unsigned short SiS_GetRegShort(SISIOADDRESS port);
unsigned int SiS_GetRegLong(SISIOADDRESS port);
void SiS_SetRegANDOR(SISIOADDRESS Port, unsigned short Index, unsigned short DataAND,
unsigned short DataOR);
void SiS_SetRegAND(SISIOADDRESS Port,unsigned short Index, unsigned short DataAND);
void SiS_SetRegOR(SISIOADDRESS Port,unsigned short Index, unsigned short DataOR);
void SiS_DisplayOn(struct SiS_Private *SiS_Pr);
void SiS_DisplayOff(struct SiS_Private *SiS_Pr);
void SiSRegInit(struct SiS_Private *SiS_Pr, SISIOADDRESS BaseAddr);
......
......@@ -57,10 +57,6 @@
*
*/
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
#if 1
#define SET_EMI /* 302LV/ELV: Set EMI values */
#endif
......@@ -5856,7 +5852,7 @@ SiS_SetGroup1_LVDS(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned s
temp = tempax & 0x00FF;
SiS_SetReg(SiS_Pr->SiS_Part1Port,0x43,temp);
temp = ((tempax & 0xFF00) >> 8) << 3;
SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x44,~0x0F8,temp);
SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port, 0x44, 0x07, temp);
tempax = SiS_Pr->SiS_VDE; /* BDxWadrst1 = BDxWadrst0 + BDxWadroff * VDE */
if(SiS_Pr->SiS_LCDResInfo == Panel_320x240_1 ||
......@@ -5870,7 +5866,7 @@ SiS_SetGroup1_LVDS(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned s
temp = ((tempeax & 0xFF0000) >> 16) | 0x10;
SiS_SetReg(SiS_Pr->SiS_Part1Port,0x40,temp);
temp = ((tempeax & 0x01000000) >> 24) << 7;
SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x3C,~0x080,temp);
SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port, 0x3C, 0x7F, temp);
SiS_SetReg(SiS_Pr->SiS_Part1Port,0x2F,0x03);
SiS_SetReg(SiS_Pr->SiS_Part1Port,0x03,0x50);
......
......@@ -428,17 +428,6 @@ static void SiS_OEM661Setting(struct SiS_Private *SiS_Pr,
static void SiS_FinalizeLCD(struct SiS_Private *, unsigned short, unsigned short);
#endif
extern void SiS_SetReg(SISIOADDRESS, unsigned short, unsigned short);
extern void SiS_SetRegByte(SISIOADDRESS, unsigned short);
extern void SiS_SetRegShort(SISIOADDRESS, unsigned short);
extern void SiS_SetRegLong(SISIOADDRESS, unsigned int);
extern unsigned char SiS_GetReg(SISIOADDRESS, unsigned short);
extern unsigned char SiS_GetRegByte(SISIOADDRESS);
extern unsigned short SiS_GetRegShort(SISIOADDRESS);
extern unsigned int SiS_GetRegLong(SISIOADDRESS);
extern void SiS_SetRegANDOR(SISIOADDRESS, unsigned short, unsigned short, unsigned short);
extern void SiS_SetRegOR(SISIOADDRESS, unsigned short, unsigned short);
extern void SiS_SetRegAND(SISIOADDRESS, unsigned short, unsigned short);
extern void SiS_DisplayOff(struct SiS_Private *SiS_Pr);
extern void SiS_DisplayOn(struct SiS_Private *SiS_Pr);
extern bool SiS_SearchModeID(struct SiS_Private *, unsigned short *, unsigned short *);
......
......@@ -307,58 +307,19 @@
#define VB2_LCDOVER1600BRIDGE (VB2_307T | VB2_307LV)
#define VB2_RAMDAC202MHZBRIDGE (VB2_301C | VB2_307T)
/* I/O port access macros */
#define inSISREG(base) inb(base)
#define outSISREG(base,val) outb(val,base)
#define orSISREG(base,val) \
do { \
u8 __Temp = inSISREG(base); \
outSISREG(base, __Temp | (val));\
} while (0)
#define andSISREG(base,val) \
do { \
u8 __Temp = inSISREG(base); \
outSISREG(base, __Temp & (val));\
} while (0)
#define inSISIDXREG(base,idx,var) \
do { \
outSISREG(base, idx); \
var = inSISREG((base)+1); \
} while (0)
#define outSISIDXREG(base,idx,val) \
do { \
outSISREG(base, idx); \
outSISREG((base)+1, val); \
} while (0)
#define orSISIDXREG(base,idx,val) \
do { \
u8 __Temp; \
outSISREG(base, idx); \
__Temp = inSISREG((base)+1) | (val); \
outSISREG((base)+1, __Temp); \
} while (0)
#define andSISIDXREG(base,idx,and) \
do { \
u8 __Temp; \
outSISREG(base, idx); \
__Temp = inSISREG((base)+1) & (and); \
outSISREG((base)+1, __Temp); \
} while (0)
#define setSISIDXREG(base,idx,and,or) \
do { \
u8 __Temp; \
outSISREG(base, idx); \
__Temp = (inSISREG((base)+1) & (and)) | (or); \
outSISREG((base)+1, __Temp); \
} while (0)
/* I/O port access functions */
void SiS_SetReg(SISIOADDRESS, u8, u8);
void SiS_SetRegByte(SISIOADDRESS, u8);
void SiS_SetRegShort(SISIOADDRESS, u16);
void SiS_SetRegLong(SISIOADDRESS, u32);
void SiS_SetRegANDOR(SISIOADDRESS, u8, u8, u8);
void SiS_SetRegAND(SISIOADDRESS, u8, u8);
void SiS_SetRegOR(SISIOADDRESS, u8, u8);
u8 SiS_GetReg(SISIOADDRESS, u8);
u8 SiS_GetRegByte(SISIOADDRESS);
u16 SiS_GetRegShort(SISIOADDRESS);
u32 SiS_GetRegLong(SISIOADDRESS);
/* MMIO access macros */
#define MMIO_IN8(base, offset) readb((base+offset))
......
This diff is collapsed.
......@@ -15,6 +15,9 @@
#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
#include <linux/list.h>
#include <linux/pm.h>
#include <asm/olpc.h>
/*
* The default port config.
......@@ -28,6 +31,19 @@ static struct via_port_cfg adap_configs[] = {
{ 0, 0, 0, 0 }
};
/*
* The OLPC XO-1.5 puts the camera power and reset lines onto
* GPIO 2C.
*/
static const struct via_port_cfg olpc_adap_configs[] = {
[VIA_PORT_26] = { VIA_PORT_I2C, VIA_MODE_I2C, VIASR, 0x26 },
[VIA_PORT_31] = { VIA_PORT_I2C, VIA_MODE_I2C, VIASR, 0x31 },
[VIA_PORT_25] = { VIA_PORT_GPIO, VIA_MODE_GPIO, VIASR, 0x25 },
[VIA_PORT_2C] = { VIA_PORT_GPIO, VIA_MODE_GPIO, VIASR, 0x2c },
[VIA_PORT_3D] = { VIA_PORT_GPIO, VIA_MODE_GPIO, VIASR, 0x3d },
{ 0, 0, 0, 0 }
};
/*
* We currently only support one viafb device (will there ever be
* more than one?), so just declare it globally here.
......@@ -575,6 +591,78 @@ static void via_teardown_subdevs(void)
}
}
/*
* Power management functions
*/
#ifdef CONFIG_PM
static LIST_HEAD(viafb_pm_hooks);
static DEFINE_MUTEX(viafb_pm_hooks_lock);
void viafb_pm_register(struct viafb_pm_hooks *hooks)
{
INIT_LIST_HEAD(&hooks->list);
mutex_lock(&viafb_pm_hooks_lock);
list_add_tail(&hooks->list, &viafb_pm_hooks);
mutex_unlock(&viafb_pm_hooks_lock);
}
EXPORT_SYMBOL_GPL(viafb_pm_register);
void viafb_pm_unregister(struct viafb_pm_hooks *hooks)
{
mutex_lock(&viafb_pm_hooks_lock);
list_del(&hooks->list);
mutex_unlock(&viafb_pm_hooks_lock);
}
EXPORT_SYMBOL_GPL(viafb_pm_unregister);
static int via_suspend(struct pci_dev *pdev, pm_message_t state)
{
struct viafb_pm_hooks *hooks;
if (state.event != PM_EVENT_SUSPEND)
return 0;
/*
* "I've occasionally hit a few drivers that caused suspend
* failures, and each and every time it was a driver bug, and
* the right thing to do was to just ignore the error and suspend
* anyway - returning an error code and trying to undo the suspend
* is not what anybody ever really wants, even if our model
*_allows_ for it."
* -- Linus Torvalds, Dec. 7, 2009
*/
mutex_lock(&viafb_pm_hooks_lock);
list_for_each_entry_reverse(hooks, &viafb_pm_hooks, list)
hooks->suspend(hooks->private);
mutex_unlock(&viafb_pm_hooks_lock);
pci_save_state(pdev);
pci_disable_device(pdev);
pci_set_power_state(pdev, pci_choose_state(pdev, state));
return 0;
}
static int via_resume(struct pci_dev *pdev)
{
struct viafb_pm_hooks *hooks;
/* Get the bus side powered up */
pci_set_power_state(pdev, PCI_D0);
pci_restore_state(pdev);
if (pci_enable_device(pdev))
return 0;
pci_set_master(pdev);
/* Now bring back any subdevs */
mutex_lock(&viafb_pm_hooks_lock);
list_for_each_entry(hooks, &viafb_pm_hooks, list)
hooks->resume(hooks->private);
mutex_unlock(&viafb_pm_hooks_lock);
return 0;
}
#endif /* CONFIG_PM */
static int __devinit via_pci_probe(struct pci_dev *pdev,
const struct pci_device_id *ent)
......@@ -584,6 +672,7 @@ static int __devinit via_pci_probe(struct pci_dev *pdev,
ret = pci_enable_device(pdev);
if (ret)
return ret;
/*
* Global device initialization.
*/
......@@ -591,6 +680,9 @@ static int __devinit via_pci_probe(struct pci_dev *pdev,
global_dev.pdev = pdev;
global_dev.chip_type = ent->driver_data;
global_dev.port_cfg = adap_configs;
if (machine_is_olpc())
global_dev.port_cfg = olpc_adap_configs;
spin_lock_init(&global_dev.reg_lock);
ret = via_pci_setup_mmio(&global_dev);
if (ret)
......@@ -663,8 +755,8 @@ static struct pci_driver via_driver = {
.probe = via_pci_probe,
.remove = __devexit_p(via_pci_remove),
#ifdef CONFIG_PM
.suspend = viafb_suspend,
.resume = viafb_resume,
.suspend = via_suspend,
.resume = via_resume,
#endif
};
......
......@@ -172,6 +172,28 @@ static void viafb_gpio_disable(struct viafb_gpio *gpio)
via_write_reg_mask(VIASR, gpio->vg_port_index, 0, 0x02);
}
#ifdef CONFIG_PM
static int viafb_gpio_suspend(void *private)
{
return 0;
}
static int viafb_gpio_resume(void *private)
{
int i;
for (i = 0; i < gpio_config.gpio_chip.ngpio; i += 2)
viafb_gpio_enable(gpio_config.active_gpios[i]);
return 0;
}
static struct viafb_pm_hooks viafb_gpio_pm_hooks = {
.suspend = viafb_gpio_suspend,
.resume = viafb_gpio_resume
};
#endif /* CONFIG_PM */
/*
* Look up a specific gpio and return the number it was assigned.
*/
......@@ -236,6 +258,9 @@ static __devinit int viafb_gpio_probe(struct platform_device *platdev)
printk(KERN_ERR "viafb: failed to add gpios (%d)\n", ret);
gpio_config.gpio_chip.ngpio = 0;
}
#ifdef CONFIG_PM
viafb_pm_register(&viafb_gpio_pm_hooks);
#endif
return ret;
}
......@@ -245,6 +270,10 @@ static int viafb_gpio_remove(struct platform_device *platdev)
unsigned long flags;
int ret = 0, i;
#ifdef CONFIG_PM
viafb_pm_unregister(&viafb_gpio_pm_hooks);
#endif
/*
* Get unregistered.
*/
......
......@@ -1672,31 +1672,19 @@ static int parse_mode(const char *str, u32 *xres, u32 *yres)
#ifdef CONFIG_PM
int viafb_suspend(struct pci_dev *pdev, pm_message_t state)
static int viafb_suspend(void *unused)
{
if (state.event == PM_EVENT_SUSPEND) {
acquire_console_sem();
fb_set_suspend(viafbinfo, 1);
viafb_sync(viafbinfo);
pci_save_state(pdev);
pci_disable_device(pdev);
pci_set_power_state(pdev, pci_choose_state(pdev, state));
release_console_sem();
}
acquire_console_sem();
fb_set_suspend(viafbinfo, 1);
viafb_sync(viafbinfo);
release_console_sem();
return 0;
}
int viafb_resume(struct pci_dev *pdev)
static int viafb_resume(void *unused)
{
acquire_console_sem();
pci_set_power_state(pdev, PCI_D0);
pci_restore_state(pdev);
if (pci_enable_device(pdev))
goto fail;
pci_set_master(pdev);
if (viaparinfo->shared->vdev->engine_mmio)
viafb_reset_engine(viaparinfo);
viafb_set_par(viafbinfo);
......@@ -1704,11 +1692,15 @@ int viafb_resume(struct pci_dev *pdev)
viafb_set_par(viafbinfo1);
fb_set_suspend(viafbinfo, 0);
fail:
release_console_sem();
return 0;
}
static struct viafb_pm_hooks viafb_fb_pm_hooks = {
.suspend = viafb_suspend,
.resume = viafb_resume
};
#endif
......@@ -1899,6 +1891,10 @@ int __devinit via_fb_pci_probe(struct viafb_dev *vdev)
viafb_init_proc(viaparinfo->shared);
viafb_init_dac(IGA2);
#ifdef CONFIG_PM
viafb_pm_register(&viafb_fb_pm_hooks);
#endif
return 0;
out_fb_unreg:
......
......@@ -108,6 +108,4 @@ void via_fb_pci_remove(struct pci_dev *pdev);
/* Temporary */
int viafb_init(void);
void viafb_exit(void);
int viafb_suspend(struct pci_dev *pdev, pm_message_t state);
int viafb_resume(struct pci_dev *pdev);
#endif /* __VIAFBDEV_H__ */
This diff is collapsed.
/*
* linux/drivers/video/vt8500lcdfb.h
*
* Copyright (C) 2010 Alexey Charkov <alchark@gmail.com>
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
struct vt8500lcd_info {
struct fb_info fb;
void __iomem *regbase;
void __iomem *palette_cpu;
dma_addr_t palette_phys;
size_t palette_size;
wait_queue_head_t wait;
};
static int bpp_values[] = {
1,
2,
4,
8,
12,
16,
18,
24,
};
This diff is collapsed.
/*
* GOVR registers list for WM8505 chips
*
* Copyright (C) 2010 Ed Spiridonov <edo.rus@gmail.com>
* Based on VIA/WonderMedia wm8510-govrh-reg.h
* http://github.com/projectgus/kernel_wm8505/blob/wm8505_2.6.29/
* drivers/video/wmt/register/wm8510/wm8510-govrh-reg.h
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef _WM8505FB_REGS_H
#define _WM8505FB_REGS_H
/*
* Color space select register, default value 0x1c
* BIT0 GOVRH_DVO_YUV2RGB_ENABLE
* BIT1 GOVRH_VGA_YUV2RGB_ENABLE
* BIT2 GOVRH_RGB_MODE
* BIT3 GOVRH_DAC_CLKINV
* BIT4 GOVRH_BLANK_ZERO
*/
#define WMT_GOVR_COLORSPACE 0x1e4
/*
* Another colorspace select register, default value 1
* BIT0 GOVRH_DVO_RGB
* BIT1 GOVRH_DVO_YUV422
*/
#define WMT_GOVR_COLORSPACE1 0x30
#define WMT_GOVR_CONTRAST 0x1b8
#define WMT_GOVR_BRGHTNESS 0x1bc /* incompatible with RGB? */
/* Framubeffer address */
#define WMT_GOVR_FBADDR 0x90
#define WMT_GOVR_FBADDR1 0x94 /* UV offset in YUV mode */
/* Offset of visible window */
#define WMT_GOVR_XPAN 0xa4
#define WMT_GOVR_YPAN 0xa0
#define WMT_GOVR_XRES 0x98
#define WMT_GOVR_XRES_VIRTUAL 0x9c
#define WMT_GOVR_MIF_ENABLE 0x80
#define WMT_GOVR_FHI 0xa8
#define WMT_GOVR_REG_UPDATE 0xe4
/*
* BIT0 GOVRH_DVO_OUTWIDTH
* BIT1 GOVRH_DVO_SYNC_POLAR
* BIT2 GOVRH_DVO_ENABLE
*/
#define WMT_GOVR_DVO_SET 0x148
/* Timing generator? */
#define WMT_GOVR_TG 0x100
/* Timings */
#define WMT_GOVR_TIMING_H_ALL 0x108
#define WMT_GOVR_TIMING_V_ALL 0x10c
#define WMT_GOVR_TIMING_V_START 0x110
#define WMT_GOVR_TIMING_V_END 0x114
#define WMT_GOVR_TIMING_H_START 0x118
#define WMT_GOVR_TIMING_H_END 0x11c
#define WMT_GOVR_TIMING_V_SYNC 0x128
#define WMT_GOVR_TIMING_H_SYNC 0x12c
#endif /* _WM8505FB_REGS_H */
This diff is collapsed.
extern void wmt_ge_fillrect(struct fb_info *info,
const struct fb_fillrect *rect);
extern void wmt_ge_copyarea(struct fb_info *info,
const struct fb_copyarea *area);
extern int wmt_ge_sync(struct fb_info *info);
......@@ -1092,6 +1092,8 @@ extern int fb_parse_edid(unsigned char *edid, struct fb_var_screeninfo *var);
extern const unsigned char *fb_firmware_edid(struct device *device);
extern void fb_edid_to_monspecs(unsigned char *edid,
struct fb_monspecs *specs);
extern void fb_edid_add_monspecs(unsigned char *edid,
struct fb_monspecs *specs);
extern void fb_destroy_modedb(struct fb_videomode *modedb);
extern int fb_find_mode_cvt(struct fb_videomode *mode, int margins, int rb);
extern unsigned char *fb_ddc_read(struct i2c_adapter *adapter);
......@@ -1150,6 +1152,7 @@ struct fb_videomode {
extern const char *fb_mode_option;
extern const struct fb_videomode vesa_modes[];
extern const struct fb_videomode cea_modes[64];
struct fb_modelist {
struct list_head list;
......
......@@ -59,6 +59,21 @@ struct via_port_cfg {
u8 ioport_index;
};
/*
* Allow subdevs to register suspend/resume hooks.
*/
#ifdef CONFIG_PM
struct viafb_pm_hooks {
struct list_head list;
int (*suspend)(void *private);
int (*resume)(void *private);
void *private;
};
void viafb_pm_register(struct viafb_pm_hooks *hooks);
void viafb_pm_unregister(struct viafb_pm_hooks *hooks);
#endif /* CONFIG_PM */
/*
* This is the global viafb "device" containing stuff needed by
* all subdevs.
......
......@@ -136,12 +136,6 @@
#define S1DREG_DELAYOFF 0xFFFE
#define S1DREG_DELAYON 0xFFFF
#define BBLT_FIFO_EMPTY 0x00
#define BBLT_FIFO_NOT_EMPTY 0x40
#define BBLT_FIFO_NOT_FULL 0x30
#define BBLT_FIFO_HALF_FULL 0x20
#define BBLT_FIFO_FULL 0x10
#define BBLT_SOLID_FILL 0x0c
......
......@@ -27,9 +27,15 @@ enum sh_mipi_dsi_data_fmt {
struct sh_mobile_lcdc_chan_cfg;
#define SH_MIPI_DSI_HSABM (1 << 0)
#define SH_MIPI_DSI_HSPBM (1 << 1)
struct sh_mipi_dsi_info {
enum sh_mipi_dsi_data_fmt data_format;
struct sh_mobile_lcdc_chan_cfg *lcd_chan;
unsigned long flags;
u32 clksrc;
unsigned int vsynw_offset;
};
#endif
......@@ -13,6 +13,7 @@
struct sh_mobile_lcdc_chan_cfg;
struct device;
struct clk;
/*
* flags format
......@@ -33,6 +34,8 @@ struct sh_mobile_hdmi_info {
struct sh_mobile_lcdc_chan_cfg *lcd_chan;
struct device *lcd_dev;
unsigned int flags;
long (*clk_optimize_parent)(unsigned long target, unsigned long *best_freq,
unsigned long *parent_freq);
};
#endif
......@@ -65,9 +65,6 @@ struct dlfb_data {
#define MAX_TRANSFER (PAGE_SIZE*16 - BULK_SIZE)
#define WRITES_IN_FLIGHT (4)
#define MIN_EDID_SIZE 128
#define MAX_EDID_SIZE 128
#define MAX_VENDOR_DESCRIPTOR_SIZE 256
#define GET_URB_TIMEOUT HZ
......@@ -95,23 +92,4 @@ struct dlfb_data {
#define DL_ALIGN_UP(x, a) ALIGN(x, a)
#define DL_ALIGN_DOWN(x, a) ALIGN(x-(a-1), a)
/* remove once this gets added to sysfs.h */
#define __ATTR_RW(attr) __ATTR(attr, 0644, attr##_show, attr##_store)
/*
* udlfb is both a usb device, and a framebuffer device.
* They may exist at the same time, but during various stages
* inactivity, teardown, or "virtual" operation, only one or the
* other will exist (one will outlive the other). So we can't
* call the dev_*() macros, because we don't have a stable dev object.
*/
#define dl_err(format, arg...) \
pr_err("udlfb: " format, ## arg)
#define dl_warn(format, arg...) \
pr_warning("udlfb: " format, ## arg)
#define dl_notice(format, arg...) \
pr_notice("udlfb: " format, ## arg)
#define dl_info(format, arg...) \
pr_info("udlfb: " format, ## arg)
#endif
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