Commit 85aea469 authored by Arnd Bergmann's avatar Arnd Bergmann

Merge tag 'mvebu-fixes-3.15-2' of git://git.infradead.org/linux-mvebu into fixes

mvebu fixes for v3.15 (incremental #2)

 - Armada 38x
    - fix PCIe dt nodes for handling more interfaces

 - mvebu
    - mvebu-soc-id: fix clock handling and PCIe interface disabling.

* tag 'mvebu-fixes-3.15-2' of git://git.infradead.org/linux-mvebu:
  ARM: mvebu: fix definitions of PCIe interfaces on Armada 38x
  ARM: mvebu: mvebu-soc-id: keep clock enabled if PCIe unit is enabled
  ARM: mvebu: mvebu-soc-id: add missing clk_put() call
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 767bf9f0 d903bc9e
...@@ -99,7 +99,7 @@ pcie@2,0 { ...@@ -99,7 +99,7 @@ pcie@2,0 {
pcie@3,0 { pcie@3,0 {
device_type = "pci"; device_type = "pci";
assigned-addresses = <0x82000800 0 0x44000 0 0x2000>; assigned-addresses = <0x82000800 0 0x44000 0 0x2000>;
reg = <0x1000 0 0 0 0>; reg = <0x1800 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
......
...@@ -110,7 +110,7 @@ pcie@2,0 { ...@@ -110,7 +110,7 @@ pcie@2,0 {
pcie@3,0 { pcie@3,0 {
device_type = "pci"; device_type = "pci";
assigned-addresses = <0x82000800 0 0x44000 0 0x2000>; assigned-addresses = <0x82000800 0 0x44000 0 0x2000>;
reg = <0x1000 0 0 0 0>; reg = <0x1800 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
...@@ -131,7 +131,7 @@ pcie@3,0 { ...@@ -131,7 +131,7 @@ pcie@3,0 {
pcie@4,0 { pcie@4,0 {
device_type = "pci"; device_type = "pci";
assigned-addresses = <0x82000800 0 0x48000 0 0x2000>; assigned-addresses = <0x82000800 0 0x48000 0 0x2000>;
reg = <0x1000 0 0 0 0>; reg = <0x2000 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
......
...@@ -108,7 +108,18 @@ static int __init mvebu_soc_id_init(void) ...@@ -108,7 +108,18 @@ static int __init mvebu_soc_id_init(void)
iounmap(pci_base); iounmap(pci_base);
res_ioremap: res_ioremap:
clk_disable_unprepare(clk); /*
* If the PCIe unit is actually enabled and we have PCI
* support in the kernel, we intentionally do not release the
* reference to the clock. We want to keep it running since
* the bootloader does some PCIe link configuration that the
* kernel is for now unable to do, and gating the clock would
* make us loose this precious configuration.
*/
if (!of_device_is_available(child) || !IS_ENABLED(CONFIG_PCI_MVEBU)) {
clk_disable_unprepare(clk);
clk_put(clk);
}
clk_err: clk_err:
of_node_put(child); of_node_put(child);
......
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