Commit 86a8280a authored by Andrea Gelmini's avatar Andrea Gelmini Committed by Geert Uytterhoeven

m68k: Assorted spelling fixes

  - s/acccess/access/
  - s/accoding/according/
  - s/addad/added/
  - s/addreess/address/
  - s/allocatiom/allocation/
  - s/Assember/Assembler/
  - s/compactnes/compactness/
  - s/conneced/connected/
  - s/decending/descending/
  - s/diectly/directly/
  - s/diplacement/displacement/
Signed-off-by: default avatarAndrea Gelmini <andrea.gelmini@gelma.net>
[geert: Squashed, fix arch/m68k/ifpsp060/src/pfpsp.S]
Signed-off-by: default avatarGeert Uytterhoeven <geert@linux-m68k.org>
parent 1a695a90
...@@ -288,7 +288,7 @@ _clear_bss: ...@@ -288,7 +288,7 @@ _clear_bss:
#endif #endif
/* /*
* Assember start up done, start code proper. * Assembler start up done, start code proper.
*/ */
jsr start_kernel /* start Linux kernel */ jsr start_kernel /* start Linux kernel */
......
...@@ -111,7 +111,7 @@ void __init config_BSP(char *commandp, int size) ...@@ -111,7 +111,7 @@ void __init config_BSP(char *commandp, int size)
/***************************************************************************/ /***************************************************************************/
/* /*
* Some 5272 based boards have the FEC ethernet diectly connected to * Some 5272 based boards have the FEC ethernet directly connected to
* an ethernet switch. In this case we need to use the fixed phy type, * an ethernet switch. In this case we need to use the fixed phy type,
* and we need to declare it early in boot. * and we need to declare it early in boot.
*/ */
......
...@@ -42,7 +42,7 @@ static unsigned long iospace; ...@@ -42,7 +42,7 @@ static unsigned long iospace;
/* /*
* We need to be carefull probing on bus 0 (directly connected to host * We need to be carefull probing on bus 0 (directly connected to host
* bridge). We should only acccess the well defined possible devices in * bridge). We should only access the well defined possible devices in
* use, ignore aliases and the like. * use, ignore aliases and the like.
*/ */
static unsigned char mcf_host_slot2sid[32] = { static unsigned char mcf_host_slot2sid[32] = {
......
...@@ -10191,7 +10191,7 @@ xdnrm_con: ...@@ -10191,7 +10191,7 @@ xdnrm_con:
xdnrm_sd: xdnrm_sd:
mov.l %a1,-(%sp) mov.l %a1,-(%sp)
tst.b LOCAL_EX(%a0) # is denorm pos or neg? tst.b LOCAL_EX(%a0) # is denorm pos or neg?
smi.b %d1 # set d0 accodingly smi.b %d1 # set d0 accordingly
bsr.l unf_sub bsr.l unf_sub
mov.l (%sp)+,%a1 mov.l (%sp)+,%a1
xdnrm_exit: xdnrm_exit:
...@@ -10990,7 +10990,7 @@ src_qnan_m: ...@@ -10990,7 +10990,7 @@ src_qnan_m:
# routines where an instruction is selected by an index into # routines where an instruction is selected by an index into
# a large jump table corresponding to a given instruction which # a large jump table corresponding to a given instruction which
# has been decoded. Flow continues here where we now decode # has been decoded. Flow continues here where we now decode
# further accoding to the source operand type. # further according to the source operand type.
# #
global fsinh global fsinh
...@@ -23196,14 +23196,14 @@ m_sign: ...@@ -23196,14 +23196,14 @@ m_sign:
# #
# 1. Branch on the sign of the adjusted exponent. # 1. Branch on the sign of the adjusted exponent.
# 2p.(positive exp) # 2p.(positive exp)
# 2. Check M16 and the digits in lwords 2 and 3 in decending order. # 2. Check M16 and the digits in lwords 2 and 3 in descending order.
# 3. Add one for each zero encountered until a non-zero digit. # 3. Add one for each zero encountered until a non-zero digit.
# 4. Subtract the count from the exp. # 4. Subtract the count from the exp.
# 5. Check if the exp has crossed zero in #3 above; make the exp abs # 5. Check if the exp has crossed zero in #3 above; make the exp abs
# and set SE. # and set SE.
# 6. Multiply the mantissa by 10**count. # 6. Multiply the mantissa by 10**count.
# 2n.(negative exp) # 2n.(negative exp)
# 2. Check the digits in lwords 3 and 2 in decending order. # 2. Check the digits in lwords 3 and 2 in descending order.
# 3. Add one for each zero encountered until a non-zero digit. # 3. Add one for each zero encountered until a non-zero digit.
# 4. Add the count to the exp. # 4. Add the count to the exp.
# 5. Check if the exp has crossed zero in #3 above; clear SE. # 5. Check if the exp has crossed zero in #3 above; clear SE.
......
...@@ -13156,14 +13156,14 @@ m_sign: ...@@ -13156,14 +13156,14 @@ m_sign:
# #
# 1. Branch on the sign of the adjusted exponent. # 1. Branch on the sign of the adjusted exponent.
# 2p.(positive exp) # 2p.(positive exp)
# 2. Check M16 and the digits in lwords 2 and 3 in decending order. # 2. Check M16 and the digits in lwords 2 and 3 in descending order.
# 3. Add one for each zero encountered until a non-zero digit. # 3. Add one for each zero encountered until a non-zero digit.
# 4. Subtract the count from the exp. # 4. Subtract the count from the exp.
# 5. Check if the exp has crossed zero in #3 above; make the exp abs # 5. Check if the exp has crossed zero in #3 above; make the exp abs
# and set SE. # and set SE.
# 6. Multiply the mantissa by 10**count. # 6. Multiply the mantissa by 10**count.
# 2n.(negative exp) # 2n.(negative exp)
# 2. Check the digits in lwords 3 and 2 in decending order. # 2. Check the digits in lwords 3 and 2 in descending order.
# 3. Add one for each zero encountered until a non-zero digit. # 3. Add one for each zero encountered until a non-zero digit.
# 4. Add the count to the exp. # 4. Add the count to the exp.
# 5. Check if the exp has crossed zero in #3 above; clear SE. # 5. Check if the exp has crossed zero in #3 above; clear SE.
......
...@@ -18,7 +18,7 @@ ...@@ -18,7 +18,7 @@
* AUG/22/2000 : added support for 32-bit Dual-Address-Mode (K) 2000 * AUG/22/2000 : added support for 32-bit Dual-Address-Mode (K) 2000
* Oliver Kamphenkel (O.Kamphenkel@tu-bs.de) * Oliver Kamphenkel (O.Kamphenkel@tu-bs.de)
* *
* AUG/25/2000 : addad support for 8, 16 and 32-bit Single-Address-Mode (K)2000 * AUG/25/2000 : added support for 8, 16 and 32-bit Single-Address-Mode (K)2000
* Oliver Kamphenkel (O.Kamphenkel@tu-bs.de) * Oliver Kamphenkel (O.Kamphenkel@tu-bs.de)
* *
* APR/18/2002 : added proper support for MCF5272 DMA controller. * APR/18/2002 : added proper support for MCF5272 DMA controller.
......
...@@ -123,10 +123,10 @@ ...@@ -123,10 +123,10 @@
/* /*
* I2C module. * I2C module.
*/ */
#define MCFI2C_BASE0 (MCF_MBAR + 0x280) /* Base addreess I2C0 */ #define MCFI2C_BASE0 (MCF_MBAR + 0x280) /* Base address I2C0 */
#define MCFI2C_SIZE0 0x20 /* Register set size */ #define MCFI2C_SIZE0 0x20 /* Register set size */
#define MCFI2C_BASE1 (MCF_MBAR2 + 0x440) /* Base addreess I2C1 */ #define MCFI2C_BASE1 (MCF_MBAR2 + 0x440) /* Base address I2C1 */
#define MCFI2C_SIZE1 0x20 /* Register set size */ #define MCFI2C_SIZE1 0x20 /* Register set size */
/* /*
......
...@@ -38,7 +38,7 @@ ...@@ -38,7 +38,7 @@
/* /*
* MMU Operation register. * MMU Operation register.
*/ */
#define MMUOR_UAA 0x00000001 /* Update allocatiom address */ #define MMUOR_UAA 0x00000001 /* Update allocation address */
#define MMUOR_ACC 0x00000002 /* TLB access */ #define MMUOR_ACC 0x00000002 /* TLB access */
#define MMUOR_RD 0x00000004 /* TLB access read */ #define MMUOR_RD 0x00000004 /* TLB access read */
#define MMUOR_WR 0x00000000 /* TLB access write */ #define MMUOR_WR 0x00000000 /* TLB access write */
......
/* /*
* Q40 master Chip Control * Q40 master Chip Control
* RTC stuff merged for compactnes.. * RTC stuff merged for compactness.
*/ */
#ifndef _Q40_MASTER_H #ifndef _Q40_MASTER_H
......
...@@ -60,7 +60,7 @@ ...@@ -60,7 +60,7 @@
* *
* The host talks to the IOPs using a rather simple message-passing scheme via * The host talks to the IOPs using a rather simple message-passing scheme via
* a shared memory area in the IOP RAM. Each IOP has seven "channels"; each * a shared memory area in the IOP RAM. Each IOP has seven "channels"; each
* channel is conneced to a specific software driver on the IOP. For example * channel is connected to a specific software driver on the IOP. For example
* on the SCC IOP there is one channel for each serial port. Each channel has * on the SCC IOP there is one channel for each serial port. Each channel has
* an incoming and and outgoing message queue with a depth of one. * an incoming and and outgoing message queue with a depth of one.
* *
......
...@@ -130,7 +130,7 @@ do_fscc=0 ...@@ -130,7 +130,7 @@ do_fscc=0
bfextu %d2{#13,#3},%d0 bfextu %d2{#13,#3},%d0
.endm .endm
| decode the 8bit diplacement from the brief extension word | decode the 8bit displacement from the brief extension word
.macro fp_decode_disp8 .macro fp_decode_disp8
move.b %d2,%d0 move.b %d2,%d0
ext.w %d0 ext.w %d0
......
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