Commit 8730f45d authored by Alex Elder's avatar Alex Elder Committed by David S. Miller

net: ipa: program metadata mask differently

The way the mask value is programmed for QMAP RX endpoints was based
on some wrong assumptions about the way metadata containing the QMAP
mux_id value is formatted.  The metadata value supplied by the
modem is *not* in QMAP format, and in fact contains the mux_id we
want in its (big endian) low-order byte.  That byte must be written
by the IPA into offset 1 of the QMAP header it inserts before the
received packet.

QMAP TX endpoints *do* use a QMAP header as the metadata sent with
each packet.  The modem assumes this, and based on that assumes the
mux_id is in the second byte.  To match those assumptions we must
program the modem TX (QMAP) endpoint HDR register to indicate the
metadata will be found at offset 0 in the message header.

The previous configuration managed to work, but it was not working
correctly.  This patch fixes a bug whose symptom was receipt of
messages containing the wrong QMAP mux_id.

In fixing this, get rid of ipa_rmnet_mux_id_metadata_mask(), which
was more or less defined so there was a separate place to explain
what was happening as we generated the mask value.  Instead, put a
longer description of how this works above ipa_endpoint_init_hdr(),
and define the metadata mask to use as a simple constant.
Signed-off-by: default avatarAlex Elder <elder@linaro.org>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent c25cba36
...@@ -32,6 +32,9 @@ ...@@ -32,6 +32,9 @@
/* The amount of RX buffer space consumed by standard skb overhead */ /* The amount of RX buffer space consumed by standard skb overhead */
#define IPA_RX_BUFFER_OVERHEAD (PAGE_SIZE - SKB_MAX_ORDER(NET_SKB_PAD, 0)) #define IPA_RX_BUFFER_OVERHEAD (PAGE_SIZE - SKB_MAX_ORDER(NET_SKB_PAD, 0))
/* Where to find the QMAP mux_id for a packet within modem-supplied metadata */
#define IPA_ENDPOINT_QMAP_METADATA_MASK 0x000000ff /* host byte order */
#define IPA_ENDPOINT_RESET_AGGR_RETRY_MAX 3 #define IPA_ENDPOINT_RESET_AGGR_RETRY_MAX 3
#define IPA_AGGR_TIME_LIMIT_DEFAULT 1000 /* microseconds */ #define IPA_AGGR_TIME_LIMIT_DEFAULT 1000 /* microseconds */
...@@ -433,6 +436,24 @@ static void ipa_endpoint_init_cfg(struct ipa_endpoint *endpoint) ...@@ -433,6 +436,24 @@ static void ipa_endpoint_init_cfg(struct ipa_endpoint *endpoint)
iowrite32(val, endpoint->ipa->reg_virt + offset); iowrite32(val, endpoint->ipa->reg_virt + offset);
} }
/**
* We program QMAP endpoints so each packet received is preceded by a QMAP
* header structure. The QMAP header contains a 1-byte mux_id and 2-byte
* packet size field, and we have the IPA hardware populate both for each
* received packet. The header is configured (in the HDR_EXT register)
* to use big endian format.
*
* The packet size is written into the QMAP header's pkt_len field. That
* location is defined here using the HDR_OFST_PKT_SIZE field.
*
* The mux_id comes from a 4-byte metadata value supplied with each packet
* by the modem. It is *not* a QMAP header, but it does contain the mux_id
* value that we want, in its low-order byte. A bitmask defined in the
* endpoint's METADATA_MASK register defines which byte within the modem
* metadata contains the mux_id. And the OFST_METADATA field programmed
* here indicates where the extracted byte should be placed within the QMAP
* header.
*/
static void ipa_endpoint_init_hdr(struct ipa_endpoint *endpoint) static void ipa_endpoint_init_hdr(struct ipa_endpoint *endpoint)
{ {
u32 offset = IPA_REG_ENDP_INIT_HDR_N_OFFSET(endpoint->endpoint_id); u32 offset = IPA_REG_ENDP_INIT_HDR_N_OFFSET(endpoint->endpoint_id);
...@@ -441,25 +462,31 @@ static void ipa_endpoint_init_hdr(struct ipa_endpoint *endpoint) ...@@ -441,25 +462,31 @@ static void ipa_endpoint_init_hdr(struct ipa_endpoint *endpoint)
if (endpoint->data->qmap) { if (endpoint->data->qmap) {
size_t header_size = sizeof(struct rmnet_map_header); size_t header_size = sizeof(struct rmnet_map_header);
/* We might supply a checksum header after the QMAP header */
if (endpoint->toward_ipa && endpoint->data->checksum) if (endpoint->toward_ipa && endpoint->data->checksum)
header_size += sizeof(struct rmnet_map_ul_csum_header); header_size += sizeof(struct rmnet_map_ul_csum_header);
val |= u32_encode_bits(header_size, HDR_LEN_FMASK); val |= u32_encode_bits(header_size, HDR_LEN_FMASK);
/* metadata is the 4 byte rmnet_map header itself */
val |= HDR_OFST_METADATA_VALID_FMASK; /* Define how to fill mux_id in a received QMAP header */
val |= u32_encode_bits(0, HDR_OFST_METADATA_FMASK);
/* HDR_ADDITIONAL_CONST_LEN is 0; (IPA->AP only) */
if (!endpoint->toward_ipa) { if (!endpoint->toward_ipa) {
u32 size_offset = offsetof(struct rmnet_map_header, u32 off; /* Field offset within header */
pkt_len);
/* Where IPA will write the metadata value */
off = offsetof(struct rmnet_map_header, mux_id);
val |= u32_encode_bits(off, HDR_OFST_METADATA_FMASK);
/* Where IPA will write the length */
off = offsetof(struct rmnet_map_header, pkt_len);
val |= HDR_OFST_PKT_SIZE_VALID_FMASK; val |= HDR_OFST_PKT_SIZE_VALID_FMASK;
val |= u32_encode_bits(size_offset, val |= u32_encode_bits(off, HDR_OFST_PKT_SIZE_FMASK);
HDR_OFST_PKT_SIZE_FMASK);
} }
/* For QMAP TX, metadata offset is 0 (modem assumes this) */
val |= HDR_OFST_METADATA_VALID_FMASK;
/* HDR_ADDITIONAL_CONST_LEN is 0; (RX only) */
/* HDR_A5_MUX is 0 */ /* HDR_A5_MUX is 0 */
/* HDR_LEN_INC_DEAGG_HDR is 0 */ /* HDR_LEN_INC_DEAGG_HDR is 0 */
/* HDR_METADATA_REG_VALID is 0; (AP->IPA only) */ /* HDR_METADATA_REG_VALID is 0 (TX only) */
} }
iowrite32(val, endpoint->ipa->reg_virt + offset); iowrite32(val, endpoint->ipa->reg_virt + offset);
...@@ -482,28 +509,6 @@ static void ipa_endpoint_init_hdr_ext(struct ipa_endpoint *endpoint) ...@@ -482,28 +509,6 @@ static void ipa_endpoint_init_hdr_ext(struct ipa_endpoint *endpoint)
iowrite32(val, endpoint->ipa->reg_virt + offset); iowrite32(val, endpoint->ipa->reg_virt + offset);
} }
/**
* Generate a metadata mask value that will select only the mux_id
* field in an rmnet_map header structure. The mux_id is at offset
* 1 byte from the beginning of the structure, but the metadata
* value is treated as a 4-byte unit. So this mask must be computed
* with endianness in mind. Note that ipa_endpoint_init_hdr_metadata_mask()
* will convert this value to the proper byte order.
*
* Marked __always_inline because this is really computing a
* constant value.
*/
static __always_inline __be32 ipa_rmnet_mux_id_metadata_mask(void)
{
size_t mux_id_offset = offsetof(struct rmnet_map_header, mux_id);
u32 mux_id_mask = 0;
u8 *bytes;
bytes = (u8 *)&mux_id_mask;
bytes[mux_id_offset] = 0xff; /* mux_id is 1 byte */
return cpu_to_be32(mux_id_mask);
}
static void ipa_endpoint_init_hdr_metadata_mask(struct ipa_endpoint *endpoint) static void ipa_endpoint_init_hdr_metadata_mask(struct ipa_endpoint *endpoint)
{ {
...@@ -513,8 +518,9 @@ static void ipa_endpoint_init_hdr_metadata_mask(struct ipa_endpoint *endpoint) ...@@ -513,8 +518,9 @@ static void ipa_endpoint_init_hdr_metadata_mask(struct ipa_endpoint *endpoint)
offset = IPA_REG_ENDP_INIT_HDR_METADATA_MASK_N_OFFSET(endpoint_id); offset = IPA_REG_ENDP_INIT_HDR_METADATA_MASK_N_OFFSET(endpoint_id);
/* Note that HDR_ENDIANNESS indicates big endian header fields */
if (!endpoint->toward_ipa && endpoint->data->qmap) if (!endpoint->toward_ipa && endpoint->data->qmap)
val = ipa_rmnet_mux_id_metadata_mask(); val = cpu_to_be32(IPA_ENDPOINT_QMAP_METADATA_MASK);
iowrite32(val, endpoint->ipa->reg_virt + offset); iowrite32(val, endpoint->ipa->reg_virt + offset);
} }
......
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