Commit 876923fb authored by xinhui pan's avatar xinhui pan Committed by Alex Deucher

drm/amdgpu: Fix panic during gpu reset

Clear the flag after hw suspend, otherwise it skips the corresponding hw
resume.
Signed-off-by: default avatarxinhui pan <xinhui.pan@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 1f288afc
...@@ -2257,6 +2257,7 @@ static int amdgpu_device_ip_suspend_phase2(struct amdgpu_device *adev) ...@@ -2257,6 +2257,7 @@ static int amdgpu_device_ip_suspend_phase2(struct amdgpu_device *adev)
DRM_ERROR("suspend of IP block <%s> failed %d\n", DRM_ERROR("suspend of IP block <%s> failed %d\n",
adev->ip_blocks[i].version->funcs->name, r); adev->ip_blocks[i].version->funcs->name, r);
} }
adev->ip_blocks[i].status.hw = false;
/* handle putting the SMC in the appropriate state */ /* handle putting the SMC in the appropriate state */
if (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_SMC) { if (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_SMC) {
if (is_support_sw_smu(adev)) { if (is_support_sw_smu(adev)) {
...@@ -2271,7 +2272,6 @@ static int amdgpu_device_ip_suspend_phase2(struct amdgpu_device *adev) ...@@ -2271,7 +2272,6 @@ static int amdgpu_device_ip_suspend_phase2(struct amdgpu_device *adev)
adev->mp1_state, r); adev->mp1_state, r);
return r; return r;
} }
adev->ip_blocks[i].status.hw = false;
} }
} }
} }
......
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