drm/amdgpu: Optimize amdgpu_mca_ras_late_init/amdgpu_mca_ras_fini function code

Optimize amdgpu_mca_ras_late_init/amdgpu_mca_ras_fini function code.
Signed-off-by: yipechai <YiPeng.Chai@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drivers/gpu/drm/amd/amdgpu/amdgpu_mca.c

@@ -74,48 +74,11 @@ void amdgpu_mca_query_ras_error_count(struct amdgpu_device *adev,
 int amdgpu_mca_ras_late_init(struct amdgpu_device *adev,
 			     struct amdgpu_mca_ras *mca_dev)
 {
-	char sysfs_name[32] = {0};
-	int r;
-	struct ras_ih_if ih_info = {
-		.cb = NULL,
-	};
-	struct ras_fs_if fs_info= {
-		.sysfs_name = sysfs_name,
-	};
-
-	snprintf(sysfs_name, sizeof(sysfs_name), "%s_err_count",
-		mca_dev->ras->ras_block.ras_comm.name);
-
-	if (!mca_dev->ras_if) {
-		mca_dev->ras_if = kmalloc(sizeof(struct ras_common_if), GFP_KERNEL);
-		if (!mca_dev->ras_if)
-			return -ENOMEM;
-		mca_dev->ras_if->block = mca_dev->ras->ras_block.ras_comm.block;
-		mca_dev->ras_if->sub_block_index = mca_dev->ras->ras_block.ras_comm.sub_block_index;
-		mca_dev->ras_if->type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE;
-	}
-	ih_info.head = fs_info.head = *mca_dev->ras_if;
-	r = amdgpu_ras_late_init(adev, mca_dev->ras_if,
-				 &fs_info, &ih_info);
-	if (r || !amdgpu_ras_is_supported(adev, mca_dev->ras_if->block)) {
-		kfree(mca_dev->ras_if);
-		mca_dev->ras_if = NULL;
-	}
-
-	return r;
+	return amdgpu_ras_block_late_init(adev, mca_dev->ras_if);
 }
 
 void amdgpu_mca_ras_fini(struct amdgpu_device *adev,
 			 struct amdgpu_mca_ras *mca_dev)
 {
-	struct ras_ih_if ih_info = {
-		.cb = NULL,
-	};
-
-	if (!mca_dev->ras_if)
-		return;
-
-	amdgpu_ras_late_fini(adev, mca_dev->ras_if, &ih_info);
-	kfree(mca_dev->ras_if);
-	mca_dev->ras_if = NULL;
+	amdgpu_ras_block_late_fini(adev, mca_dev->ras_if);
 }
\ No newline at end of file

drivers/gpu/drm/amd/amdgpu/mca_v3_0.c

@@ -71,6 +71,7 @@ struct amdgpu_mca_ras_block mca_v3_0_mp0_ras = {
 		.ras_comm = {
 			.block = AMDGPU_RAS_BLOCK__MCA,
 			.sub_block_index = AMDGPU_RAS_MCA_BLOCK__MP0,
+			.type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE,
 			.name = "mp0",
 		},
 		.hw_ops = &mca_v3_0_mp0_hw_ops,
@@ -108,6 +109,7 @@ struct amdgpu_mca_ras_block mca_v3_0_mp1_ras = {
 		.ras_comm = {
 			.block = AMDGPU_RAS_BLOCK__MCA,
 			.sub_block_index = AMDGPU_RAS_MCA_BLOCK__MP1,
+			.type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE,
 			.name = "mp1",
 		},
 		.hw_ops = &mca_v3_0_mp1_hw_ops,
@@ -145,6 +147,7 @@ struct amdgpu_mca_ras_block mca_v3_0_mpio_ras = {
 		.ras_comm = {
 			.block = AMDGPU_RAS_BLOCK__MCA,
 			.sub_block_index = AMDGPU_RAS_MCA_BLOCK__MPIO,
+			.type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE,
 			.name = "mpio",
 		},
 		.hw_ops = &mca_v3_0_mpio_hw_ops,
@@ -165,6 +168,9 @@ static void mca_v3_0_init(struct amdgpu_device *adev)
 	amdgpu_ras_register_ras_block(adev, &mca->mp0.ras->ras_block);
 	amdgpu_ras_register_ras_block(adev, &mca->mp1.ras->ras_block);
 	amdgpu_ras_register_ras_block(adev, &mca->mpio.ras->ras_block);
+	mca->mp0.ras_if = &mca->mp0.ras->ras_block.ras_comm;
+	mca->mp1.ras_if = &mca->mp1.ras->ras_block.ras_comm;
+	mca->mpio.ras_if = &mca->mpio.ras->ras_block.ras_comm;
 }
 
 const struct amdgpu_mca_funcs mca_v3_0_funcs = {