clk: sunxi-ng: mux: Rename mux macro to be consistent

Rename the internal mux macro to be consistent with the other internal
structure macros.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

drivers/clk/sunxi-ng/ccu_div.h

@@ -83,7 +83,7 @@ struct ccu_div {
 	struct ccu_div _struct = {					\
 		.enable	= _gate,					\
 		.div	= _SUNXI_CCU_DIV(_mshift, _mwidth),		\
-		.mux	= SUNXI_CLK_MUX(_muxshift, _muxwidth),		\
+		.mux	= _SUNXI_CCU_MUX(_muxshift, _muxwidth),		\
 		.common	= {						\
 			.reg		= _reg,				\
 			.hw.init	= CLK_HW_INIT_PARENTS(_name,	\

drivers/clk/sunxi-ng/ccu_mp.h

@@ -44,7 +44,7 @@ struct ccu_mp {
 		.enable	= _gate,					\
 		.m	= _SUNXI_CCU_DIV(_mshift, _mwidth),		\
 		.p	= _SUNXI_CCU_DIV(_pshift, _pwidth),		\
-		.mux	= SUNXI_CLK_MUX(_muxshift, _muxwidth),		\
+		.mux	= _SUNXI_CCU_MUX(_muxshift, _muxwidth),		\
 		.common	= {						\
 			.reg		= _reg,				\
 			.hw.init	= CLK_HW_INIT_PARENTS(_name,	\

drivers/clk/sunxi-ng/ccu_mux.h

@@ -21,7 +21,7 @@ struct ccu_mux_internal {
 	} variable_prediv;
 };
 
-#define SUNXI_CLK_MUX(_shift, _width)	\
+#define _SUNXI_CCU_MUX(_shift, _width)		\
 	{					\
 		.shift	= _shift,		\
 		.width	= _width,		\
@@ -37,7 +37,7 @@ struct ccu_mux {
 
 #define SUNXI_CCU_MUX(_struct, _name, _parents, _reg, _shift, _width, _flags) \
 	struct ccu_mux _struct = {					\
-		.mux	= SUNXI_CLK_MUX(_shift, _width),		\
+		.mux	= _SUNXI_CCU_MUX(_shift, _width),		\
 		.common	= {						\
 			.reg		= _reg,				\
 			.hw.init	= CLK_HW_INIT_PARENTS(_name,	\
@@ -51,7 +51,7 @@ struct ccu_mux {
 				_shift, _width, _gate, _flags)		\
 	struct ccu_mux _struct = {					\
 		.enable	= _gate,					\
-		.mux	= SUNXI_CLK_MUX(_shift, _width),		\
+		.mux	= _SUNXI_CCU_MUX(_shift, _width),		\
 		.common	= {						\
 			.reg		= _reg,				\
 			.hw.init	= CLK_HW_INIT_PARENTS(_name,	\

drivers/clk/sunxi-ng/ccu_nkm.h

@@ -49,7 +49,7 @@ struct ccu_nkm {
 		.k		= _SUNXI_CCU_MULT(_kshift, _kwidth),	\
 		.n		= _SUNXI_CCU_MULT(_nshift, _nwidth),	\
 		.m		= _SUNXI_CCU_DIV(_mshift, _mwidth),	\
-		.mux		= SUNXI_CLK_MUX(_muxshift, _muxwidth),	\
+		.mux		= _SUNXI_CCU_MUX(_muxshift, _muxwidth),	\
 		.common		= {					\
 			.reg		= _reg,				\
 			.hw.init	= CLK_HW_INIT_PARENTS(_name,	\