Commit 89ce4b0f authored by Philipp Zabel's avatar Philipp Zabel

gpu: ipu-v3: do not divide by zero if the pixel clock is too large

Even if an unsupported mode with a pixel clock larger than two times the
264 MHz IPU HSP clock is set, don't divide by zero.
Signed-off-by: default avatarPhilipp Zabel <p.zabel@pengutronix.de>
parent c517d838
......@@ -459,6 +459,8 @@ static void ipu_di_config_clock(struct ipu_di *di,
clkrate = clk_get_rate(di->clk_ipu);
div = DIV_ROUND_CLOSEST(clkrate, sig->mode.pixelclock);
if (div == 0)
div = 1;
rate = clkrate / div;
error = rate / (sig->mode.pixelclock / 1000);
......
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