Commit 8a86e833 authored by Jayamohan Kallickal's avatar Jayamohan Kallickal Committed by James Bottomley

[SCSI] be2iscsi: Fix changes in ASYNC Path for SKH-R adapter

DEF_Q[HDR/DATA] is created on the chute on which iSCSI Protocol is loaded.
When a connection is offloaded, the DEF_Q HDR/Data ID needs to be passed.
FW posts ASYNC message received from target on the passed DEF_Q. Connection
can be offloaded on any of the chute so DEF_Q is created on each Chute.

Change in the ASYNC path initialization based on the configuration parameters
returned for each chute.

For BE-X family iSCSI protocol is loaded only on single chute.
Signed-off-by: default avatarJohn Soni Jose <sony.john-n@emulex.com>
Signed-off-by: default avatarJayamohan Kallickal <jayamohan.kallickal@emulex.com>
Signed-off-by: default avatarJames Bottomley <JBottomley@Parallels.com>
parent 843ae752
......@@ -1027,10 +1027,29 @@ int beiscsi_cmd_q_destroy(struct be_ctrl_info *ctrl, struct be_queue_info *q,
return status;
}
/**
* be_cmd_create_default_pdu_queue()- Create DEFQ for the adapter
* @ctrl: ptr to ctrl_info
* @cq: Completion Queue
* @dq: Default Queue
* @lenght: ring size
* @entry_size: size of each entry in DEFQ
* @is_header: Header or Data DEFQ
* @ulp_num: Bind to which ULP
*
* Create HDR/Data DEFQ for the passed ULP. Unsol PDU are posted
* on this queue by the FW
*
* return
* Success: 0
* Failure: Non-Zero Value
*
**/
int be_cmd_create_default_pdu_queue(struct be_ctrl_info *ctrl,
struct be_queue_info *cq,
struct be_queue_info *dq, int length,
int entry_size)
int entry_size, uint8_t is_header,
uint8_t ulp_num)
{
struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
struct be_defq_create_req *req = embedded_payload(wrb);
......@@ -1048,6 +1067,11 @@ int be_cmd_create_default_pdu_queue(struct be_ctrl_info *ctrl,
OPCODE_COMMON_ISCSI_DEFQ_CREATE, sizeof(*req));
req->num_pages = PAGES_4K_SPANNED(q_mem->va, q_mem->size);
if (phba->fw_config.dual_ulp_aware) {
req->ulp_num = ulp_num;
req->dua_feature |= (1 << BEISCSI_DUAL_ULP_AWARE_BIT);
req->dua_feature |= (1 << BEISCSI_BIND_Q_TO_ULP_BIT);
}
if (is_chip_be2_be3r(phba)) {
AMAP_SET_BITS(struct amap_be_default_pdu_context,
......@@ -1085,10 +1109,26 @@ int be_cmd_create_default_pdu_queue(struct be_ctrl_info *ctrl,
status = be_mbox_notify(ctrl);
if (!status) {
struct be_ring *defq_ring;
struct be_defq_create_resp *resp = embedded_payload(wrb);
dq->id = le16_to_cpu(resp->id);
dq->created = true;
if (is_header)
defq_ring = &phba->phwi_ctrlr->default_pdu_hdr[ulp_num];
else
defq_ring = &phba->phwi_ctrlr->
default_pdu_data[ulp_num];
defq_ring->id = dq->id;
if (!phba->fw_config.dual_ulp_aware) {
defq_ring->ulp_num = BEISCSI_ULP0;
defq_ring->doorbell_offset = DB_RXULP0_OFFSET;
} else {
defq_ring->ulp_num = resp->ulp_num;
defq_ring->doorbell_offset = resp->doorbell_offset;
}
}
spin_unlock(&ctrl->mbox_lock);
......
......@@ -729,7 +729,8 @@ int be_mbox_notify(struct be_ctrl_info *ctrl);
int be_cmd_create_default_pdu_queue(struct be_ctrl_info *ctrl,
struct be_queue_info *cq,
struct be_queue_info *dq, int length,
int entry_size);
int entry_size, uint8_t is_header,
uint8_t ulp_num);
int be_cmd_iscsi_post_template_hdr(struct be_ctrl_info *ctrl,
struct be_dma_mem *q_mem);
......@@ -788,7 +789,9 @@ struct be_defq_create_req {
struct be_cmd_req_hdr hdr;
u16 num_pages;
u8 ulp_num;
u8 rsvd0;
#define BEISCSI_DUAL_ULP_AWARE_BIT 0 /* Byte 3 - Bit 0 */
#define BEISCSI_BIND_Q_TO_ULP_BIT 1 /* Byte 3 - Bit 1 */
u8 dua_feature;
struct be_default_pdu_context context;
struct phys_addr pages[8];
} __packed;
......@@ -796,7 +799,11 @@ struct be_defq_create_req {
struct be_defq_create_resp {
struct be_cmd_req_hdr hdr;
u16 id;
u16 rsvd0;
u8 rsvd0;
u8 ulp_num;
u32 doorbell_offset;
u16 register_set;
u16 doorbell_format;
} __packed;
struct be_post_template_pages_req {
......
This diff is collapsed.
......@@ -105,7 +105,8 @@
* So have atleast 8 of them by default
*/
#define HWI_GET_ASYNC_PDU_CTX(phwi) (phwi->phwi_ctxt->pasync_ctx)
#define HWI_GET_ASYNC_PDU_CTX(phwi, ulp_num) \
(phwi->phwi_ctxt->pasync_ctx[ulp_num])
/********* Memory BAR register ************/
#define PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET 0xfc
......@@ -150,16 +151,19 @@
#define DB_CQ_REARM_SHIFT (29) /* bit 29 */
#define GET_HWI_CONTROLLER_WS(pc) (pc->phwi_ctrlr)
#define HWI_GET_DEF_BUFQ_ID(pc) (((struct hwi_controller *)\
(GET_HWI_CONTROLLER_WS(pc)))->default_pdu_data.id)
#define HWI_GET_DEF_HDRQ_ID(pc) (((struct hwi_controller *)\
(GET_HWI_CONTROLLER_WS(pc)))->default_pdu_hdr.id)
#define HWI_GET_DEF_BUFQ_ID(pc, ulp_num) (((struct hwi_controller *)\
(GET_HWI_CONTROLLER_WS(pc)))->default_pdu_data[ulp_num].id)
#define HWI_GET_DEF_HDRQ_ID(pc, ulp_num) (((struct hwi_controller *)\
(GET_HWI_CONTROLLER_WS(pc)))->default_pdu_hdr[ulp_num].id)
#define PAGES_REQUIRED(x) \
((x < PAGE_SIZE) ? 1 : ((x + PAGE_SIZE - 1) / PAGE_SIZE))
#define BEISCSI_MSI_NAME 20 /* size of msi_name string */
#define MEM_DESCR_OFFSET 7
#define BEISCSI_DEFQ_HDR 1
#define BEISCSI_DEFQ_DATA 0
enum be_mem_enum {
HWI_MEM_ADDN_CONTEXT,
HWI_MEM_WRB,
......@@ -167,13 +171,20 @@ enum be_mem_enum {
HWI_MEM_SGLH,
HWI_MEM_SGE,
HWI_MEM_TEMPLATE_HDR,
HWI_MEM_ASYNC_HEADER_BUF, /* 5 */
HWI_MEM_ASYNC_DATA_BUF,
HWI_MEM_ASYNC_HEADER_RING,
HWI_MEM_ASYNC_DATA_RING,
HWI_MEM_ASYNC_HEADER_HANDLE,
HWI_MEM_ASYNC_DATA_HANDLE, /* 10 */
HWI_MEM_ASYNC_PDU_CONTEXT,
HWI_MEM_ASYNC_HEADER_BUF_ULP0,
HWI_MEM_ASYNC_DATA_BUF_ULP0,
HWI_MEM_ASYNC_HEADER_RING_ULP0,
HWI_MEM_ASYNC_DATA_RING_ULP0,
HWI_MEM_ASYNC_HEADER_HANDLE_ULP0,
HWI_MEM_ASYNC_DATA_HANDLE_ULP0,
HWI_MEM_ASYNC_PDU_CONTEXT_ULP0,
HWI_MEM_ASYNC_HEADER_BUF_ULP1,
HWI_MEM_ASYNC_DATA_BUF_ULP1,
HWI_MEM_ASYNC_HEADER_RING_ULP1,
HWI_MEM_ASYNC_DATA_RING_ULP1,
HWI_MEM_ASYNC_HEADER_HANDLE_ULP1,
HWI_MEM_ASYNC_DATA_HANDLE_ULP1,
HWI_MEM_ASYNC_PDU_CONTEXT_ULP1,
ISCSI_MEM_GLOBAL_HEADER,
SE_MEM_MAX
};
......@@ -337,7 +348,7 @@ struct beiscsi_hba {
unsigned int phys_port;
unsigned int iscsi_cid_start[BEISCSI_ULP_COUNT];
#define BEISCSI_GET_CID_COUNT(phba, ulp_num) \
(phba->fw_config.iscsi_cid_count[ulp_num])
(phba->fw_config.iscsi_cid_count[ulp_num])
unsigned int iscsi_cid_count[BEISCSI_ULP_COUNT];
unsigned int iscsi_icd_count[BEISCSI_ULP_COUNT];
unsigned int iscsi_icd_start[BEISCSI_ULP_COUNT];
......@@ -577,7 +588,8 @@ struct hwi_async_pdu_context {
unsigned int buffer_size;
unsigned int num_entries;
#define BE_GET_ASYNC_CRI_FROM_CID(cid) (pasync_ctx->cid_to_async_cri_map[cid])
unsigned short cid_to_async_cri_map[BE_MAX_SESSION];
/**
* This is a varying size list! Do not add anything
* after this entry!!
......@@ -931,6 +943,10 @@ struct be_ring {
u32 cidx; /* consumer index */
u32 pidx; /* producer index -- not used by most rings */
u32 item_size; /* size in bytes of one object */
u8 ulp_num; /* ULP to which CID binded */
u16 register_set;
u16 doorbell_format;
u32 doorbell_offset;
void *va; /* The virtual address of the ring. This
* should be last to allow 32 & 64 bit debugger
......@@ -938,6 +954,8 @@ struct be_ring {
*/
};
#define BEISCSI_GET_ULP_FROM_CRI(phwi_ctrlr, cri) \
(phwi_ctrlr->wrb_context[cri].ulp_num)
struct hwi_wrb_context {
struct list_head wrb_handle_list;
struct list_head wrb_handle_drvr_list;
......@@ -948,6 +966,7 @@ struct hwi_wrb_context {
unsigned short free_index;
unsigned short wrb_handles_available;
unsigned short cid;
uint8_t ulp_num; /* ULP to which CID binded */
};
struct hwi_controller {
......@@ -958,8 +977,8 @@ struct hwi_controller {
struct hwi_wrb_context *wrb_context;
struct mcc_wrb *pmcc_wrb_base;
struct be_ring default_pdu_hdr;
struct be_ring default_pdu_data;
struct be_ring default_pdu_hdr[BEISCSI_ULP_COUNT];
struct be_ring default_pdu_data[BEISCSI_ULP_COUNT];
struct hwi_context_memory *phwi_ctxt;
};
......@@ -990,11 +1009,10 @@ struct hwi_context_memory {
struct be_eq_obj be_eq[MAX_CPUS];
struct be_queue_info be_cq[MAX_CPUS - 1];
struct be_queue_info be_def_hdrq;
struct be_queue_info be_def_dataq;
struct be_queue_info *be_wrbq;
struct hwi_async_pdu_context *pasync_ctx;
struct be_queue_info be_def_hdrq[BEISCSI_ULP_COUNT];
struct be_queue_info be_def_dataq[BEISCSI_ULP_COUNT];
struct hwi_async_pdu_context *pasync_ctx[BEISCSI_ULP_COUNT];
};
/* Logging related definitions */
......
......@@ -315,7 +315,7 @@ int mgmt_get_fw_config(struct be_ctrl_info *ctrl,
if (pfw_cfg->ulp[ulp_num].ulp_mode &
BEISCSI_ULP_ISCSI_INI_MODE)
set_bit(ulp_num,
&phba->fw_config.ulp_supported);
&phba->fw_config.ulp_supported);
phba->fw_config.phys_port = pfw_cfg->phys_port;
for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
......@@ -506,8 +506,8 @@ int mgmt_epfw_cleanup(struct beiscsi_hba *phba, unsigned short chute)
OPCODE_COMMON_ISCSI_CLEANUP, sizeof(*req));
req->chute = chute;
req->hdr_ring_id = cpu_to_le16(HWI_GET_DEF_HDRQ_ID(phba));
req->data_ring_id = cpu_to_le16(HWI_GET_DEF_BUFQ_ID(phba));
req->hdr_ring_id = cpu_to_le16(HWI_GET_DEF_HDRQ_ID(phba, 0));
req->data_ring_id = cpu_to_le16(HWI_GET_DEF_BUFQ_ID(phba, 0));
status = be_mcc_notify_wait(phba);
if (status)
......@@ -651,8 +651,8 @@ int mgmt_open_connection(struct beiscsi_hba *phba,
phwi_ctrlr = phba->phwi_ctrlr;
phwi_context = phwi_ctrlr->phwi_ctxt;
def_hdr_id = (unsigned short)HWI_GET_DEF_HDRQ_ID(phba);
def_data_id = (unsigned short)HWI_GET_DEF_BUFQ_ID(phba);
def_hdr_id = (unsigned short)HWI_GET_DEF_HDRQ_ID(phba, 0);
def_data_id = (unsigned short)HWI_GET_DEF_BUFQ_ID(phba, 0);
ptemplate_address = &template_address;
ISCSI_GET_PDU_TEMPLATE_ADDRESS(phba, ptemplate_address);
......
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