Commit 8ab6abcb authored by James Hogan's avatar James Hogan Committed by Ralf Baechle

MIPS: mipsregs.h: Add EntryLo bit definitions

Add definitions for EntryLo register bits in mipsregs.h. The R4000
compatible ones are prefixed MIPS_ENTRYLO_ and the R3000 compatible ones
are prefixed R3K_ENTRYLO_.

These will be used in later patches.
Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: Maciej W. Rozycki <macro@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/10073/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent e50f0e31
...@@ -589,6 +589,28 @@ ...@@ -589,6 +589,28 @@
/* EntryHI bit definition */ /* EntryHI bit definition */
#define MIPS_ENTRYHI_EHINV (_ULCAST_(1) << 10) #define MIPS_ENTRYHI_EHINV (_ULCAST_(1) << 10)
/* R3000 EntryLo bit definitions */
#define R3K_ENTRYLO_G (_ULCAST_(1) << 8)
#define R3K_ENTRYLO_V (_ULCAST_(1) << 9)
#define R3K_ENTRYLO_D (_ULCAST_(1) << 10)
#define R3K_ENTRYLO_N (_ULCAST_(1) << 11)
/* R4000 compatible EntryLo bit definitions */
#define MIPS_ENTRYLO_G (_ULCAST_(1) << 0)
#define MIPS_ENTRYLO_V (_ULCAST_(1) << 1)
#define MIPS_ENTRYLO_D (_ULCAST_(1) << 2)
#define MIPS_ENTRYLO_C_SHIFT 3
#define MIPS_ENTRYLO_C (_ULCAST_(7) << MIPS_ENTRYLO_C_SHIFT)
#ifdef CONFIG_64BIT
/* as read by dmfc0 */
#define MIPS_ENTRYLO_XI (_ULCAST_(1) << 62)
#define MIPS_ENTRYLO_RI (_ULCAST_(1) << 63)
#else
/* as read by mfc0 */
#define MIPS_ENTRYLO_XI (_ULCAST_(1) << 30)
#define MIPS_ENTRYLO_RI (_ULCAST_(1) << 31)
#endif
/* CMGCRBase bit definitions */ /* CMGCRBase bit definitions */
#define MIPS_CMGCRB_BASE 11 #define MIPS_CMGCRB_BASE 11
#define MIPS_CMGCRF_BASE (~_ULCAST_((1 << MIPS_CMGCRB_BASE) - 1)) #define MIPS_CMGCRF_BASE (~_ULCAST_((1 << MIPS_CMGCRB_BASE) - 1))
......
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