Commit 8bb17b6c authored by Sebastian Reichel's avatar Sebastian Reichel

Merge branch 'psy-mfd-axp288-immutable' into psy-next

parents feb583e3 888f9743
......@@ -143,7 +143,6 @@ enum {
struct axp288_chrg_info {
struct platform_device *pdev;
struct axp20x_chrg_pdata *pdata;
struct regmap *regmap;
struct regmap_irq_chip_data *regmap_irqc;
int irq[CHRG_INTR_END];
......@@ -701,110 +700,112 @@ static int axp288_charger_handle_otg_evt(struct notifier_block *nb,
return NOTIFY_OK;
}
static void charger_init_hw_regs(struct axp288_chrg_info *info)
static int charger_init_hw_regs(struct axp288_chrg_info *info)
{
int ret, cc, cv;
unsigned int val;
/* Program temperature thresholds */
ret = regmap_write(info->regmap, AXP20X_V_LTF_CHRG, CHRG_VLTFC_0C);
if (ret < 0)
dev_warn(&info->pdev->dev, "register(%x) write error(%d)\n",
if (ret < 0) {
dev_err(&info->pdev->dev, "register(%x) write error(%d)\n",
AXP20X_V_LTF_CHRG, ret);
return ret;
}
ret = regmap_write(info->regmap, AXP20X_V_HTF_CHRG, CHRG_VHTFC_45C);
if (ret < 0)
dev_warn(&info->pdev->dev, "register(%x) write error(%d)\n",
if (ret < 0) {
dev_err(&info->pdev->dev, "register(%x) write error(%d)\n",
AXP20X_V_HTF_CHRG, ret);
return ret;
}
/* Do not turn-off charger o/p after charge cycle ends */
ret = regmap_update_bits(info->regmap,
AXP20X_CHRG_CTRL2,
CNTL2_CHG_OUT_TURNON, 1);
if (ret < 0)
dev_warn(&info->pdev->dev, "register(%x) write error(%d)\n",
if (ret < 0) {
dev_err(&info->pdev->dev, "register(%x) write error(%d)\n",
AXP20X_CHRG_CTRL2, ret);
return ret;
}
/* Enable interrupts */
ret = regmap_update_bits(info->regmap,
AXP20X_IRQ2_EN,
BAT_IRQ_CFG_BAT_MASK, 1);
if (ret < 0)
dev_warn(&info->pdev->dev, "register(%x) write error(%d)\n",
if (ret < 0) {
dev_err(&info->pdev->dev, "register(%x) write error(%d)\n",
AXP20X_IRQ2_EN, ret);
return ret;
}
ret = regmap_update_bits(info->regmap, AXP20X_IRQ3_EN,
TEMP_IRQ_CFG_MASK, 1);
if (ret < 0)
dev_warn(&info->pdev->dev, "register(%x) write error(%d)\n",
if (ret < 0) {
dev_err(&info->pdev->dev, "register(%x) write error(%d)\n",
AXP20X_IRQ3_EN, ret);
return ret;
}
/* Setup ending condition for charging to be 10% of I(chrg) */
ret = regmap_update_bits(info->regmap,
AXP20X_CHRG_CTRL1,
CHRG_CCCV_ITERM_20P, 0);
if (ret < 0)
dev_warn(&info->pdev->dev, "register(%x) write error(%d)\n",
if (ret < 0) {
dev_err(&info->pdev->dev, "register(%x) write error(%d)\n",
AXP20X_CHRG_CTRL1, ret);
return ret;
}
/* Disable OCV-SOC curve calibration */
ret = regmap_update_bits(info->regmap,
AXP20X_CC_CTRL,
FG_CNTL_OCV_ADJ_EN, 0);
if (ret < 0)
dev_warn(&info->pdev->dev, "register(%x) write error(%d)\n",
if (ret < 0) {
dev_err(&info->pdev->dev, "register(%x) write error(%d)\n",
AXP20X_CC_CTRL, ret);
/* Init charging current and voltage */
info->max_cc = info->pdata->max_cc;
info->max_cv = info->pdata->max_cv;
return ret;
}
/* Read current charge voltage and current limit */
ret = regmap_read(info->regmap, AXP20X_CHRG_CTRL1, &val);
if (ret < 0) {
/* Assume default if cannot read */
info->cc = info->pdata->def_cc;
info->cv = info->pdata->def_cv;
} else {
/* Determine charge voltage */
cv = (val & CHRG_CCCV_CV_MASK) >> CHRG_CCCV_CV_BIT_POS;
switch (cv) {
case CHRG_CCCV_CV_4100MV:
info->cv = CV_4100MV;
break;
case CHRG_CCCV_CV_4150MV:
info->cv = CV_4150MV;
break;
case CHRG_CCCV_CV_4200MV:
info->cv = CV_4200MV;
break;
case CHRG_CCCV_CV_4350MV:
info->cv = CV_4350MV;
break;
default:
info->cv = INT_MAX;
break;
}
dev_err(&info->pdev->dev, "register(%x) read error(%d)\n",
AXP20X_CHRG_CTRL1, ret);
return ret;
}
/* Determine charge current limit */
cc = (ret & CHRG_CCCV_CC_MASK) >> CHRG_CCCV_CC_BIT_POS;
cc = (cc * CHRG_CCCV_CC_LSB_RES) + CHRG_CCCV_CC_OFFSET;
info->cc = cc;
/* Determine charge voltage */
cv = (val & CHRG_CCCV_CV_MASK) >> CHRG_CCCV_CV_BIT_POS;
switch (cv) {
case CHRG_CCCV_CV_4100MV:
info->cv = CV_4100MV;
break;
case CHRG_CCCV_CV_4150MV:
info->cv = CV_4150MV;
break;
case CHRG_CCCV_CV_4200MV:
info->cv = CV_4200MV;
break;
case CHRG_CCCV_CV_4350MV:
info->cv = CV_4350MV;
break;
}
/* Program default charging voltage and current */
cc = min(info->pdata->def_cc, info->max_cc);
cv = min(info->pdata->def_cv, info->max_cv);
/* Determine charge current limit */
cc = (ret & CHRG_CCCV_CC_MASK) >> CHRG_CCCV_CC_BIT_POS;
cc = (cc * CHRG_CCCV_CC_LSB_RES) + CHRG_CCCV_CC_OFFSET;
info->cc = cc;
ret = axp288_charger_set_cc(info, cc);
if (ret < 0)
dev_warn(&info->pdev->dev,
"error(%d) in setting CC\n", ret);
/*
* Do not allow the user to configure higher settings then those
* set by the firmware
*/
info->max_cv = info->cv;
info->max_cc = info->cc;
ret = axp288_charger_set_cv(info, cv);
if (ret < 0)
dev_warn(&info->pdev->dev,
"error(%d) in setting CV\n", ret);
}
return 0;
}
static int axp288_charger_probe(struct platform_device *pdev)
......@@ -821,15 +822,6 @@ static int axp288_charger_probe(struct platform_device *pdev)
info->pdev = pdev;
info->regmap = axp20x->regmap;
info->regmap_irqc = axp20x->regmap_irqc;
info->pdata = pdev->dev.platform_data;
if (!info->pdata) {
/* Try ACPI provided pdata via device properties */
if (!device_property_present(&pdev->dev,
"axp288_charger_data\n"))
dev_err(&pdev->dev, "failed to get platform data\n");
return -ENODEV;
}
info->cable.edev = extcon_get_extcon_dev(AXP288_EXTCON_DEV_NAME);
if (info->cable.edev == NULL) {
......@@ -910,7 +902,9 @@ static int axp288_charger_probe(struct platform_device *pdev)
}
}
charger_init_hw_regs(info);
ret = charger_init_hw_regs(info);
if (ret)
goto intr_reg_failed;
return 0;
......
This diff is collapsed.
......@@ -532,35 +532,6 @@ struct axp20x_dev {
const struct regmap_irq_chip *regmap_irq_chip;
};
#define BATTID_LEN 64
#define OCV_CURVE_SIZE 32
#define MAX_THERM_CURVE_SIZE 25
#define PD_DEF_MIN_TEMP 0
#define PD_DEF_MAX_TEMP 55
struct axp20x_fg_pdata {
char battid[BATTID_LEN + 1];
int design_cap;
int min_volt;
int max_volt;
int max_temp;
int min_temp;
int cap1;
int cap0;
int rdc1;
int rdc0;
int ocv_curve[OCV_CURVE_SIZE];
int tcsz;
int thermistor_curve[MAX_THERM_CURVE_SIZE][2];
};
struct axp20x_chrg_pdata {
int max_cc;
int max_cv;
int def_cc;
int def_cv;
};
struct axp288_extcon_pdata {
/* GPIO pin control to switch D+/D- lines b/w PMIC and SOC */
struct gpio_desc *gpio_mux_cntl;
......
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