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Commit 8c7524e6 authored by H Hartley Sweeten's avatar H Hartley Sweeten Committed by Greg Kroah-Hartman
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staging: comedi: adl_pci9111: cleanup the io register map 

Finish renaming the defines for the register map. Move the bit
defines so that they are associated with the register. Remove
the unneeded '0' bit defines.
Signed-off-by: default avatarH Hartley Sweeten <hsweeten@visionengravers.com>
Cc: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 6b228d8a
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Showing with 57 additions and 68 deletions
drivers/staging/comedi/drivers/adl_pci9111.c
View file @ 8c7524e6
...@@ -89,45 +89,35 @@ a multiple of chanlist_len*convert_arg. ...@@ -89,45 +89,35 @@ a multiple of chanlist_len*convert_arg.
#define PCI9111_8254_CLOCK_PERIOD_NS 500 #define PCI9111_8254_CLOCK_PERIOD_NS 500
/* IO address map */ /*
* IO address map and bit defines
#define PCI9111_AI_FIFO_REG 0x00 */
#define PCI9111_AO_REG 0x00 #define PCI9111_AI_FIFO_REG 0x00
#define PCI9111_DIO_REG 0x02 #define PCI9111_AO_REG 0x00
#define PCI9111_REGISTER_EXTENDED_IO_PORTS 0x04 #define PCI9111_DIO_REG 0x02
#define PCI9111_AI_CHANNEL_REG 0x06 #define PCI9111_EDIO_REG 0x04
#define PCI9111_REGISTER_AD_CHANNEL_READBACK 0x06 #define PCI9111_AI_CHANNEL_REG 0x06
#define PCI9111_AI_RANGE_REG 0x08 #define PCI9111_AI_RANGE_STAT_REG 0x08
#define PCI9111_RANGE_STATUS_REG 0x08 #define PCI9111_AI_STAT_AD_BUSY (1 << 7)
#define PCI9111_AI_MODE_CTRL_REG 0x0A #define PCI9111_AI_STAT_FF_FF (1 << 6)
#define PCI9111_AI_MODE_INT_RB_REG 0x0A #define PCI9111_AI_STAT_FF_HF (1 << 5)
#define PCI9111_SOFTWARE_TRIGGER_REG 0x0E #define PCI9111_AI_STAT_FF_EF (1 << 4)
#define PCI9111_INT_CTRL_REG 0x0C #define PCI9111_AI_RANGE_MASK (7 << 0)
#define PCI9111_8254_BASE_REG 0x40 #define PCI9111_AI_TRIG_CTRL_REG 0x0a
#define PCI9111_INT_CLR_REG 0x48 #define PCI9111_AI_TRIG_CTRL_TRGEVENT (1 << 5)
#define PCI9111_AI_TRIG_CTRL_POTRG (1 << 4)
#define PCI9111_TRIGGER_MASK 0x0F #define PCI9111_AI_TRIG_CTRL_PTRG (1 << 3)
#define PCI9111_PTRG_OFF (0 << 3) #define PCI9111_AI_TRIG_CTRL_ETIS (1 << 2)
#define PCI9111_PTRG_ON (1 << 3) #define PCI9111_AI_TRIG_CTRL_TPST (1 << 1)
#define PCI9111_EITS_EXTERNAL (1 << 2) #define PCI9111_AI_TRIG_CTRL_ASCAN (1 << 0)
#define PCI9111_EITS_INTERNAL (0 << 2) #define PCI9111_INT_CTRL_REG 0x0c
#define PCI9111_TPST_SOFTWARE_TRIGGER (0 << 1) #define PCI9111_INT_CTRL_ISC2 (1 << 3)
#define PCI9111_TPST_TIMER_PACER (1 << 1) #define PCI9111_INT_CTRL_FFEN (1 << 2)
#define PCI9111_ASCAN_ON (1 << 0) #define PCI9111_INT_CTRL_ISC1 (1 << 1)
#define PCI9111_ASCAN_OFF (0 << 0) #define PCI9111_INT_CTRL_ISC0 (1 << 0)
#define PCI9111_SOFT_TRIG_REG 0x0e
#define PCI9111_ISC0_SET_IRQ_ON_ENDING_OF_AD_CONVERSION (0 << 0) #define PCI9111_8254_BASE_REG 0x40
#define PCI9111_ISC0_SET_IRQ_ON_FIFO_HALF_FULL (1 << 0) #define PCI9111_INT_CLR_REG 0x48
#define PCI9111_ISC1_SET_IRQ_ON_TIMER_TICK (0 << 1)
#define PCI9111_ISC1_SET_IRQ_ON_EXT_TRG (1 << 1)
#define PCI9111_FFEN_SET_FIFO_ENABLE (0 << 2)
#define PCI9111_FFEN_SET_FIFO_DISABLE (1 << 2)
#define PCI9111_RANGE_MASK 0x07
#define PCI9111_FIFO_EMPTY_MASK 0x10
#define PCI9111_FIFO_HALF_FULL_MASK 0x20
#define PCI9111_FIFO_FULL_MASK 0x40
#define PCI9111_AD_BUSY_MASK 0x80
static const struct comedi_lrange pci9111_hr_ai_range = { static const struct comedi_lrange pci9111_hr_ai_range = {
5, 5,
...@@ -237,25 +227,24 @@ static void pci9111_trigger_source_set(struct comedi_device *dev, ...@@ -237,25 +227,24 @@ static void pci9111_trigger_source_set(struct comedi_device *dev,
int flags; int flags;
/* Read the current trigger mode control bits */ /* Read the current trigger mode control bits */
flags = inb(dev->iobase + PCI9111_AI_MODE_INT_RB_REG); flags = inb(dev->iobase + PCI9111_AI_TRIG_CTRL_REG);
/* Mask off the EITS and TPST bits */ /* Mask off the EITS and TPST bits */
flags &= 0x9; flags &= 0x9;
switch (source) { switch (source) {
case software: case software:
flags |= PCI9111_EITS_INTERNAL | PCI9111_TPST_SOFTWARE_TRIGGER;
break; break;
case timer_pacer: case timer_pacer:
flags |= PCI9111_EITS_INTERNAL | PCI9111_TPST_TIMER_PACER; flags |= PCI9111_AI_TRIG_CTRL_TPST;
break; break;
case external: case external:
flags |= PCI9111_EITS_EXTERNAL; flags |= PCI9111_AI_TRIG_CTRL_ETIS;
break; break;
} }
outb(flags, dev->iobase + PCI9111_AI_MODE_CTRL_REG); outb(flags, dev->iobase + PCI9111_AI_TRIG_CTRL_REG);
} }
static void pci9111_pretrigger_set(struct comedi_device *dev, bool pretrigger) static void pci9111_pretrigger_set(struct comedi_device *dev, bool pretrigger)
...@@ -263,14 +252,14 @@ static void pci9111_pretrigger_set(struct comedi_device *dev, bool pretrigger) ...@@ -263,14 +252,14 @@ static void pci9111_pretrigger_set(struct comedi_device *dev, bool pretrigger)
int flags; int flags;
/* Read the current trigger mode control bits */ /* Read the current trigger mode control bits */
flags = inb(dev->iobase + PCI9111_AI_MODE_INT_RB_REG); flags = inb(dev->iobase + PCI9111_AI_TRIG_CTRL_REG);
/* Mask off the PTRG bit */ /* Mask off the PTRG bit */
flags &= 0x7; flags &= 0x7;
if (pretrigger) if (pretrigger)
flags |= PCI9111_PTRG_ON; flags |= PCI9111_AI_TRIG_CTRL_PTRG;
outb(flags, dev->iobase + PCI9111_AI_MODE_CTRL_REG); outb(flags, dev->iobase + PCI9111_AI_TRIG_CTRL_REG);
} }
static void pci9111_autoscan_set(struct comedi_device *dev, bool autoscan) static void pci9111_autoscan_set(struct comedi_device *dev, bool autoscan)
...@@ -278,14 +267,14 @@ static void pci9111_autoscan_set(struct comedi_device *dev, bool autoscan) ...@@ -278,14 +267,14 @@ static void pci9111_autoscan_set(struct comedi_device *dev, bool autoscan)
int flags; int flags;
/* Read the current trigger mode control bits */ /* Read the current trigger mode control bits */
flags = inb(dev->iobase + PCI9111_AI_MODE_INT_RB_REG); flags = inb(dev->iobase + PCI9111_AI_TRIG_CTRL_REG);
/* Mask off the ASCAN bit */ /* Mask off the ASCAN bit */
flags &= 0xe; flags &= 0xe;
if (autoscan) if (autoscan)
flags |= PCI9111_ASCAN_ON; flags |= PCI9111_AI_TRIG_CTRL_ASCAN;
outb(flags, dev->iobase + PCI9111_AI_MODE_CTRL_REG); outb(flags, dev->iobase + PCI9111_AI_TRIG_CTRL_REG);
} }
enum pci9111_ISC0_sources { enum pci9111_ISC0_sources {
...@@ -305,7 +294,7 @@ static void pci9111_interrupt_source_set(struct comedi_device *dev, ...@@ -305,7 +294,7 @@ static void pci9111_interrupt_source_set(struct comedi_device *dev,
int flags; int flags;
/* Read the current interrupt control bits */ /* Read the current interrupt control bits */
flags = inb(dev->iobase + PCI9111_AI_MODE_INT_RB_REG); flags = inb(dev->iobase + PCI9111_AI_TRIG_CTRL_REG);
/* Shift the bits so they are compatible with the write register */ /* Shift the bits so they are compatible with the write register */
flags >>= 4; flags >>= 4;
/* Mask off the ISCx bits */ /* Mask off the ISCx bits */
...@@ -313,10 +302,10 @@ static void pci9111_interrupt_source_set(struct comedi_device *dev, ...@@ -313,10 +302,10 @@ static void pci9111_interrupt_source_set(struct comedi_device *dev,
/* Now set the new ISCx bits */ /* Now set the new ISCx bits */
if (irq_0_source == irq_on_fifo_half_full) if (irq_0_source == irq_on_fifo_half_full)
flags |= PCI9111_ISC0_SET_IRQ_ON_FIFO_HALF_FULL; flags |= PCI9111_INT_CTRL_ISC0;
if (irq_1_source == irq_on_external_trigger) if (irq_1_source == irq_on_external_trigger)
flags |= PCI9111_ISC1_SET_IRQ_ON_EXT_TRG; flags |= PCI9111_INT_CTRL_ISC1;
outb(flags, dev->iobase + PCI9111_INT_CTRL_REG); outb(flags, dev->iobase + PCI9111_INT_CTRL_REG);
} }
...@@ -326,9 +315,9 @@ static void pci9111_fifo_reset(struct comedi_device *dev) ...@@ -326,9 +315,9 @@ static void pci9111_fifo_reset(struct comedi_device *dev)
unsigned long int_ctrl_reg = dev->iobase + PCI9111_INT_CTRL_REG; unsigned long int_ctrl_reg = dev->iobase + PCI9111_INT_CTRL_REG;
/* To reset the FIFO, set FFEN sequence as 0 -> 1 -> 0 */ /* To reset the FIFO, set FFEN sequence as 0 -> 1 -> 0 */
outb(PCI9111_FFEN_SET_FIFO_ENABLE, int_ctrl_reg); outb(0, int_ctrl_reg);
outb(PCI9111_FFEN_SET_FIFO_DISABLE, int_ctrl_reg); outb(PCI9111_INT_CTRL_FFEN, int_ctrl_reg);
outb(PCI9111_FFEN_SET_FIFO_ENABLE, int_ctrl_reg); outb(0, int_ctrl_reg);
} }
/* ------------------------------------------------------------------ */ /* ------------------------------------------------------------------ */
...@@ -576,8 +565,8 @@ static int pci9111_ai_do_cmd(struct comedi_device *dev, ...@@ -576,8 +565,8 @@ static int pci9111_ai_do_cmd(struct comedi_device *dev,
/* Set gain */ /* Set gain */
/* This is the same gain on every channel */ /* This is the same gain on every channel */
outb(CR_RANGE(async_cmd->chanlist[0]) & PCI9111_RANGE_MASK, outb(CR_RANGE(async_cmd->chanlist[0]) & PCI9111_AI_RANGE_MASK,
dev->iobase + PCI9111_AI_RANGE_REG); dev->iobase + PCI9111_AI_RANGE_STAT_REG);
/* Set counter */ /* Set counter */
...@@ -711,10 +700,10 @@ static irqreturn_t pci9111_interrupt(int irq, void *p_device) ...@@ -711,10 +700,10 @@ static irqreturn_t pci9111_interrupt(int irq, void *p_device)
(PLX9050_LINTI1_ENABLE | PLX9050_LINTI1_STATUS)) { (PLX9050_LINTI1_ENABLE | PLX9050_LINTI1_STATUS)) {
/* Interrupt comes from fifo_half-full signal */ /* Interrupt comes from fifo_half-full signal */
status = inb(dev->iobase + PCI9111_RANGE_STATUS_REG); status = inb(dev->iobase + PCI9111_AI_RANGE_STAT_REG);
/* '0' means FIFO is full, data may have been lost */ /* '0' means FIFO is full, data may have been lost */
if (!(status & PCI9111_FIFO_FULL_MASK)) { if (!(status & PCI9111_AI_STAT_FF_FF)) {
spin_unlock_irqrestore(&dev->spinlock, irq_flags); spin_unlock_irqrestore(&dev->spinlock, irq_flags);
comedi_error(dev, PCI9111_DRIVER_NAME " fifo overflow"); comedi_error(dev, PCI9111_DRIVER_NAME " fifo overflow");
outb(0, dev->iobase + PCI9111_INT_CLR_REG); outb(0, dev->iobase + PCI9111_INT_CLR_REG);
...@@ -726,7 +715,7 @@ static irqreturn_t pci9111_interrupt(int irq, void *p_device) ...@@ -726,7 +715,7 @@ static irqreturn_t pci9111_interrupt(int irq, void *p_device)
} }
/* '0' means FIFO is half-full */ /* '0' means FIFO is half-full */
if (!(status & PCI9111_FIFO_HALF_FULL_MASK)) { if (!(status & PCI9111_AI_STAT_FF_HF)) {
unsigned int num_samples; unsigned int num_samples;
unsigned int bytes_written = 0; unsigned int bytes_written = 0;
...@@ -833,24 +822,24 @@ static int pci9111_ai_insn_read(struct comedi_device *dev, ...@@ -833,24 +822,24 @@ static int pci9111_ai_insn_read(struct comedi_device *dev,
outb(chan, dev->iobase + PCI9111_AI_CHANNEL_REG); outb(chan, dev->iobase + PCI9111_AI_CHANNEL_REG);
status = inb(dev->iobase + PCI9111_RANGE_STATUS_REG); status = inb(dev->iobase + PCI9111_AI_RANGE_STAT_REG);
if ((status & PCI9111_RANGE_MASK) != range) { if ((status & PCI9111_AI_RANGE_MASK) != range) {
outb(range & PCI9111_RANGE_MASK, outb(range & PCI9111_AI_RANGE_MASK,
dev->iobase + PCI9111_AI_RANGE_REG); dev->iobase + PCI9111_AI_RANGE_STAT_REG);
} }
pci9111_fifo_reset(dev); pci9111_fifo_reset(dev);
for (i = 0; i < insn->n; i++) { for (i = 0; i < insn->n; i++) {
/* Generate a software trigger */ /* Generate a software trigger */
outb(0, dev->iobase + PCI9111_SOFTWARE_TRIGGER_REG); outb(0, dev->iobase + PCI9111_SOFT_TRIG_REG);
timeout = PCI9111_AI_INSTANT_READ_TIMEOUT; timeout = PCI9111_AI_INSTANT_READ_TIMEOUT;
while (timeout--) { while (timeout--) {
status = inb(dev->iobase + PCI9111_RANGE_STATUS_REG); status = inb(dev->iobase + PCI9111_AI_RANGE_STAT_REG);
/* '1' means FIFO is not empty */ /* '1' means FIFO is not empty */
if (status & PCI9111_FIFO_EMPTY_MASK) if (status & PCI9111_AI_STAT_FF_EF)
goto conversion_done; goto conversion_done;
} }
......
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