Commit 8cbb59af authored by Xing Zheng's avatar Xing Zheng Committed by Heiko Stuebner

arm64: dts: rockchip: add rockchip,grf property for RK3399 PMUCRU/CRU

The structure rockchip_clk_provider needs to refer the GRF regmap
in somewhere, if the CRU node has not "rockchip,grf" property,
calling syscon_regmap_lookup_by_phandle will return an invalid GRF
regmap, and the MUXGRF type clock will be not supported.

Therefore, we need to add them.
Signed-off-by: default avatarXing Zheng <zhengxing@rock-chips.com>
Reviewed-by: default avatarDouglas Anderson <dianders@chromium.org>
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent 59cf70be
...@@ -1091,6 +1091,7 @@ wafer_info: wafer-info@1c { ...@@ -1091,6 +1091,7 @@ wafer_info: wafer-info@1c {
pmucru: pmu-clock-controller@ff750000 { pmucru: pmu-clock-controller@ff750000 {
compatible = "rockchip,rk3399-pmucru"; compatible = "rockchip,rk3399-pmucru";
reg = <0x0 0xff750000 0x0 0x1000>; reg = <0x0 0xff750000 0x0 0x1000>;
rockchip,grf = <&pmugrf>;
#clock-cells = <1>; #clock-cells = <1>;
#reset-cells = <1>; #reset-cells = <1>;
assigned-clocks = <&pmucru PLL_PPLL>; assigned-clocks = <&pmucru PLL_PPLL>;
...@@ -1100,6 +1101,7 @@ pmucru: pmu-clock-controller@ff750000 { ...@@ -1100,6 +1101,7 @@ pmucru: pmu-clock-controller@ff750000 {
cru: clock-controller@ff760000 { cru: clock-controller@ff760000 {
compatible = "rockchip,rk3399-cru"; compatible = "rockchip,rk3399-cru";
reg = <0x0 0xff760000 0x0 0x1000>; reg = <0x0 0xff760000 0x0 0x1000>;
rockchip,grf = <&grf>;
#clock-cells = <1>; #clock-cells = <1>;
#reset-cells = <1>; #reset-cells = <1>;
assigned-clocks = assigned-clocks =
......
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