Commit 8d51bcbb authored by Jaroslav Kysela's avatar Jaroslav Kysela

[ALSA] Aureon S/PDIF input fixes

ICE1712 driver
GPIO directions changed
   * GPIO>22 not configured as they do not exist
   * GPIO22 set to output (CS8415A CS pin)
   * GPIO21 set to input. (SPI MISO pin)

Init sequence of CS8415A changed:
  * SWCLK is set to 1 (OMCK output to RMCK pin)
  * MUX2:0 is set to 001 (S/PDIF input on RXP1)
  * SODEL is set to 1 (MSB of SDOUT data occurs if the second OSCLK period after the OLRCK edge)
  * SOLRPOL is set to 1 (SDOUT data is for the right channel with OLRCK is high)
Signed-off-by: default avatarPeter Christensen <peter@christensen>
Signed-off-by: default avatarTakashi Iwai <tiwai@suse.de>
parent 3b9aed12
......@@ -798,9 +798,9 @@ static int __devinit aureon_init(ice1712_t *ice)
};
static unsigned short cs_inits[] = {
0x0441, /* RUN */
0x0100, /* no mute */
0x0180, /* no mute, OMCK output on RMCK pin */
0x0201, /* S/PDIF source on RXP1 */
0x0600, /* slave, 24bit */
0x0605, /* slave, 24bit, MSB on second OSCLK, SDOUT for right channel when OLRCK is high */
(unsigned short)-1
};
unsigned int tmp;
......
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