Commit 8d8f47da authored by Ben Dooks's avatar Ben Dooks Committed by Russell King

[ARM PATCH] 2403/1: S3C2410 - clock initialsation tidy

Patch from Ben Dooks

Update to the s3c2410/s3c2440 clock code to use
the naming conventions now used throughout the
arch/arm/mach-s3c2410/ directory, as well as
a re-organisation of the initialisation of the
clocks.
The previous method was to initialise the clocks
as part of the function that initialised the
statically mapped IO regions, which was called
from the machine initialisation. This proves
a problem if the machine initialisation needs
to use these IO areas to determine the frequency
of PLL crystal fitted.
This patch makes the following changes:
 - s3c2410_init_clocks renamed s3c24xx_setup_clocks
 - s3c2410_clkcon_enable renamed s3c24xx_clk_enable
 - s3c2410_register_clock renamed s3c24xx_register_clock
 - cpu specific init_clocks to be called from cpu.c
 - add s3c24xx_init_clocks for machine init to call
 - split the cpu specific clock code from xxx_map_io
 - update all machine initialisation methods
and the following changes as cleanup which should
have been caught by previous patches:
 - remove s3c2440_hdiv (unused)
 - remove s3c2440_clock_tick_rate (unused)
This patch has been generated from a request by
Dimitry Andric.

Signed-off-by: Ben Dooks
Signed-off-by: Russell King
parent 192f1e0f
......@@ -60,7 +60,7 @@ static DECLARE_MUTEX(clocks_sem);
/* old functions */
void inline s3c2410_clk_enable(unsigned int clocks, unsigned int enable)
void inline s3c24xx_clk_enable(unsigned int clocks, unsigned int enable)
{
unsigned long clkcon;
unsigned long flags;
......@@ -88,9 +88,9 @@ static int clk_null_enable(struct clk *clk, int enable)
return 0;
}
int s3c2410_clkcon_enable(struct clk *clk, int enable)
int s3c24xx_clkcon_enable(struct clk *clk, int enable)
{
s3c2410_clk_enable(clk->ctrlbit, enable);
s3c24xx_clk_enable(clk->ctrlbit, enable);
return 0;
}
......@@ -264,90 +264,90 @@ static struct clk init_clocks[] = {
{ .name = "nand",
.id = -1,
.parent = &clk_h,
.enable = s3c2410_clkcon_enable,
.enable = s3c24xx_clkcon_enable,
.ctrlbit = S3C2410_CLKCON_NAND
},
{ .name = "lcd",
.id = -1,
.parent = &clk_h,
.enable = s3c2410_clkcon_enable,
.enable = s3c24xx_clkcon_enable,
.ctrlbit = S3C2410_CLKCON_LCDC
},
{ .name = "usb-host",
.id = -1,
.parent = &clk_h,
.enable = s3c2410_clkcon_enable,
.enable = s3c24xx_clkcon_enable,
.ctrlbit = S3C2410_CLKCON_USBH
},
{ .name = "usb-device",
.id = -1,
.parent = &clk_h,
.enable = s3c2410_clkcon_enable,
.enable = s3c24xx_clkcon_enable,
.ctrlbit = S3C2410_CLKCON_USBD
},
{ .name = "timers",
.parent = &clk_p,
.enable = s3c2410_clkcon_enable,
.enable = s3c24xx_clkcon_enable,
.ctrlbit = S3C2410_CLKCON_PWMT
},
{ .name = "sdi",
.id = -1,
.parent = &clk_p,
.enable = s3c2410_clkcon_enable,
.enable = s3c24xx_clkcon_enable,
.ctrlbit = S3C2410_CLKCON_SDI
},
{ .name = "uart",
.id = 0,
.parent = &clk_p,
.enable = s3c2410_clkcon_enable,
.enable = s3c24xx_clkcon_enable,
.ctrlbit = S3C2410_CLKCON_UART0
},
{ .name = "uart",
.id = 1,
.parent = &clk_p,
.enable = s3c2410_clkcon_enable,
.enable = s3c24xx_clkcon_enable,
.ctrlbit = S3C2410_CLKCON_UART1
},
{ .name = "uart",
.id = 2,
.parent = &clk_p,
.enable = s3c2410_clkcon_enable,
.enable = s3c24xx_clkcon_enable,
.ctrlbit = S3C2410_CLKCON_UART2
},
{ .name = "gpio",
.id = -1,
.parent = &clk_p,
.enable = s3c2410_clkcon_enable,
.enable = s3c24xx_clkcon_enable,
.ctrlbit = S3C2410_CLKCON_GPIO
},
{ .name = "rtc",
.id = -1,
.parent = &clk_p,
.enable = s3c2410_clkcon_enable,
.enable = s3c24xx_clkcon_enable,
.ctrlbit = S3C2410_CLKCON_RTC
},
{ .name = "adc",
.id = -1,
.parent = &clk_p,
.enable = s3c2410_clkcon_enable,
.enable = s3c24xx_clkcon_enable,
.ctrlbit = S3C2410_CLKCON_ADC
},
{ .name = "i2c",
.id = -1,
.parent = &clk_p,
.enable = s3c2410_clkcon_enable,
.enable = s3c24xx_clkcon_enable,
.ctrlbit = S3C2410_CLKCON_IIC
},
{ .name = "iis",
.id = -1,
.parent = &clk_p,
.enable = s3c2410_clkcon_enable,
.enable = s3c24xx_clkcon_enable,
.ctrlbit = S3C2410_CLKCON_IIS
},
{ .name = "spi",
.id = -1,
.parent = &clk_p,
.enable = s3c2410_clkcon_enable,
.enable = s3c24xx_clkcon_enable,
.ctrlbit = S3C2410_CLKCON_SPI
},
{ .name = "watchdog",
......@@ -359,7 +359,7 @@ static struct clk init_clocks[] = {
/* initialise the clock system */
int s3c2410_register_clock(struct clk *clk)
int s3c24xx_register_clock(struct clk *clk)
{
clk->owner = THIS_MODULE;
atomic_set(&clk->used, 0);
......@@ -378,7 +378,7 @@ int s3c2410_register_clock(struct clk *clk)
/* initalise all the clocks */
int __init s3c2410_init_clocks(void)
int __init s3c24xx_setup_clocks(void)
{
struct clk *clkp = init_clocks;
int ptr;
......@@ -403,28 +403,28 @@ int __init s3c2410_init_clocks(void)
* and of course, this looks neater
*/
s3c2410_clk_enable(S3C2410_CLKCON_NAND, 0);
s3c2410_clk_enable(S3C2410_CLKCON_USBH, 0);
s3c2410_clk_enable(S3C2410_CLKCON_USBD, 0);
s3c2410_clk_enable(S3C2410_CLKCON_ADC, 0);
s3c2410_clk_enable(S3C2410_CLKCON_IIC, 0);
s3c2410_clk_enable(S3C2410_CLKCON_SPI, 0);
s3c24xx_clk_enable(S3C2410_CLKCON_NAND, 0);
s3c24xx_clk_enable(S3C2410_CLKCON_USBH, 0);
s3c24xx_clk_enable(S3C2410_CLKCON_USBD, 0);
s3c24xx_clk_enable(S3C2410_CLKCON_ADC, 0);
s3c24xx_clk_enable(S3C2410_CLKCON_IIC, 0);
s3c24xx_clk_enable(S3C2410_CLKCON_SPI, 0);
/* assume uart clocks are correctly setup */
/* register our clocks */
if (s3c2410_register_clock(&clk_f) < 0)
if (s3c24xx_register_clock(&clk_f) < 0)
printk(KERN_ERR "failed to register cpu fclk\n");
if (s3c2410_register_clock(&clk_h) < 0)
if (s3c24xx_register_clock(&clk_h) < 0)
printk(KERN_ERR "failed to register cpu hclk\n");
if (s3c2410_register_clock(&clk_p) < 0)
if (s3c24xx_register_clock(&clk_p) < 0)
printk(KERN_ERR "failed to register cpu pclk\n");
for (ptr = 0; ptr < ARRAY_SIZE(init_clocks); ptr++, clkp++) {
ret = s3c2410_register_clock(clkp);
ret = s3c24xx_register_clock(clkp);
if (ret < 0) {
printk(KERN_ERR "Failed to register clock %s (%d)\n",
clkp->name, ret);
......
......@@ -41,7 +41,7 @@ extern unsigned long s3c24xx_fclk;
* Please DO NOT use these outside of arch/arm/mach-s3c2410
*/
extern int s3c2410_clkcon_enable(struct clk *clk, int enable);
extern int s3c2410_register_clock(struct clk *clk);
extern int s3c2410_init_clocks(void);
extern int s3c24xx_clkcon_enable(struct clk *clk, int enable);
extern int s3c24xx_register_clock(struct clk *clk);
extern int s3c24xx_setup_clocks(void);
......@@ -47,6 +47,7 @@ struct cpu_table {
unsigned long idmask;
void (*map_io)(struct map_desc *mach_desc, int size);
void (*init_uarts)(struct s3c2410_uartcfg *cfg, int no);
void (*init_clocks)(int xtal);
int (*init)(void);
const char *name;
};
......@@ -63,6 +64,7 @@ static struct cpu_table cpu_ids[] __initdata = {
.idcode = 0x32410000,
.idmask = 0xffffffff,
.map_io = s3c2410_map_io,
.init_clocks = s3c2410_init_clocks,
.init_uarts = s3c2410_init_uarts,
.init = s3c2410_init,
.name = name_s3c2410
......@@ -71,6 +73,7 @@ static struct cpu_table cpu_ids[] __initdata = {
.idcode = 0x32410002,
.idmask = 0xffffffff,
.map_io = s3c2410_map_io,
.init_clocks = s3c2410_init_clocks,
.init_uarts = s3c2410_init_uarts,
.init = s3c2410_init,
.name = name_s3c2410a
......@@ -79,6 +82,7 @@ static struct cpu_table cpu_ids[] __initdata = {
.idcode = 0x32440000,
.idmask = 0xffffffff,
.map_io = s3c2440_map_io,
.init_clocks = s3c2440_init_clocks,
.init_uarts = s3c2440_init_uarts,
.init = s3c2440_init,
.name = name_s3c2440
......@@ -87,6 +91,7 @@ static struct cpu_table cpu_ids[] __initdata = {
.idcode = 0x32440001,
.idmask = 0xffffffff,
.map_io = s3c2440_map_io,
.init_clocks = s3c2440_init_clocks,
.init_uarts = s3c2440_init_uarts,
.init = s3c2440_init,
.name = name_s3c2440a
......@@ -132,7 +137,7 @@ void s3c24xx_set_board(struct s3c24xx_board *b)
struct clk **ptr = b->clocks;;
for (i = b->clocks_count; i > 0; i--, ptr++)
s3c2410_register_clock(*ptr);
s3c24xx_register_clock(*ptr);
}
}
......@@ -165,6 +170,29 @@ void __init s3c24xx_init_io(struct map_desc *mach_desc, int size)
(cpu->map_io)(mach_desc, size);
}
/* s3c24xx_init_clocks
*
* Initialise the clock subsystem and associated information from the
* given master crystal value.
*
* xtal = 0 -> use default PLL crystal value (normally 12MHz)
* != 0 -> PLL crystal value in Hz
*/
void __init s3c24xx_init_clocks(int xtal)
{
if (xtal != 0)
s3c24xx_xtal = xtal;
if (cpu == NULL)
panic("s3c24xx_init_clocks: no cpu setup?\n");
if (cpu->init_clocks == NULL)
panic("s3c24xx_init_clocks: cpu has no clock init\n");
else
(cpu->init_clocks)(xtal);
}
void __init s3c24xx_init_uarts(struct s3c2410_uartcfg *cfg, int no)
{
if (cpu == NULL)
......@@ -175,6 +203,7 @@ void __init s3c24xx_init_uarts(struct s3c2410_uartcfg *cfg, int no)
} else
(cpu->init_uarts)(cfg, no);
}
static int __init s3c_arch_init(void)
{
int ret;
......
......@@ -14,6 +14,7 @@
* 18-Oct-2004 BJD Moved board struct into this file
* 04-Jan-2005 BJD New uart initialisation
* 10-Jan-2005 BJD Moved generic init here, specific to cpu headers
* 14-Jan-2005 BJD Added s3c24xx_init_clocks() call
*/
#define IODESC_ENT(x) { S3C2410_VA_##x, S3C2410_PA_##x, S3C2410_SZ_##x, MT_DEVICE }
......@@ -35,6 +36,8 @@ extern void s3c24xx_init_io(struct map_desc *mach_desc, int size);
extern void s3c24xx_init_uarts(struct s3c2410_uartcfg *cfg, int no);
extern void s3c24xx_init_clocks(int xtal);
/* the board structure is used at first initialsation time
* to get info such as the devices to register for this
* board. This is done because platfrom_add_devices() cannot
......
......@@ -263,6 +263,7 @@ void __init bast_map_io(void)
s3c24xx_uclk.parent = &s3c24xx_clkout1;
s3c24xx_init_io(bast_iodesc, ARRAY_SIZE(bast_iodesc));
s3c24xx_init_clocks(0);
s3c24xx_init_uarts(bast_uartcfgs, ARRAY_SIZE(bast_uartcfgs));
s3c24xx_set_board(&bast_board);
usb_simtec_init();
......
......@@ -22,6 +22,7 @@
* 04-Nov-2004 BJD Change for new serial clock
* 04-Jan-2005 BJD Updated uart init call
* 10-Jan-2005 BJD Removed include of s3c2410.h
* 14-Jan-2005 BJD Added clock init
*/
#include <linux/kernel.h>
......@@ -103,6 +104,7 @@ static struct s3c24xx_board h1940_board __initdata = {
void __init h1940_map_io(void)
{
s3c24xx_init_io(h1940_iodesc, ARRAY_SIZE(h1940_iodesc));
s3c24xx_init_clocks(0);
s3c24xx_init_uarts(h1940_uartcfgs, ARRAY_SIZE(h1940_uartcfgs));
s3c24xx_set_board(&h1940_board);
}
......
......@@ -13,6 +13,7 @@
* 16-Sep-2004 BJD Copied from mach-h1940.c
* 25-Oct-2004 BJD Updates for 2.6.10-rc1
* 10-Jan-2005 BJD Removed include of s3c2410.h s3c2440.h
* 14-Jan-2005 BJD Added new clock init
*/
#include <linux/kernel.h>
......@@ -91,9 +92,8 @@ static struct s3c24xx_board rx3715_board __initdata = {
void __init rx3715_map_io(void)
{
s3c24xx_xtal = 16934000;
s3c24xx_init_io(rx3715_iodesc, ARRAY_SIZE(rx3715_iodesc));
s3c24xx_init_clocks(16934000);
s3c24xx_init_uarts(rx3715_uartcfgs, ARRAY_SIZE(rx3715_uartcfgs));
s3c24xx_set_board(&rx3715_board);
}
......
......@@ -97,6 +97,7 @@ static struct s3c24xx_board smdk2410_board __initdata = {
void __init smdk2410_map_io(void)
{
s3c24xx_init_io(smdk2410_iodesc, ARRAY_SIZE(smdk2410_iodesc));
s3c24xx_init_clocks(0);
s3c24xx_init_uarts(smdk2410_uartcfgs, ARRAY_SIZE(smdk2410_uartcfgs));
s3c24xx_set_board(&smdk2410_board);
}
......
......@@ -20,6 +20,7 @@
* 04-Nov-2004 BJD Clock and serial configuration update
* 04-Jan-2005 BJD Updated uart init call
* 10-Jan-2005 BJD Removed include of s3c2410.h
* 14-Jan-2005 BJD Added clock init
*/
#include <linux/kernel.h>
......@@ -205,6 +206,7 @@ void __init vr1000_map_io(void)
s3c24xx_uclk.parent = &s3c24xx_clkout1;
s3c24xx_init_io(vr1000_iodesc, ARRAY_SIZE(vr1000_iodesc));
s3c24xx_init_clocks(0);
s3c24xx_init_uarts(vr1000_uartcfgs, ARRAY_SIZE(vr1000_uartcfgs));
s3c24xx_set_board(&vr1000_board);
usb_simtec_init();
......
......@@ -151,19 +151,19 @@ void __init s3c2410_init_uarts(struct s3c2410_uartcfg *cfg, int no)
*
* register the standard cpu IO areas, and any passed in from the
* machine specific initialisation.
*
* this function also sets the initial clock frequencies from the
* settings passed in
*/
void __init s3c2410_map_io(struct map_desc *mach_desc, int mach_size)
{
unsigned long tmp;
/* register our io-tables */
iotable_init(s3c2410_iodesc, ARRAY_SIZE(s3c2410_iodesc));
iotable_init(mach_desc, mach_size);
}
void __init s3c2410_init_clocks(int xtal)
{
unsigned long tmp;
/* now we've got our machine bits initialised, work out what
* clocks we've got */
......@@ -188,7 +188,7 @@ void __init s3c2410_map_io(struct map_desc *mach_desc, int mach_size)
* console to use them
*/
s3c2410_init_clocks();
s3c24xx_setup_clocks();
}
int __init s3c2410_init(void)
......
......@@ -16,6 +16,7 @@
* 17-Oct-2004 BJD Moved board out to cpu
* 04-Jan-2005 BJD Changed uart init
* 10-Jan-2005 BJD Removed timer to cpu.h, moved 2410 specific bits here
* 14-Jan-2005 BJD Added s3c2410_init_clocks call
*/
#ifdef CONFIG_CPU_S3C2410
......@@ -26,7 +27,10 @@ extern void s3c2410_map_io(struct map_desc *mach_desc, int size);
extern void s3c2410_init_uarts(struct s3c2410_uartcfg *cfg, int no);
extern void s3c2410_init_clocks(int xtal);
#else
#define s3c2410_init_clocks NULL
#define s3c2410_init_uarts NULL
#define s3c2410_map_io NULL
#define s3c2410_init NULL
......
/* linux/arch/arm/mach-s3c2410/s3c2440.c
*
* Copyright (c) 2004 Simtec Electronics
* Copyright (c) 2004-2005 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
* Samsung S3C2440 Mobile CPU support
......@@ -16,6 +16,8 @@
* 09-Nov-2004 BJD Added sysdev for power management
* 04-Nov-2004 BJD New serial registration
* 15-Nov-2004 BJD Rename the i2c device for the s3c2440
* 14-Jan-2005 BJD Moved clock init code into seperate function
* 14-Jan-2005 BJD Removed un-used clock bits
*/
#include <linux/kernel.h>
......@@ -48,10 +50,6 @@
#include "cpu.h"
#include "pm.h"
int s3c2440_clock_tick_rate = 12*1000*1000; /* current timers at 12MHz */
/* clock info */
unsigned long s3c2440_hdiv;
static struct map_desc s3c2440_iodesc[] __initdata = {
IODESC_ENT(USBHOST),
......@@ -155,13 +153,13 @@ void __init s3c2440_init_uarts(struct s3c2410_uartcfg *cfg, int no)
static struct clk s3c2440_clk_cam = {
.name = "camera",
.enable = s3c2410_clkcon_enable,
.enable = s3c24xx_clkcon_enable,
.ctrlbit = S3C2440_CLKCON_CAMERA
};
static struct clk s3c2440_clk_ac97 = {
.name = "ac97",
.enable = s3c2410_clkcon_enable,
.enable = s3c24xx_clkcon_enable,
.ctrlbit = S3C2440_CLKCON_CAMERA
};
......@@ -204,13 +202,20 @@ static struct sys_device s3c2440_sysdev = {
void __init s3c2440_map_io(struct map_desc *mach_desc, int size)
{
unsigned long clkdiv;
unsigned long camdiv;
/* register our io-tables */
iotable_init(s3c2440_iodesc, ARRAY_SIZE(s3c2440_iodesc));
iotable_init(mach_desc, size);
/* rename any peripherals used differing from the s3c2410 */
s3c_device_i2c.name = "s3c2440-i2c";
}
void __init s3c2440_init_clocks(int xtal)
{
unsigned long clkdiv;
unsigned long camdiv;
int s3c2440_hdiv = 1;
/* now we've got our machine bits initialised, work out what
* clocks we've got */
......@@ -254,22 +259,18 @@ void __init s3c2440_map_io(struct map_desc *mach_desc, int size)
* console to use them, and to add new ones after the initialisation
*/
s3c2410_init_clocks();
s3c24xx_setup_clocks();
/* add s3c2440 specific clocks */
s3c2440_clk_cam.parent = clk_get(NULL, "hclk");
s3c2440_clk_ac97.parent = clk_get(NULL, "pclk");
s3c2410_register_clock(&s3c2440_clk_ac97);
s3c2410_register_clock(&s3c2440_clk_cam);
s3c24xx_register_clock(&s3c2440_clk_ac97);
s3c24xx_register_clock(&s3c2440_clk_cam);
clk_disable(&s3c2440_clk_ac97);
clk_disable(&s3c2440_clk_cam);
/* rename any peripherals used differing from the s3c2410 */
s3c_device_i2c.name = "s3c2440-i2c";
}
int __init s3c2440_init(void)
......
......@@ -14,6 +14,7 @@
* 04-Nov-2004 BJD Added s3c2440_init_uarts()
* 04-Jan-2005 BJD Moved uart init to cpu code
* 10-Jan-2005 BJD Moved 2440 specific init here
* 14-Jan-2005 BJD Split the clock initialisation code
*/
#ifdef CONFIG_CPU_S3C2440
......@@ -24,7 +25,10 @@ extern void s3c2440_map_io(struct map_desc *mach_desc, int size);
extern void s3c2440_init_uarts(struct s3c2410_uartcfg *cfg, int no);
extern void s3c2440_init_clocks(int xtal);
#else
#define s3c2440_init_clocks NULL
#define s3c2440_init_uarts NULL
#define s3c2440_map_io NULL
#define s3c2440_init NULL
......
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