iio: adc: lpc18xx_adc: Reorder clk_get_rate() function call

clk_get_rate() is not guaranteed to work if called before
clk_prepare_enable().

Reorder clk_get_rate(), so it's called after clk_prepare_enable() and
after devm_add_action_or_reset() of lpc18xx_clk_disable().

Not that this is not a problem on this particular device, but it is
good to remove a case that might get copied elsewhere.
Suggested-by: Jonathan Cameron <jic23@kernel.org>
Acked-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: André Gustavo Nakagomi Lopez <andregnl@usp.br>
Link: https://lore.kernel.org/r/YXag5l4xBkGQH3tq@Andryuu.brSigned-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

drivers/iio/adc/lpc18xx_adc.c

@@ -157,9 +157,6 @@ static int lpc18xx_adc_probe(struct platform_device *pdev)
 		return dev_err_probe(&pdev->dev, PTR_ERR(adc->clk),
 				     "error getting clock\n");
 
-	rate = clk_get_rate(adc->clk);
-	clkdiv = DIV_ROUND_UP(rate, LPC18XX_ADC_CLK_TARGET);
-
 	adc->vref = devm_regulator_get(&pdev->dev, "vref");
 	if (IS_ERR(adc->vref))
 		return dev_err_probe(&pdev->dev, PTR_ERR(adc->vref),
@@ -192,6 +189,9 @@ static int lpc18xx_adc_probe(struct platform_device *pdev)
 	if (ret)
 		return ret;
 
+	rate = clk_get_rate(adc->clk);
+	clkdiv = DIV_ROUND_UP(rate, LPC18XX_ADC_CLK_TARGET);
+
 	adc->cr_reg = (clkdiv << LPC18XX_ADC_CR_CLKDIV_SHIFT) |
 			LPC18XX_ADC_CR_PDN;
 	writel(adc->cr_reg, adc->base + LPC18XX_ADC_CR);