Commit 8f113b77 authored by Peter Ujfalusi's avatar Peter Ujfalusi Committed by Mark Brown

ASoC: davinci-mcasp: Be consistent with the use of base in davinci_mcasp_set_dai_fmt

Replace mcasp->base use with plain base in the davinci_mcasp_set_dai_fmt()
function since it has been already used by the remaining part of the function.
Signed-off-by: default avatarPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: default avatarMark Brown <broonie@linaro.org>
parent 70091a3e
...@@ -243,17 +243,17 @@ static int davinci_mcasp_set_dai_fmt(struct snd_soc_dai *cpu_dai, ...@@ -243,17 +243,17 @@ static int davinci_mcasp_set_dai_fmt(struct snd_soc_dai *cpu_dai,
switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
case SND_SOC_DAIFMT_DSP_B: case SND_SOC_DAIFMT_DSP_B:
case SND_SOC_DAIFMT_AC97: case SND_SOC_DAIFMT_AC97:
mcasp_clr_bits(mcasp->base + DAVINCI_MCASP_TXFMCTL_REG, FSXDUR); mcasp_clr_bits(base + DAVINCI_MCASP_TXFMCTL_REG, FSXDUR);
mcasp_clr_bits(mcasp->base + DAVINCI_MCASP_RXFMCTL_REG, FSRDUR); mcasp_clr_bits(base + DAVINCI_MCASP_RXFMCTL_REG, FSRDUR);
break; break;
default: default:
/* configure a full-word SYNC pulse (LRCLK) */ /* configure a full-word SYNC pulse (LRCLK) */
mcasp_set_bits(mcasp->base + DAVINCI_MCASP_TXFMCTL_REG, FSXDUR); mcasp_set_bits(base + DAVINCI_MCASP_TXFMCTL_REG, FSXDUR);
mcasp_set_bits(mcasp->base + DAVINCI_MCASP_RXFMCTL_REG, FSRDUR); mcasp_set_bits(base + DAVINCI_MCASP_RXFMCTL_REG, FSRDUR);
/* make 1st data bit occur one ACLK cycle after the frame sync */ /* make 1st data bit occur one ACLK cycle after the frame sync */
mcasp_set_bits(mcasp->base + DAVINCI_MCASP_TXFMT_REG, FSXDLY(1)); mcasp_set_bits(base + DAVINCI_MCASP_TXFMT_REG, FSXDLY(1));
mcasp_set_bits(mcasp->base + DAVINCI_MCASP_RXFMT_REG, FSRDLY(1)); mcasp_set_bits(base + DAVINCI_MCASP_RXFMT_REG, FSRDLY(1));
break; break;
} }
......
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