Remove remnants of compile-time PGE configuration, all the real work

was already done based on CPU capabilities at run-time

arch/i386/config.in

@@ -88,7 +88,6 @@ if [ "$CONFIG_M686" = "y" ]; then
    define_int  CONFIG_X86_L1_CACHE_SHIFT 5
    define_bool CONFIG_X86_TSC y
    define_bool CONFIG_X86_GOOD_APIC y
-   define_bool CONFIG_X86_PGE y
    define_bool CONFIG_X86_USE_PPRO_CHECKSUM y
    define_bool CONFIG_X86_PPRO_FENCE y
 fi
@@ -96,14 +95,12 @@ if [ "$CONFIG_MPENTIUMIII" = "y" ]; then
    define_int  CONFIG_X86_L1_CACHE_SHIFT 5
    define_bool CONFIG_X86_TSC y
    define_bool CONFIG_X86_GOOD_APIC y
-   define_bool CONFIG_X86_PGE y
    define_bool CONFIG_X86_USE_PPRO_CHECKSUM y
 fi
 if [ "$CONFIG_MPENTIUM4" = "y" ]; then
    define_int  CONFIG_X86_L1_CACHE_SHIFT 7
    define_bool CONFIG_X86_TSC y
    define_bool CONFIG_X86_GOOD_APIC y
-   define_bool CONFIG_X86_PGE y
    define_bool CONFIG_X86_USE_PPRO_CHECKSUM y
 fi
 if [ "$CONFIG_MK6" = "y" ]; then
@@ -117,7 +114,6 @@ if [ "$CONFIG_MK7" = "y" ]; then
    define_bool CONFIG_X86_TSC y
    define_bool CONFIG_X86_GOOD_APIC y
    define_bool CONFIG_X86_USE_3DNOW y
-   define_bool CONFIG_X86_PGE y
    define_bool CONFIG_X86_USE_PPRO_CHECKSUM y
 fi
 if [ "$CONFIG_MELAN" = "y" ]; then

include/asm-i386/bugs.h

@@ -178,14 +178,6 @@ static void __init check_config(void)
 		panic("Kernel compiled for Pentium+, requires TSC feature!");
 #endif
 
-/*
- * If we configured ourselves for PGE, we'd better have it.
- */
-#ifdef CONFIG_X86_PGE
-	if (!cpu_has_pge)
-		panic("Kernel compiled for PPro+, requires PGE feature!");
-#endif
-
 /*
  * If we were told we had a good local APIC, check for buggy Pentia,
  * i.e. all B steppings and the C2 stepping of P54C when using their

include/asm-i386/pgtable.h

@@ -139,9 +139,6 @@ extern void pgtable_cache_init(void);
 #define __PAGE_KERNEL_RO \
 	(_PAGE_PRESENT | _PAGE_DIRTY | _PAGE_ACCESSED)
 
-#ifdef CONFIG_X86_PGE
-# define MAKE_GLOBAL(x) __pgprot((x) | _PAGE_GLOBAL)
-#else
 # define MAKE_GLOBAL(x)						\
 	({							\
 		pgprot_t __ret;					\
@@ -152,7 +149,6 @@ extern void pgtable_cache_init(void);
 			__ret = __pgprot(x);			\
 		__ret;						\
 	})
-#endif
 
 #define PAGE_KERNEL MAKE_GLOBAL(__PAGE_KERNEL)
 #define PAGE_KERNEL_RO MAKE_GLOBAL(__PAGE_KERNEL_RO)

include/asm-i386/tlbflush.h

@@ -37,12 +37,6 @@
 
 extern unsigned long pgkern_mask;
 
-/*
- * Do not check the PGE bit unnecesserily if this is a PPro+ kernel.
- */
-#ifdef CONFIG_X86_PGE
-# define __flush_tlb_all() __flush_tlb_global()
-#else
 # define __flush_tlb_all()						\
 	do {								\
 		if (cpu_has_pge)					\
@@ -50,7 +44,6 @@ extern unsigned long pgkern_mask;
 		else							\
 			__flush_tlb();					\
 	} while (0)
-#endif
 
 #ifndef CONFIG_X86_INVLPG
 #define __flush_tlb_one(addr) __flush_tlb()