Commit 8ffe9298 authored by Alexander Viro's avatar Alexander Viro Committed by Linus Torvalds

[PATCH] (2/4) eicon iomem annotations and fixes

 * added __iomem to declarations of iomem pointers
Signed-off-by: default avatarArmin Schindler <armin@melware.de>
Signed-off-by: default avatarAl Viro <viro@parcelfarce.linux.theplanet.co.uk>
Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
parent 1ef1c398
......@@ -3,11 +3,11 @@
#ifndef __DIVA_PCI_INTERFACE_H__
#define __DIVA_PCI_INTERFACE_H__
void *divasa_remap_pci_bar(diva_os_xdi_adapter_t *a,
void __iomem *divasa_remap_pci_bar(diva_os_xdi_adapter_t *a,
int id,
unsigned long bar,
unsigned long area_length);
void divasa_unmap_pci_bar(void *bar);
void divasa_unmap_pci_bar(void __iomem *bar);
unsigned long divasa_get_pci_irq(unsigned char bus,
unsigned char func, void *pci_dev_handle);
unsigned long divasa_get_pci_bar(unsigned char bus,
......
......@@ -435,16 +435,14 @@ diva_os_register_io_port(void *adapter, int on, unsigned long port,
return (0);
}
void *divasa_remap_pci_bar(diva_os_xdi_adapter_t *a, int id, unsigned long bar, unsigned long area_length)
void __iomem *divasa_remap_pci_bar(diva_os_xdi_adapter_t *a, int id, unsigned long bar, unsigned long area_length)
{
void *ret;
ret = (void *) ioremap(bar, area_length);
DBG_TRC(("remap(%08x)->%08x", bar, ret));
void __iomem *ret = ioremap(bar, area_length);
DBG_TRC(("remap(%08x)->%p", bar, ret));
return (ret);
}
void divasa_unmap_pci_bar(void *bar)
void divasa_unmap_pci_bar(void __iomem *bar)
{
if (bar) {
iounmap(bar);
......@@ -454,32 +452,32 @@ void divasa_unmap_pci_bar(void *bar)
/*********************************************************
** I/O port access
*********************************************************/
byte __inline__ inpp(void *addr)
byte __inline__ inpp(void __iomem *addr)
{
return (inb((unsigned long) addr));
}
word __inline__ inppw(void *addr)
word __inline__ inppw(void __iomem *addr)
{
return (inw((unsigned long) addr));
}
void __inline__ inppw_buffer(void *addr, void *P, int length)
void __inline__ inppw_buffer(void __iomem *addr, void *P, int length)
{
insw((unsigned long) addr, (word *) P, length >> 1);
}
void __inline__ outppw_buffer(void *addr, void *P, int length)
void __inline__ outppw_buffer(void __iomem *addr, void *P, int length)
{
outsw((unsigned long) addr, (word *) P, length >> 1);
}
void __inline__ outppw(void *addr, word w)
void __inline__ outppw(void __iomem *addr, word w)
{
outw(w, (unsigned long) addr);
}
void __inline__ outpp(void *addr, word p)
void __inline__ outpp(void __iomem *addr, word p)
{
outb(p, (unsigned long) addr);
}
......
......@@ -154,10 +154,10 @@ char *(ExceptionCauseTable[]) =
"VCED"
} ;
void
dump_trap_frame (PISDN_ADAPTER IoAdapter, byte *exceptionFrame)
dump_trap_frame (PISDN_ADAPTER IoAdapter, byte __iomem *exceptionFrame)
{
MP_XCPTC *xcept = (MP_XCPTC *)exceptionFrame ;
dword *regs;
MP_XCPTC __iomem *xcept = (MP_XCPTC __iomem *)exceptionFrame ;
dword __iomem *regs;
regs = &xcept->regs[0] ;
DBG_FTL(("%s: ***************** CPU TRAPPED *****************",
&IoAdapter->Name[0]))
......@@ -595,9 +595,7 @@ pcm_req (PISDN_ADAPTER IoAdapter, ENTITY *e)
byte mem_in (ADAPTER *a, void *addr)
{
byte val;
volatile byte* Base;
Base = (volatile byte *)DIVA_OS_MEM_ATTACH_RAM((PISDN_ADAPTER)a->io);
volatile byte __iomem *Base = DIVA_OS_MEM_ATTACH_RAM((PISDN_ADAPTER)a->io);
val = *(Base + (unsigned long)addr);
DIVA_OS_MEM_DETACH_RAM((PISDN_ADAPTER)a->io, Base);
return (val);
......@@ -605,16 +603,14 @@ byte mem_in (ADAPTER *a, void *addr)
word mem_inw (ADAPTER *a, void *addr)
{
word val;
volatile byte* Base;
Base = (volatile byte*)DIVA_OS_MEM_ATTACH_RAM((PISDN_ADAPTER)a->io);
volatile byte __iomem *Base = DIVA_OS_MEM_ATTACH_RAM((PISDN_ADAPTER)a->io);
val = READ_WORD((Base + (unsigned long)addr));
DIVA_OS_MEM_DETACH_RAM((PISDN_ADAPTER)a->io, Base);
return (val);
}
void mem_in_dw (ADAPTER *a, void *addr, dword* data, int dwords)
{
volatile byte* Base = (volatile byte*)DIVA_OS_MEM_ATTACH_RAM((PISDN_ADAPTER)a->io);
volatile byte __iomem * Base = DIVA_OS_MEM_ATTACH_RAM((PISDN_ADAPTER)a->io);
while (dwords--) {
*data++ = READ_DWORD((Base + (unsigned long)addr));
addr+=4;
......@@ -623,7 +619,7 @@ void mem_in_dw (ADAPTER *a, void *addr, dword* data, int dwords)
}
void mem_in_buffer (ADAPTER *a, void *addr, void *buffer, word length)
{
volatile byte* Base = (volatile byte*)DIVA_OS_MEM_ATTACH_RAM((PISDN_ADAPTER)a->io);
volatile byte __iomem *Base = DIVA_OS_MEM_ATTACH_RAM((PISDN_ADAPTER)a->io);
memcpy (buffer, (void *)(Base + (unsigned long)addr), length);
DIVA_OS_MEM_DETACH_RAM((PISDN_ADAPTER)a->io, Base);
}
......@@ -637,19 +633,19 @@ void mem_look_ahead (ADAPTER *a, PBUFFER *RBuffer, ENTITY *e)
}
void mem_out (ADAPTER *a, void *addr, byte data)
{
volatile byte* Base = (volatile byte*)DIVA_OS_MEM_ATTACH_RAM((PISDN_ADAPTER)a->io);
volatile byte __iomem *Base = DIVA_OS_MEM_ATTACH_RAM((PISDN_ADAPTER)a->io);
*(Base + (unsigned long)addr) = data ;
DIVA_OS_MEM_DETACH_RAM((PISDN_ADAPTER)a->io, Base);
}
void mem_outw (ADAPTER *a, void *addr, word data)
{
volatile byte* Base = (volatile byte*)DIVA_OS_MEM_ATTACH_RAM((PISDN_ADAPTER)a->io);
volatile byte __iomem * Base = DIVA_OS_MEM_ATTACH_RAM((PISDN_ADAPTER)a->io);
WRITE_WORD((Base + (unsigned long)addr), data);
DIVA_OS_MEM_DETACH_RAM((PISDN_ADAPTER)a->io, Base);
}
void mem_out_dw (ADAPTER *a, void *addr, const dword* data, int dwords)
{
volatile byte* Base = (volatile byte*)DIVA_OS_MEM_ATTACH_RAM((PISDN_ADAPTER)a->io);
volatile byte __iomem * Base = DIVA_OS_MEM_ATTACH_RAM((PISDN_ADAPTER)a->io);
while (dwords--) {
WRITE_DWORD((Base + (unsigned long)addr), *data);
addr+=4;
......@@ -659,13 +655,13 @@ void mem_out_dw (ADAPTER *a, void *addr, const dword* data, int dwords)
}
void mem_out_buffer (ADAPTER *a, void *addr, void *buffer, word length)
{
volatile byte* Base = (volatile byte*)DIVA_OS_MEM_ATTACH_RAM((PISDN_ADAPTER)a->io);
volatile byte __iomem * Base = DIVA_OS_MEM_ATTACH_RAM((PISDN_ADAPTER)a->io);
memcpy ((void *)(Base + (unsigned long)addr), buffer, length) ;
DIVA_OS_MEM_DETACH_RAM((PISDN_ADAPTER)a->io, Base);
}
void mem_inc (ADAPTER *a, void *addr)
{
volatile byte* Base = (volatile byte*)DIVA_OS_MEM_ATTACH_RAM((PISDN_ADAPTER)a->io);
volatile byte __iomem *Base = DIVA_OS_MEM_ATTACH_RAM((PISDN_ADAPTER)a->io);
byte x = *(Base + (unsigned long)addr);
*(Base + (unsigned long)addr) = x + 1 ;
DIVA_OS_MEM_DETACH_RAM((PISDN_ADAPTER)a->io, Base);
......@@ -676,7 +672,7 @@ void mem_inc (ADAPTER *a, void *addr)
byte io_in(ADAPTER * a, void * adr)
{
byte val;
byte *Port = (byte*)DIVA_OS_MEM_ATTACH_PORT((PISDN_ADAPTER)a->io);
byte __iomem *Port = DIVA_OS_MEM_ATTACH_PORT((PISDN_ADAPTER)a->io);
outppw(Port + 4, (word)(unsigned long)adr);
val = inpp(Port);
DIVA_OS_MEM_DETACH_PORT((PISDN_ADAPTER)a->io, Port);
......@@ -685,7 +681,7 @@ byte io_in(ADAPTER * a, void * adr)
word io_inw(ADAPTER * a, void * adr)
{
word val;
byte *Port = (byte*)DIVA_OS_MEM_ATTACH_PORT((PISDN_ADAPTER)a->io);
byte __iomem *Port = DIVA_OS_MEM_ATTACH_PORT((PISDN_ADAPTER)a->io);
outppw(Port + 4, (word)(unsigned long)adr);
val = inppw(Port);
DIVA_OS_MEM_DETACH_PORT((PISDN_ADAPTER)a->io, Port);
......@@ -693,7 +689,7 @@ word io_inw(ADAPTER * a, void * adr)
}
void io_in_buffer(ADAPTER * a, void * adr, void * buffer, word len)
{
byte *Port = (byte*)DIVA_OS_MEM_ATTACH_PORT((PISDN_ADAPTER)a->io);
byte __iomem *Port = DIVA_OS_MEM_ATTACH_PORT((PISDN_ADAPTER)a->io);
byte* P = (byte*)buffer;
if ((long)adr & 1) {
outppw(Port+4, (word)(unsigned long)adr);
......@@ -712,7 +708,7 @@ void io_in_buffer(ADAPTER * a, void * adr, void * buffer, word len)
}
void io_look_ahead(ADAPTER * a, PBUFFER * RBuffer, ENTITY * e)
{
byte *Port = (byte*)DIVA_OS_MEM_ATTACH_PORT((PISDN_ADAPTER)a->io);
byte __iomem *Port = DIVA_OS_MEM_ATTACH_PORT((PISDN_ADAPTER)a->io);
outppw(Port+4, (word)(unsigned long)RBuffer);
((PISDN_ADAPTER)a->io)->RBuffer.length = inppw(Port);
inppw_buffer (Port, ((PISDN_ADAPTER)a->io)->RBuffer.P, ((PISDN_ADAPTER)a->io)->RBuffer.length + 1);
......@@ -721,21 +717,21 @@ void io_look_ahead(ADAPTER * a, PBUFFER * RBuffer, ENTITY * e)
}
void io_out(ADAPTER * a, void * adr, byte data)
{
byte *Port = (byte*)DIVA_OS_MEM_ATTACH_PORT((PISDN_ADAPTER)a->io);
byte __iomem *Port = DIVA_OS_MEM_ATTACH_PORT((PISDN_ADAPTER)a->io);
outppw(Port+4, (word)(unsigned long)adr);
outpp(Port, data);
DIVA_OS_MEM_DETACH_PORT((PISDN_ADAPTER)a->io, Port);
}
void io_outw(ADAPTER * a, void * adr, word data)
{
byte *Port = (byte*)DIVA_OS_MEM_ATTACH_PORT((PISDN_ADAPTER)a->io);
byte __iomem *Port = DIVA_OS_MEM_ATTACH_PORT((PISDN_ADAPTER)a->io);
outppw(Port+4, (word)(unsigned long)adr);
outppw(Port, data);
DIVA_OS_MEM_DETACH_PORT((PISDN_ADAPTER)a->io, Port);
}
void io_out_buffer(ADAPTER * a, void * adr, void * buffer, word len)
{
byte *Port = (byte*)DIVA_OS_MEM_ATTACH_PORT((PISDN_ADAPTER)a->io);
byte __iomem *Port = DIVA_OS_MEM_ATTACH_PORT((PISDN_ADAPTER)a->io);
byte* P = (byte*)buffer;
if ((long)adr & 1) {
outppw(Port+4, (word)(unsigned long)adr);
......@@ -755,7 +751,7 @@ void io_out_buffer(ADAPTER * a, void * adr, void * buffer, word len)
void io_inc(ADAPTER * a, void * adr)
{
byte x;
byte *Port = (byte*)DIVA_OS_MEM_ATTACH_PORT((PISDN_ADAPTER)a->io);
byte __iomem *Port = DIVA_OS_MEM_ATTACH_PORT((PISDN_ADAPTER)a->io);
outppw(Port+4, (word)(unsigned long)adr);
x = inpp(Port);
outppw(Port+4, (word)(unsigned long)adr);
......@@ -865,7 +861,7 @@ void CALLBACK(ADAPTER * a, ENTITY * e)
/* --------------------------------------------------------------------------
routines for aligned reading and writing on RISC
-------------------------------------------------------------------------- */
void outp_words_from_buffer (word* adr, byte* P, dword len)
void outp_words_from_buffer (word __iomem * adr, byte* P, dword len)
{
dword i = 0;
word w;
......@@ -875,7 +871,7 @@ void outp_words_from_buffer (word* adr, byte* P, dword len)
outppw (adr, w);
}
}
void inp_words_to_buffer (word* adr, byte* P, dword len)
void inp_words_to_buffer (word __iomem * adr, byte* P, dword len)
{
dword i = 0;
word w;
......
......@@ -97,15 +97,15 @@ struct _ISDN_ADAPTER {
dword downloadAddrTable[4] ; /* add. for MultiMaster */
dword MemoryBase ;
dword MemorySize ;
byte *Address ;
byte *Config ;
byte *Control ;
byte *reset ;
byte *port ;
byte *ram ;
byte *cfg ;
byte *prom ;
byte *ctlReg ;
byte __iomem *Address ;
byte __iomem *Config ;
byte __iomem *Control ;
byte __iomem *reset ;
byte __iomem *port ;
byte __iomem *ram ;
byte __iomem *cfg ;
byte __iomem *prom ;
byte __iomem *ctlReg ;
struct pc_maint *pcm ;
diva_os_dependent_devica_name_t os_name;
byte Name[32] ;
......@@ -254,8 +254,8 @@ struct s_load {
/* ---------------------------------------------------------------------
Functions for port io
--------------------------------------------------------------------- */
void outp_words_from_buffer (word* adr, byte* P, dword len);
void inp_words_to_buffer (word* adr, byte* P, dword len);
void outp_words_from_buffer (word __iomem * adr, byte* P, dword len);
void inp_words_to_buffer (word __iomem * adr, byte* P, dword len);
/* ---------------------------------------------------------------------
platform specific conversions
--------------------------------------------------------------------- */
......@@ -307,7 +307,7 @@ typedef struct {
word cnt ;
word out ;
} Xdesc ;
extern void dump_trap_frame (PISDN_ADAPTER IoAdapter, byte *exception) ;
extern void dump_trap_frame (PISDN_ADAPTER IoAdapter, byte __iomem *exception) ;
extern void dump_xlog_buffer (PISDN_ADAPTER IoAdapter, Xdesc *xlogDesc) ;
/* --------------------------------------------------------------------- */
#endif /* } __DIVA_XDI_COMMON_IO_H_INC__ */
......@@ -143,7 +143,7 @@ static void diva_4bri_set_addresses(diva_os_xdi_adapter_t *a)
int diva_4bri_init_card(diva_os_xdi_adapter_t * a)
{
int bar, i;
byte *p;
byte __iomem *p;
PADAPTER_LIST_ENTRY quadro_list;
diva_os_xdi_adapter_t *diva_current;
diva_os_xdi_adapter_t *adapter_list[4];
......@@ -788,8 +788,8 @@ diva_4bri_cmd_card_proc(struct _diva_os_xdi_adapter *a,
a->xdi_mbox.
data_length);
if (a->xdi_mbox.data) {
byte *p = DIVA_OS_MEM_ATTACH_ADDRESS(&a->xdi_adapter);
byte *src = p;
byte __iomem *p = DIVA_OS_MEM_ATTACH_ADDRESS(&a->xdi_adapter);
byte __iomem *src = p;
byte *dst = a->xdi_mbox.data;
dword len = a->xdi_mbox.data_length;
......@@ -910,8 +910,8 @@ diva_4bri_write_sdram_block(PISDN_ADAPTER IoAdapter,
dword address,
const byte * data, dword length, dword limit)
{
byte *p = DIVA_OS_MEM_ATTACH_ADDRESS(IoAdapter);
byte *mem = p;
byte __iomem *p = DIVA_OS_MEM_ATTACH_ADDRESS(IoAdapter);
byte __iomem *mem = p;
if (((address + length) >= limit) || !mem) {
DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, p);
......@@ -933,10 +933,10 @@ static int
diva_4bri_start_adapter(PISDN_ADAPTER IoAdapter,
dword start_address, dword features)
{
volatile word *signature;
volatile word __iomem *signature;
int started = 0;
int i;
byte *p;
byte __iomem *p;
/*
start adapter
......@@ -947,7 +947,7 @@ diva_4bri_start_adapter(PISDN_ADAPTER IoAdapter,
/*
wait for signature in shared memory (max. 3 seconds)
*/
signature = (volatile word *) (&p[0x1E]);
signature = (volatile word __iomem *) (&p[0x1E]);
for (i = 0; i < 300; ++i) {
diva_os_wait(10);
......@@ -1011,7 +1011,7 @@ static int check_qBri_interrupt(PISDN_ADAPTER IoAdapter)
#ifdef SUPPORT_INTERRUPT_TEST_ON_4BRI
int i;
ADAPTER *a = &IoAdapter->a;
byte *p;
byte __iomem *p;
IoAdapter->IrqCount = 0;
......@@ -1031,14 +1031,14 @@ static int check_qBri_interrupt(PISDN_ADAPTER IoAdapter)
return ((IoAdapter->IrqCount > 0) ? 0 : -1);
#else
dword volatile *qBriIrq;
byte *p;
dword volatile __iomem *qBriIrq;
byte __iomem *p;
/*
Reset on-board interrupt register
*/
IoAdapter->IrqCount = 0;
p = DIVA_OS_MEM_ATTACH_CTLREG(IoAdapter);
qBriIrq = (dword volatile *) (&p[_4bri_is_rev_2_card
qBriIrq = (dword volatile __iomem *) (&p[_4bri_is_rev_2_card
(IoAdapter->
cardType) ? (MQ2_BREG_IRQ_TEST)
: (MQ_BREG_IRQ_TEST)]);
......
......@@ -78,7 +78,7 @@ int diva_bri_init_card(diva_os_xdi_adapter_t * a)
word cmd = 0, cmd_org;
byte Bus, Slot;
void *hdev;
byte *p;
byte __iomem *p;
/*
Set properties
......@@ -331,10 +331,11 @@ void diva_os_prepare_maestra_functions(PISDN_ADAPTER IoAdapter)
static dword diva_bri_get_serial_number(diva_os_xdi_adapter_t * a)
{
dword serNo = 0;
byte *confIO;
word serHi, serLo, *confMem;
byte __iomem *confIO;
word serHi, serLo;
word __iomem *confMem;
confIO = (byte *) DIVA_OS_MEM_ATTACH_CFG(&a->xdi_adapter);
confIO = DIVA_OS_MEM_ATTACH_CFG(&a->xdi_adapter);
serHi = (word) (inppw(&confIO[0x22]) & 0x0FFF);
serLo = (word) (inppw(&confIO[0x26]) & 0x0FFF);
serNo = ((dword) serHi << 16) | (dword) serLo;
......@@ -343,7 +344,7 @@ static dword diva_bri_get_serial_number(diva_os_xdi_adapter_t * a)
if ((serNo == 0) || (serNo == 0xFFFFFFFF)) {
DBG_FTL(("W: BRI use BAR[0] to get card serial number"))
confMem = (word *) DIVA_OS_MEM_ATTACH_RAM(&a->xdi_adapter);
confMem = (word __iomem *)DIVA_OS_MEM_ATTACH_RAM(&a->xdi_adapter);
serHi = (word) (READ_WORD(&confMem[0x11]) & 0x0FFF);
serLo = (word) (READ_WORD(&confMem[0x13]) & 0x0FFF);
serNo = (((dword) serHi) << 16) | ((dword) serLo);
......@@ -513,9 +514,9 @@ diva_bri_cmd_card_proc(struct _diva_os_xdi_adapter *a,
static int diva_bri_reset_adapter(PISDN_ADAPTER IoAdapter)
{
byte *addrHi, *addrLo, *ioaddr;
byte __iomem *addrHi, *addrLo, *ioaddr;
dword i;
byte *Port;
byte __iomem *Port;
if (!IoAdapter->port) {
return (-1);
......@@ -602,8 +603,8 @@ static int
diva_bri_write_sdram_block(PISDN_ADAPTER IoAdapter,
dword address, const byte * data, dword length)
{
byte *addrHi, *addrLo, *ioaddr;
byte *Port;
byte __iomem *addrHi, *addrLo, *ioaddr;
byte __iomem *Port;
if (!IoAdapter->port) {
return (-1);
......@@ -630,9 +631,9 @@ static int
diva_bri_start_adapter(PISDN_ADAPTER IoAdapter,
dword start_address, dword features)
{
byte *Port;
byte __iomem *Port;
dword i, test;
byte *addrHi, *addrLo, *ioaddr;
byte __iomem *addrHi, *addrLo, *ioaddr;
int started = 0;
ADAPTER *a = &IoAdapter->a;
......
......@@ -332,7 +332,7 @@ static int diva_pri_cleanup_adapter(diva_os_xdi_adapter_t * a)
static int diva_pri_reset_adapter(PISDN_ADAPTER IoAdapter)
{
dword i;
struct mp_load *boot;
struct mp_load __iomem *boot;
if (!IoAdapter->Address || !IoAdapter->reset) {
return (-1);
......@@ -343,7 +343,7 @@ static int diva_pri_reset_adapter(PISDN_ADAPTER IoAdapter)
return (-1);
}
boot = (struct mp_load *) DIVA_OS_MEM_ATTACH_ADDRESS(IoAdapter);
boot = (struct mp_load __iomem *) DIVA_OS_MEM_ATTACH_ADDRESS(IoAdapter);
WRITE_DWORD(&boot->err, 0);
DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, boot);
......@@ -351,7 +351,7 @@ static int diva_pri_reset_adapter(PISDN_ADAPTER IoAdapter)
diva_os_wait(10);
boot = (struct mp_load *) DIVA_OS_MEM_ATTACH_ADDRESS(IoAdapter);
boot = (struct mp_load __iomem *) DIVA_OS_MEM_ATTACH_ADDRESS(IoAdapter);
i = READ_DWORD(&boot->live);
diva_os_wait(10);
......@@ -408,8 +408,8 @@ diva_pri_write_sdram_block(PISDN_ADAPTER IoAdapter,
dword address,
const byte * data, dword length, dword limit)
{
byte *p = DIVA_OS_MEM_ATTACH_ADDRESS(IoAdapter);
byte *mem = p;
byte __iomem *p = DIVA_OS_MEM_ATTACH_ADDRESS(IoAdapter);
byte __iomem *mem = p;
if (((address + length) >= limit) || !mem) {
DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, p);
......@@ -433,8 +433,8 @@ diva_pri_start_adapter(PISDN_ADAPTER IoAdapter,
{
dword i;
int started = 0;
byte *p;
struct mp_load *boot = (struct mp_load *) DIVA_OS_MEM_ATTACH_ADDRESS(IoAdapter);
byte __iomem *p;
struct mp_load __iomem *boot = (struct mp_load __iomem *) DIVA_OS_MEM_ATTACH_ADDRESS(IoAdapter);
ADAPTER *a = &IoAdapter->a;
if (IoAdapter->Initialized) {
......@@ -468,7 +468,7 @@ diva_pri_start_adapter(PISDN_ADAPTER IoAdapter,
}
if (!started) {
byte *p = (byte *)boot;
byte __iomem *p = (byte __iomem *)boot;
dword TrapId;
dword debug;
TrapId = READ_DWORD(&p[0x80]);
......@@ -492,7 +492,7 @@ diva_pri_start_adapter(PISDN_ADAPTER IoAdapter,
*/
IoAdapter->IrqCount = 0;
p = DIVA_OS_MEM_ATTACH_CFG(IoAdapter);
WRITE_DWORD(((dword volatile *) p), (dword) ~ 0x03E00000);
WRITE_DWORD(p, (dword) ~ 0x03E00000);
DIVA_OS_MEM_DETACH_CFG(IoAdapter, p);
a->ReadyInt = 1;
a->ram_out(a, &PR_RAM->ReadyInt, 1);
......@@ -729,8 +729,8 @@ diva_pri_cmd_card_proc(struct _diva_os_xdi_adapter *a,
a->xdi_mbox.
data_length);
if (a->xdi_mbox.data) {
byte *p = DIVA_OS_MEM_ATTACH_ADDRESS(&a->xdi_adapter);
byte *src = p;
byte __iomem *p = DIVA_OS_MEM_ATTACH_ADDRESS(&a->xdi_adapter);
byte __iomem *src = p;
byte *dst = a->xdi_mbox.data;
dword len = a->xdi_mbox.data_length;
......@@ -764,8 +764,8 @@ static int pri_get_serial_number(diva_os_xdi_adapter_t * a)
byte data[64];
int i;
dword len = sizeof(data);
volatile byte *config;
volatile byte *flash;
volatile byte __iomem *config;
volatile byte __iomem *flash;
/*
* First set some GT6401x config registers before accessing the BOOT-ROM
......@@ -905,7 +905,7 @@ void diva_os_prepare_pri_functions(PISDN_ADAPTER IoAdapter)
** Checks presence of DSP on board
*/
static int
dsp_check_presence(volatile byte * addr, volatile byte * data, int dsp)
dsp_check_presence(volatile byte __iomem * addr, volatile byte __iomem * data, int dsp)
{
word pattern;
......@@ -950,8 +950,8 @@ dsp_check_presence(volatile byte * addr, volatile byte * data, int dsp)
*/
static dword diva_pri_detect_dsps(diva_os_xdi_adapter_t * a)
{
byte *base;
byte *p;
byte __iomem *base;
byte __iomem *p;
dword ret = 0;
dword row_offset[7] = {
0x00000000,
......@@ -962,7 +962,9 @@ static dword diva_pri_detect_dsps(diva_os_xdi_adapter_t * a)
0x00000000 /* 5 - ROW 0 */
};
byte *dsp_addr_port, *dsp_data_port, row_state;
byte __iomem *dsp_addr_port;
byte __iomem *dsp_data_port;
byte row_state;
int dsp_row = 0, dsp_index, dsp_num;
if (!a->xdi_adapter.Control || !a->xdi_adapter.reset) {
......
......@@ -235,12 +235,12 @@ int diva_os_register_io_port (void *adapter, int register, unsigned long port,
/*
** I/O port access abstraction
*/
byte inpp (void*);
word inppw (void*);
void inppw_buffer (void*, void*, int);
void outppw (void*, word);
void outppw_buffer (void* , void*, int);
void outpp (void*, word);
byte inpp (void __iomem *);
word inppw (void __iomem *);
void inppw_buffer (void __iomem *, void*, int);
void outppw (void __iomem *, word);
void outppw_buffer (void __iomem * , void*, int);
void outpp (void __iomem *, word);
/*
** IRQ
......
......@@ -45,7 +45,7 @@
Recovery XLOG from QBRI Card
-------------------------------------------------------------------------- */
static void qBri_cpu_trapped (PISDN_ADAPTER IoAdapter) {
byte *base ;
byte __iomem *base ;
word *Xlog ;
dword regs[4], TrapID, offset, size ;
Xdesc xlogDesc ;
......@@ -98,11 +98,11 @@ static void qBri_cpu_trapped (PISDN_ADAPTER IoAdapter) {
Reset QBRI Hardware
-------------------------------------------------------------------------- */
static void reset_qBri_hardware (PISDN_ADAPTER IoAdapter) {
word volatile *qBriReset ;
byte volatile *qBriCntrl ;
byte volatile *p ;
word volatile __iomem *qBriReset ;
byte volatile __iomem *qBriCntrl ;
byte volatile __iomem *p ;
qBriReset = (word volatile *)DIVA_OS_MEM_ATTACH_PROM(IoAdapter);
qBriReset = (word volatile __iomem *)DIVA_OS_MEM_ATTACH_PROM(IoAdapter);
WRITE_WORD(qBriReset, READ_WORD(qBriReset) | PLX9054_SOFT_RESET) ;
diva_os_wait (1) ;
WRITE_WORD(qBriReset, READ_WORD(qBriReset) & ~PLX9054_SOFT_RESET) ;
......@@ -126,10 +126,10 @@ static void reset_qBri_hardware (PISDN_ADAPTER IoAdapter) {
Start Card CPU
-------------------------------------------------------------------------- */
void start_qBri_hardware (PISDN_ADAPTER IoAdapter) {
byte volatile *qBriReset ;
byte volatile *p ;
byte volatile __iomem *qBriReset ;
byte volatile __iomem *p ;
p = (byte volatile *)DIVA_OS_MEM_ATTACH_CTLREG(IoAdapter);
p = DIVA_OS_MEM_ATTACH_CTLREG(IoAdapter);
qBriReset = &p[(DIVA_4BRI_REVISION(IoAdapter)) ? (MQ2_BREG_RISC) : (MQ_BREG_RISC)];
WRITE_DWORD(qBriReset, MQ_RISC_COLD_RESET_MASK) ;
diva_os_wait (2) ;
......@@ -144,10 +144,10 @@ void start_qBri_hardware (PISDN_ADAPTER IoAdapter) {
Stop Card CPU
-------------------------------------------------------------------------- */
static void stop_qBri_hardware (PISDN_ADAPTER IoAdapter) {
byte volatile *p ;
dword volatile *qBriReset ;
dword volatile *qBriIrq ;
dword volatile *qBriIsacDspReset ;
byte volatile __iomem *p ;
dword volatile __iomem *qBriReset ;
dword volatile __iomem *qBriIrq ;
dword volatile __iomem *qBriIsacDspReset ;
int rev2 = DIVA_4BRI_REVISION(IoAdapter);
int reset_offset = rev2 ? (MQ2_BREG_RISC) : (MQ_BREG_RISC);
int irq_offset = rev2 ? (MQ2_BREG_IRQ_TEST) : (MQ_BREG_IRQ_TEST);
......@@ -155,9 +155,9 @@ static void stop_qBri_hardware (PISDN_ADAPTER IoAdapter) {
if ( IoAdapter->ControllerNumber > 0 )
return ;
p = (byte volatile *)DIVA_OS_MEM_ATTACH_CTLREG(IoAdapter);
qBriReset = (dword volatile *)&p[reset_offset];
qBriIsacDspReset = (dword volatile *)&p[hw_offset];
p = DIVA_OS_MEM_ATTACH_CTLREG(IoAdapter);
qBriReset = (dword volatile __iomem *)&p[reset_offset];
qBriIsacDspReset = (dword volatile __iomem *)&p[hw_offset];
/*
* clear interrupt line (reset Local Interrupt Test Register)
*/
......@@ -165,12 +165,12 @@ static void stop_qBri_hardware (PISDN_ADAPTER IoAdapter) {
WRITE_DWORD(qBriIsacDspReset, 0) ;
DIVA_OS_MEM_DETACH_CTLREG(IoAdapter, p);
p = (byte volatile *)DIVA_OS_MEM_ATTACH_RESET(IoAdapter);
p = DIVA_OS_MEM_ATTACH_RESET(IoAdapter);
p[PLX9054_INTCSR] = 0x00 ; /* disable PCI interrupts */
DIVA_OS_MEM_DETACH_RESET(IoAdapter, p);
p = (byte volatile *)DIVA_OS_MEM_ATTACH_CTLREG(IoAdapter);
qBriIrq = (dword volatile *)&p[irq_offset];
p = DIVA_OS_MEM_ATTACH_CTLREG(IoAdapter);
qBriIrq = (dword volatile __iomem *)&p[irq_offset];
WRITE_DWORD(qBriIrq, MQ_IRQ_REQ_OFF) ;
DIVA_OS_MEM_DETACH_CTLREG(IoAdapter, p);
......@@ -276,7 +276,7 @@ int qBri_FPGA_download (PISDN_ADAPTER IoAdapter) {
int bit ;
byte *File ;
dword code, FileLength ;
word volatile *addr = (word volatile *)DIVA_OS_MEM_ATTACH_PROM(IoAdapter);
word volatile __iomem *addr = (word volatile __iomem *)DIVA_OS_MEM_ATTACH_PROM(IoAdapter);
word val, baseval = FPGA_CS | FPGA_PROG ;
......@@ -864,13 +864,13 @@ static int load_qBri_hardware (PISDN_ADAPTER IoAdapter) {
Card ISR
-------------------------------------------------------------------------- */
static int qBri_ISR (struct _ISDN_ADAPTER* IoAdapter) {
dword volatile *qBriIrq ;
dword volatile __iomem *qBriIrq ;
PADAPTER_LIST_ENTRY QuadroList = IoAdapter->QuadroList ;
word i ;
int serviced = 0 ;
byte *p;
byte __iomem *p;
p = DIVA_OS_MEM_ATTACH_RESET(IoAdapter);
......@@ -884,7 +884,7 @@ static int qBri_ISR (struct _ISDN_ADAPTER* IoAdapter) {
* clear interrupt line (reset Local Interrupt Test Register)
*/
p = DIVA_OS_MEM_ATTACH_CTLREG(IoAdapter);
qBriIrq = (dword volatile *)(&p[DIVA_4BRI_REVISION(IoAdapter) ? (MQ2_BREG_IRQ_TEST) : (MQ_BREG_IRQ_TEST)]);
qBriIrq = (dword volatile __iomem *)(&p[DIVA_4BRI_REVISION(IoAdapter) ? (MQ2_BREG_IRQ_TEST) : (MQ_BREG_IRQ_TEST)]);
WRITE_DWORD(qBriIrq, MQ_IRQ_REQ_OFF) ;
DIVA_OS_MEM_DETACH_CTLREG(IoAdapter, p);
......@@ -908,8 +908,8 @@ static int qBri_ISR (struct _ISDN_ADAPTER* IoAdapter) {
Does disable the interrupt on the card
-------------------------------------------------------------------------- */
static void disable_qBri_interrupt (PISDN_ADAPTER IoAdapter) {
dword volatile *qBriIrq ;
byte *p;
dword volatile __iomem *qBriIrq ;
byte __iomem *p;
if ( IoAdapter->ControllerNumber > 0 )
return ;
......@@ -921,7 +921,7 @@ static void disable_qBri_interrupt (PISDN_ADAPTER IoAdapter) {
DIVA_OS_MEM_DETACH_RESET(IoAdapter, p);
p = DIVA_OS_MEM_ATTACH_CTLREG(IoAdapter);
qBriIrq = (dword volatile *)(&p[DIVA_4BRI_REVISION(IoAdapter) ? (MQ2_BREG_IRQ_TEST) : (MQ_BREG_IRQ_TEST)]);
qBriIrq = (dword volatile __iomem *)(&p[DIVA_4BRI_REVISION(IoAdapter) ? (MQ2_BREG_IRQ_TEST) : (MQ_BREG_IRQ_TEST)]);
WRITE_DWORD(qBriIrq, MQ_IRQ_REQ_OFF) ;
DIVA_OS_MEM_DETACH_CTLREG(IoAdapter, p);
}
......
......@@ -41,11 +41,11 @@
Investigate card state, recovery trace buffer
-------------------------------------------------------------------------- */
static void bri_cpu_trapped (PISDN_ADAPTER IoAdapter) {
byte *addrHi, *addrLo, *ioaddr ;
byte __iomem *addrHi, *addrLo, *ioaddr ;
word *Xlog ;
dword regs[4], i, size ;
Xdesc xlogDesc ;
byte *Port;
byte __iomem *Port;
/*
* first read pointers and trap frame
*/
......@@ -102,7 +102,7 @@ static void bri_cpu_trapped (PISDN_ADAPTER IoAdapter) {
Reset hardware
--------------------------------------------------------------------- */
static void reset_bri_hardware (PISDN_ADAPTER IoAdapter) {
byte *p = DIVA_OS_MEM_ATTACH_CTLREG(IoAdapter);
byte __iomem *p = DIVA_OS_MEM_ATTACH_CTLREG(IoAdapter);
outpp (p, 0x00) ;
DIVA_OS_MEM_DETACH_CTLREG(IoAdapter, p);
}
......@@ -110,7 +110,7 @@ static void reset_bri_hardware (PISDN_ADAPTER IoAdapter) {
Halt system
--------------------------------------------------------------------- */
static void stop_bri_hardware (PISDN_ADAPTER IoAdapter) {
byte *p = DIVA_OS_MEM_ATTACH_RESET(IoAdapter);
byte __iomem *p = DIVA_OS_MEM_ATTACH_RESET(IoAdapter);
if (p) {
outpp (p, 0x00) ; /* disable interrupts ! */
}
......@@ -471,7 +471,7 @@ static int load_bri_hardware (PISDN_ADAPTER IoAdapter) {
#endif /* } */
/******************************************************************************/
static int bri_ISR (struct _ISDN_ADAPTER* IoAdapter) {
byte *p;
byte __iomem *p;
p = DIVA_OS_MEM_ATTACH_CTLREG(IoAdapter);
if ( !(inpp (p) & 0x01) ) {
......@@ -493,7 +493,7 @@ static int bri_ISR (struct _ISDN_ADAPTER* IoAdapter) {
Disable IRQ in the card hardware
-------------------------------------------------------------------------- */
static void disable_bri_interrupt (PISDN_ADAPTER IoAdapter) {
byte *p;
byte __iomem *p;
p = DIVA_OS_MEM_ATTACH_RESET(IoAdapter);
if ( p )
{
......
......@@ -47,7 +47,7 @@ static dword pri_ram_offset (ADAPTER* a) {
Recovery XLOG buffer from the card
------------------------------------------------------------------------- */
static void pri_cpu_trapped (PISDN_ADAPTER IoAdapter) {
byte *base ;
byte __iomem *base ;
word *Xlog ;
dword regs[4], TrapID, size ;
Xdesc xlogDesc ;
......@@ -89,7 +89,7 @@ static void pri_cpu_trapped (PISDN_ADAPTER IoAdapter) {
Hardware reset of PRI card
------------------------------------------------------------------------- */
static void reset_pri_hardware (PISDN_ADAPTER IoAdapter) {
byte *p = DIVA_OS_MEM_ATTACH_RESET(IoAdapter);
byte __iomem *p = DIVA_OS_MEM_ATTACH_RESET(IoAdapter);
*p = _MP_RISC_RESET | _MP_LED1 | _MP_LED2 ;
diva_os_wait (50) ;
*p = 0x00 ;
......@@ -101,8 +101,8 @@ static void reset_pri_hardware (PISDN_ADAPTER IoAdapter) {
------------------------------------------------------------------------- */
static void stop_pri_hardware (PISDN_ADAPTER IoAdapter) {
dword i;
byte *p;
dword volatile *cfgReg = (dword volatile *)DIVA_OS_MEM_ATTACH_CFG(IoAdapter);
byte __iomem *p;
dword volatile __iomem *cfgReg = (void __iomem *)DIVA_OS_MEM_ATTACH_CFG(IoAdapter);
cfgReg[3] = 0x00000000 ;
cfgReg[1] = 0x00000000 ;
DIVA_OS_MEM_DETACH_CFG(IoAdapter, cfgReg);
......@@ -114,7 +114,7 @@ static void stop_pri_hardware (PISDN_ADAPTER IoAdapter) {
i++ ;
}
DBG_TRC(("%s: PRI stopped (%d)", IoAdapter->Name, i))
cfgReg = (dword volatile *)DIVA_OS_MEM_ATTACH_CFG(IoAdapter);
cfgReg = (void __iomem *)DIVA_OS_MEM_ATTACH_CFG(IoAdapter);
WRITE_DWORD(&cfgReg[0],((dword)(~0x03E00000)));
DIVA_OS_MEM_DETACH_CFG(IoAdapter, cfgReg);
diva_os_wait (1) ;
......@@ -491,15 +491,15 @@ static int load_pri_hardware (PISDN_ADAPTER IoAdapter) {
PRI Adapter interrupt Service Routine
-------------------------------------------------------------------------- */
static int pri_ISR (struct _ISDN_ADAPTER* IoAdapter) {
byte *cfg = DIVA_OS_MEM_ATTACH_CFG(IoAdapter);
if ( !((READ_DWORD((dword *)cfg)) & 0x80000000) ) {
byte __iomem *cfg = DIVA_OS_MEM_ATTACH_CFG(IoAdapter);
if ( !(READ_DWORD(cfg) & 0x80000000) ) {
DIVA_OS_MEM_DETACH_CFG(IoAdapter, cfg);
return (0) ;
}
/*
clear interrupt line
*/
WRITE_DWORD(((dword *)cfg), (dword)~0x03E00000) ;
WRITE_DWORD(cfg, (dword)~0x03E00000) ;
DIVA_OS_MEM_DETACH_CFG(IoAdapter, cfg);
IoAdapter->IrqCount++ ;
if ( IoAdapter->Initialized )
......@@ -512,7 +512,7 @@ static int pri_ISR (struct _ISDN_ADAPTER* IoAdapter) {
Disable interrupt in the card hardware
------------------------------------------------------------------------- */
static void disable_pri_interrupt (PISDN_ADAPTER IoAdapter) {
dword volatile *cfgReg = (dword volatile *)DIVA_OS_MEM_ATTACH_CFG(IoAdapter) ;
dword volatile __iomem *cfgReg = (dword volatile __iomem *)DIVA_OS_MEM_ATTACH_CFG(IoAdapter) ;
cfgReg[3] = 0x00000000 ;
cfgReg[1] = 0x00000000 ;
WRITE_DWORD(&cfgReg[0], (dword)(~0x03E00000)) ;
......
......@@ -12,7 +12,7 @@ typedef struct _divas_pci_card_resources {
void *hdev;
dword bar[8]; /* contains context of appropriate BAR Register */
void *addr[8]; /* same bar, but mapped into memory */
void __iomem *addr[8]; /* same bar, but mapped into memory */
dword length[8]; /* bar length */
int mem_type_id[MAX_MEM_TYPE];
unsigned int qoffset;
......
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