Commit 92171611 authored by Herve Codina's avatar Herve Codina

soc: fsl: cpm1: qmc: Add support for disabling channel TSA entries

In order to allow runtime timeslot route changes, disabling channel TSA
entries needs to be supported.

Add support for this new feature.
Signed-off-by: default avatarHerve Codina <herve.codina@bootlin.com>
Reviewed-by: default avatarChristophe Leroy <christophe.leroy@csgroup.eu>
Link: https://lore.kernel.org/r/20231205152116.122512-13-herve.codina@bootlin.com
parent f2deea16
...@@ -567,7 +567,8 @@ static void qmc_chan_read_done(struct qmc_chan *chan) ...@@ -567,7 +567,8 @@ static void qmc_chan_read_done(struct qmc_chan *chan)
spin_unlock_irqrestore(&chan->rx_lock, flags); spin_unlock_irqrestore(&chan->rx_lock, flags);
} }
static int qmc_chan_setup_tsa_64rxtx(struct qmc_chan *chan, const struct tsa_serial_info *info) static int qmc_chan_setup_tsa_64rxtx(struct qmc_chan *chan, const struct tsa_serial_info *info,
bool enable)
{ {
unsigned int i; unsigned int i;
u16 curr; u16 curr;
...@@ -603,13 +604,14 @@ static int qmc_chan_setup_tsa_64rxtx(struct qmc_chan *chan, const struct tsa_ser ...@@ -603,13 +604,14 @@ static int qmc_chan_setup_tsa_64rxtx(struct qmc_chan *chan, const struct tsa_ser
continue; continue;
qmc_clrsetbits16(chan->qmc->scc_pram + QMC_GBL_TSATRX + (i * 2), qmc_clrsetbits16(chan->qmc->scc_pram + QMC_GBL_TSATRX + (i * 2),
~QMC_TSA_WRAP, val); ~QMC_TSA_WRAP, enable ? val : 0x0000);
} }
return 0; return 0;
} }
static int qmc_chan_setup_tsa_32rx_32tx(struct qmc_chan *chan, const struct tsa_serial_info *info) static int qmc_chan_setup_tsa_32rx_32tx(struct qmc_chan *chan, const struct tsa_serial_info *info,
bool enable)
{ {
unsigned int i; unsigned int i;
u16 curr; u16 curr;
...@@ -650,7 +652,7 @@ static int qmc_chan_setup_tsa_32rx_32tx(struct qmc_chan *chan, const struct tsa_ ...@@ -650,7 +652,7 @@ static int qmc_chan_setup_tsa_32rx_32tx(struct qmc_chan *chan, const struct tsa_
continue; continue;
qmc_clrsetbits16(chan->qmc->scc_pram + QMC_GBL_TSATRX + (i * 2), qmc_clrsetbits16(chan->qmc->scc_pram + QMC_GBL_TSATRX + (i * 2),
~QMC_TSA_WRAP, val); ~QMC_TSA_WRAP, enable ? val : 0x0000);
} }
/* Set entries based on Tx stuff */ /* Set entries based on Tx stuff */
for (i = 0; i < info->nb_tx_ts; i++) { for (i = 0; i < info->nb_tx_ts; i++) {
...@@ -658,13 +660,13 @@ static int qmc_chan_setup_tsa_32rx_32tx(struct qmc_chan *chan, const struct tsa_ ...@@ -658,13 +660,13 @@ static int qmc_chan_setup_tsa_32rx_32tx(struct qmc_chan *chan, const struct tsa_
continue; continue;
qmc_clrsetbits16(chan->qmc->scc_pram + QMC_GBL_TSATTX + (i * 2), qmc_clrsetbits16(chan->qmc->scc_pram + QMC_GBL_TSATTX + (i * 2),
~QMC_TSA_WRAP, val); ~QMC_TSA_WRAP, enable ? val : 0x0000);
} }
return 0; return 0;
} }
static int qmc_chan_setup_tsa(struct qmc_chan *chan) static int qmc_chan_setup_tsa(struct qmc_chan *chan, bool enable)
{ {
struct tsa_serial_info info; struct tsa_serial_info info;
int ret; int ret;
...@@ -679,8 +681,8 @@ static int qmc_chan_setup_tsa(struct qmc_chan *chan) ...@@ -679,8 +681,8 @@ static int qmc_chan_setup_tsa(struct qmc_chan *chan)
* and one for Tx) according to assigned TS numbers. * and one for Tx) according to assigned TS numbers.
*/ */
return ((info.nb_tx_ts > 32) || (info.nb_rx_ts > 32)) ? return ((info.nb_tx_ts > 32) || (info.nb_rx_ts > 32)) ?
qmc_chan_setup_tsa_64rxtx(chan, &info) : qmc_chan_setup_tsa_64rxtx(chan, &info, enable) :
qmc_chan_setup_tsa_32rx_32tx(chan, &info); qmc_chan_setup_tsa_32rx_32tx(chan, &info, enable);
} }
static int qmc_chan_command(struct qmc_chan *chan, u8 qmc_opcode) static int qmc_chan_command(struct qmc_chan *chan, u8 qmc_opcode)
...@@ -1146,7 +1148,7 @@ static int qmc_setup_chan(struct qmc *qmc, struct qmc_chan *chan) ...@@ -1146,7 +1148,7 @@ static int qmc_setup_chan(struct qmc *qmc, struct qmc_chan *chan)
chan->qmc = qmc; chan->qmc = qmc;
ret = qmc_chan_setup_tsa(chan); ret = qmc_chan_setup_tsa(chan, true);
if (ret) if (ret)
return ret; return ret;
......
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