Commit 9217c3cf authored by Raghu Vatsavayi's avatar Raghu Vatsavayi Committed by David S. Miller

liquidio VF rx data and ctl path

Adds support for VF receive data control path.
Signed-off-by: default avatarRaghu Vatsavayi <raghu.vatsavayi@caviumnetworks.com>
Signed-off-by: default avatarDerek Chickles <derek.chickles@caviumnetworks.com>
Signed-off-by: default avatarSatanand Burla <satananda.burla@caviumnetworks.com>
Signed-off-by: default avatarFelix Manlunas <felix.manlunas@caviumnetworks.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 9bdca5c6
...@@ -1374,7 +1374,7 @@ void lio_enable_irq(struct octeon_droq *droq, struct octeon_instr_queue *iq) ...@@ -1374,7 +1374,7 @@ void lio_enable_irq(struct octeon_droq *droq, struct octeon_instr_queue *iq)
/*write resend. Writing RESEND in SLI_PKTX_CNTS should be enough /*write resend. Writing RESEND in SLI_PKTX_CNTS should be enough
*to trigger tx interrupts as well, if they are pending. *to trigger tx interrupts as well, if they are pending.
*/ */
if (oct && OCTEON_CN23XX_PF(oct)) { if (oct && (OCTEON_CN23XX_PF(oct) || OCTEON_CN23XX_VF(oct))) {
if (droq) if (droq)
writeq(CN23XX_INTR_RESEND, droq->pkts_sent_reg); writeq(CN23XX_INTR_RESEND, droq->pkts_sent_reg);
/*we race with firmrware here. read and write the IN_DONE_CNTS*/ /*we race with firmrware here. read and write the IN_DONE_CNTS*/
......
...@@ -28,6 +28,7 @@ ...@@ -28,6 +28,7 @@
#include "cn66xx_regs.h" #include "cn66xx_regs.h"
#include "cn66xx_device.h" #include "cn66xx_device.h"
#include "cn23xx_pf_device.h" #include "cn23xx_pf_device.h"
#include "cn23xx_vf_device.h"
struct niclist { struct niclist {
struct list_head list; struct list_head list;
...@@ -259,6 +260,11 @@ int octeon_init_droq(struct octeon_device *oct, ...@@ -259,6 +260,11 @@ int octeon_init_droq(struct octeon_device *oct,
} else if (OCTEON_CN23XX_PF(oct)) { } else if (OCTEON_CN23XX_PF(oct)) {
struct octeon_config *conf23 = CHIP_CONF(oct, cn23xx_pf); struct octeon_config *conf23 = CHIP_CONF(oct, cn23xx_pf);
c_pkts_per_intr = (u32)CFG_GET_OQ_PKTS_PER_INTR(conf23);
c_refill_threshold = (u32)CFG_GET_OQ_REFILL_THRESHOLD(conf23);
} else if (OCTEON_CN23XX_VF(oct)) {
struct octeon_config *conf23 = CHIP_CONF(oct, cn23xx_vf);
c_pkts_per_intr = (u32)CFG_GET_OQ_PKTS_PER_INTR(conf23); c_pkts_per_intr = (u32)CFG_GET_OQ_PKTS_PER_INTR(conf23);
c_refill_threshold = (u32)CFG_GET_OQ_REFILL_THRESHOLD(conf23); c_refill_threshold = (u32)CFG_GET_OQ_REFILL_THRESHOLD(conf23);
} else { } else {
...@@ -889,6 +895,10 @@ octeon_process_droq_poll_cmd(struct octeon_device *oct, u32 q_no, int cmd, ...@@ -889,6 +895,10 @@ octeon_process_droq_poll_cmd(struct octeon_device *oct, u32 q_no, int cmd,
lio_enable_irq(oct->droq[q_no], oct->instr_queue[q_no]); lio_enable_irq(oct->droq[q_no], oct->instr_queue[q_no]);
} }
break; break;
case OCTEON_CN23XX_VF_VID:
lio_enable_irq(oct->droq[q_no], oct->instr_queue[q_no]);
break;
} }
return 0; return 0;
} }
......
...@@ -84,7 +84,8 @@ int lio_process_ordered_list(struct octeon_device *octeon_dev, ...@@ -84,7 +84,8 @@ int lio_process_ordered_list(struct octeon_device *octeon_dev,
sc = (struct octeon_soft_command *)ordered_sc_list-> sc = (struct octeon_soft_command *)ordered_sc_list->
head.next; head.next;
if (OCTEON_CN23XX_PF(octeon_dev)) { if (OCTEON_CN23XX_PF(octeon_dev) ||
OCTEON_CN23XX_VF(octeon_dev)) {
rdp = (struct octeon_instr_rdp *)&sc->cmd.cmd3.rdp; rdp = (struct octeon_instr_rdp *)&sc->cmd.cmd3.rdp;
rptr = sc->cmd.cmd3.rptr; rptr = sc->cmd.cmd3.rptr;
} else { } else {
......
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