Commit 925dc1cf authored by Matthew Brost's avatar Matthew Brost Committed by John Harrison

drm/i915/guc: Implement GuC submission tasklet

Implement GuC submission tasklet for new interface. The new GuC
interface uses H2G to submit contexts to the GuC. Since H2G use a single
channel, a single tasklet is used for the submission path.

Also the per engine interrupt handler has been updated to disable the
rescheduling of the physical engine tasklet, when using GuC scheduling,
as the physical engine tasklet is no longer used.

In this patch the field, guc_id, has been added to intel_context and is
not assigned. Patches later in the series will assign this value.

v2:
 (John Harrison)
  - Clean up some comments
v3:
 (John Harrison)
  - More comment cleanups

Cc: John Harrison <john.c.harrison@intel.com>
Signed-off-by: default avatarMatthew Brost <matthew.brost@intel.com>
Reviewed-by: default avatarJohn Harrison <John.C.Harrison@Intel.com>
Signed-off-by: default avatarJohn Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210721215101.139794-5-matthew.brost@intel.com
parent 27213d79
...@@ -137,6 +137,15 @@ struct intel_context { ...@@ -137,6 +137,15 @@ struct intel_context {
struct intel_sseu sseu; struct intel_sseu sseu;
u8 wa_bb_page; /* if set, page num reserved for context workarounds */ u8 wa_bb_page; /* if set, page num reserved for context workarounds */
/* GuC scheduling state flags that do not require a lock. */
atomic_t guc_sched_state_no_lock;
/*
* GuC LRC descriptor ID - Not assigned in this patch but future patches
* in the series will.
*/
u16 guc_id;
}; };
#endif /* __INTEL_CONTEXT_TYPES__ */ #endif /* __INTEL_CONTEXT_TYPES__ */
...@@ -30,6 +30,10 @@ struct intel_guc { ...@@ -30,6 +30,10 @@ struct intel_guc {
struct intel_guc_log log; struct intel_guc_log log;
struct intel_guc_ct ct; struct intel_guc_ct ct;
/* Global engine used to submit requests to GuC */
struct i915_sched_engine *sched_engine;
struct i915_request *stalled_request;
/* intel_guc_recv interrupt related state */ /* intel_guc_recv interrupt related state */
spinlock_t irq_lock; spinlock_t irq_lock;
unsigned int msg_enabled_mask; unsigned int msg_enabled_mask;
......
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