Commit 92e6edd6 authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'regmap-fix-v4.5-big-endian' of...

Merge tag 'regmap-fix-v4.5-big-endian' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap

Pull regmap fix from Mark Brown:
 "A single revert back to v4.4 endianness handling.

  Commit 29bb45f2 ("regmap-mmio: Use native endianness for
  read/write") attempted to fix some long standing bugs in the MMIO
  implementation for big endian systems caused by duplicate byte
  swapping in both regmap and readl()/writel().  Sadly the fix makes
  things worse rather than better, so revert it for now"

* tag 'regmap-fix-v4.5-big-endian' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap:
  regmap: mmio: Revert to v4.4 endianness handling
parents 4ba6a2b2 320549a2
...@@ -74,6 +74,7 @@ uart0: serial@10000100 { ...@@ -74,6 +74,7 @@ uart0: serial@10000100 {
timer: timer@10000040 { timer: timer@10000040 {
compatible = "syscon"; compatible = "syscon";
reg = <0x10000040 0x2c>; reg = <0x10000040 0x2c>;
little-endian;
}; };
reboot { reboot {
......
...@@ -98,6 +98,7 @@ upg_irq0_intc: upg_irq0_intc@406780 { ...@@ -98,6 +98,7 @@ upg_irq0_intc: upg_irq0_intc@406780 {
sun_top_ctrl: syscon@404000 { sun_top_ctrl: syscon@404000 {
compatible = "brcm,bcm7125-sun-top-ctrl", "syscon"; compatible = "brcm,bcm7125-sun-top-ctrl", "syscon";
reg = <0x404000 0x60c>; reg = <0x404000 0x60c>;
little-endian;
}; };
reboot { reboot {
......
...@@ -118,6 +118,7 @@ upg_aon_irq0_intc: upg_aon_irq0_intc@408b80 { ...@@ -118,6 +118,7 @@ upg_aon_irq0_intc: upg_aon_irq0_intc@408b80 {
sun_top_ctrl: syscon@404000 { sun_top_ctrl: syscon@404000 {
compatible = "brcm,bcm7346-sun-top-ctrl", "syscon"; compatible = "brcm,bcm7346-sun-top-ctrl", "syscon";
reg = <0x404000 0x51c>; reg = <0x404000 0x51c>;
little-endian;
}; };
reboot { reboot {
......
...@@ -112,6 +112,7 @@ upg_aon_irq0_intc: upg_aon_irq0_intc@408b80 { ...@@ -112,6 +112,7 @@ upg_aon_irq0_intc: upg_aon_irq0_intc@408b80 {
sun_top_ctrl: syscon@404000 { sun_top_ctrl: syscon@404000 {
compatible = "brcm,bcm7358-sun-top-ctrl", "syscon"; compatible = "brcm,bcm7358-sun-top-ctrl", "syscon";
reg = <0x404000 0x51c>; reg = <0x404000 0x51c>;
little-endian;
}; };
reboot { reboot {
......
...@@ -112,6 +112,7 @@ upg_aon_irq0_intc: upg_aon_irq0_intc@408b80 { ...@@ -112,6 +112,7 @@ upg_aon_irq0_intc: upg_aon_irq0_intc@408b80 {
sun_top_ctrl: syscon@404000 { sun_top_ctrl: syscon@404000 {
compatible = "brcm,bcm7360-sun-top-ctrl", "syscon"; compatible = "brcm,bcm7360-sun-top-ctrl", "syscon";
reg = <0x404000 0x51c>; reg = <0x404000 0x51c>;
little-endian;
}; };
reboot { reboot {
......
...@@ -118,6 +118,7 @@ upg_aon_irq0_intc: upg_aon_irq0_intc@408b80 { ...@@ -118,6 +118,7 @@ upg_aon_irq0_intc: upg_aon_irq0_intc@408b80 {
sun_top_ctrl: syscon@404000 { sun_top_ctrl: syscon@404000 {
compatible = "brcm,bcm7362-sun-top-ctrl", "syscon"; compatible = "brcm,bcm7362-sun-top-ctrl", "syscon";
reg = <0x404000 0x51c>; reg = <0x404000 0x51c>;
little-endian;
}; };
reboot { reboot {
......
...@@ -99,6 +99,7 @@ upg_irq0_intc: upg_irq0_intc@406780 { ...@@ -99,6 +99,7 @@ upg_irq0_intc: upg_irq0_intc@406780 {
sun_top_ctrl: syscon@404000 { sun_top_ctrl: syscon@404000 {
compatible = "brcm,bcm7420-sun-top-ctrl", "syscon"; compatible = "brcm,bcm7420-sun-top-ctrl", "syscon";
reg = <0x404000 0x60c>; reg = <0x404000 0x60c>;
little-endian;
}; };
reboot { reboot {
......
...@@ -100,6 +100,7 @@ upg_irq0_intc: upg_irq0_intc@406780 { ...@@ -100,6 +100,7 @@ upg_irq0_intc: upg_irq0_intc@406780 {
sun_top_ctrl: syscon@404000 { sun_top_ctrl: syscon@404000 {
compatible = "brcm,bcm7425-sun-top-ctrl", "syscon"; compatible = "brcm,bcm7425-sun-top-ctrl", "syscon";
reg = <0x404000 0x51c>; reg = <0x404000 0x51c>;
little-endian;
}; };
reboot { reboot {
......
...@@ -114,6 +114,7 @@ upg_irq0_intc: upg_irq0_intc@406780 { ...@@ -114,6 +114,7 @@ upg_irq0_intc: upg_irq0_intc@406780 {
sun_top_ctrl: syscon@404000 { sun_top_ctrl: syscon@404000 {
compatible = "brcm,bcm7425-sun-top-ctrl", "syscon"; compatible = "brcm,bcm7425-sun-top-ctrl", "syscon";
reg = <0x404000 0x51c>; reg = <0x404000 0x51c>;
little-endian;
}; };
reboot { reboot {
......
...@@ -133,17 +133,17 @@ static int regmap_mmio_gather_write(void *context, ...@@ -133,17 +133,17 @@ static int regmap_mmio_gather_write(void *context,
while (val_size) { while (val_size) {
switch (ctx->val_bytes) { switch (ctx->val_bytes) {
case 1: case 1:
__raw_writeb(*(u8 *)val, ctx->regs + offset); writeb(*(u8 *)val, ctx->regs + offset);
break; break;
case 2: case 2:
__raw_writew(*(u16 *)val, ctx->regs + offset); writew(*(u16 *)val, ctx->regs + offset);
break; break;
case 4: case 4:
__raw_writel(*(u32 *)val, ctx->regs + offset); writel(*(u32 *)val, ctx->regs + offset);
break; break;
#ifdef CONFIG_64BIT #ifdef CONFIG_64BIT
case 8: case 8:
__raw_writeq(*(u64 *)val, ctx->regs + offset); writeq(*(u64 *)val, ctx->regs + offset);
break; break;
#endif #endif
default: default:
...@@ -193,17 +193,17 @@ static int regmap_mmio_read(void *context, ...@@ -193,17 +193,17 @@ static int regmap_mmio_read(void *context,
while (val_size) { while (val_size) {
switch (ctx->val_bytes) { switch (ctx->val_bytes) {
case 1: case 1:
*(u8 *)val = __raw_readb(ctx->regs + offset); *(u8 *)val = readb(ctx->regs + offset);
break; break;
case 2: case 2:
*(u16 *)val = __raw_readw(ctx->regs + offset); *(u16 *)val = readw(ctx->regs + offset);
break; break;
case 4: case 4:
*(u32 *)val = __raw_readl(ctx->regs + offset); *(u32 *)val = readl(ctx->regs + offset);
break; break;
#ifdef CONFIG_64BIT #ifdef CONFIG_64BIT
case 8: case 8:
*(u64 *)val = __raw_readq(ctx->regs + offset); *(u64 *)val = readq(ctx->regs + offset);
break; break;
#endif #endif
default: default:
......
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