Commit 93493993 authored by Ian Abbott's avatar Ian Abbott Committed by Greg Kroah-Hartman

staging: comedi: s626: correct S626_CRAMSK_CLKPOL_A macro (unused)

The counter 'A' clock polarity field in the 'CRA' register is only 1 bit
wide, but the `S626_CRAMSK_CLKPOL_A` macro shows it as 2 bits wide,
which would overlap with the counter 'A' interrupt source field.  This
is harmless as the macro isn't actually used yet, but correct it anyway
as I want to use it!
Signed-off-by: default avatarIan Abbott <abbotti@mev.co.uk>
Reviewed-by: default avatarH Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 622ec01a
...@@ -564,7 +564,7 @@ ...@@ -564,7 +564,7 @@
#define S626_CRAMSK_LOADSRC_A (3 << S626_CRABIT_LOADSRC_A) #define S626_CRAMSK_LOADSRC_A (3 << S626_CRABIT_LOADSRC_A)
#define S626_CRAMSK_CLKMULT_A (3 << S626_CRABIT_CLKMULT_A) #define S626_CRAMSK_CLKMULT_A (3 << S626_CRABIT_CLKMULT_A)
#define S626_CRAMSK_INTSRC_A (3 << S626_CRABIT_INTSRC_A) #define S626_CRAMSK_INTSRC_A (3 << S626_CRABIT_INTSRC_A)
#define S626_CRAMSK_CLKPOL_A (3 << S626_CRABIT_CLKPOL_A) #define S626_CRAMSK_CLKPOL_A (1 << S626_CRABIT_CLKPOL_A)
#define S626_CRAMSK_INDXSRC_A (3 << S626_CRABIT_INDXSRC_A) #define S626_CRAMSK_INDXSRC_A (3 << S626_CRABIT_INDXSRC_A)
#define S626_CRAMSK_CNTSRC_A (3 << S626_CRABIT_CNTSRC_A) #define S626_CRAMSK_CNTSRC_A (3 << S626_CRABIT_CNTSRC_A)
......
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