Merge bk://bk.arm.linux.org.uk/linux-2.6-rmk

into ppc970.osdl.org:/home/torvalds/v2.6/linux

arch/arm/kernel/entry-armv.S

@@ -429,186 +429,131 @@ ENTRY(__switch_to)
 
 		__INIT
 /*
- * Vector stubs.  NOTE that we only align 'vector_IRQ' to a cache line boundary,
- * and we rely on each stub being exactly 48 (1.5 cache lines) in size.  This
- * means that we only ever load two cache lines for this code, or one if we're
- * lucky.  We also copy this code to 0x200 so that we can use branches in the
+ * Vector stubs.
+ *
+ * This code is copied to 0x200 or 0xffff0200 so we can use branches in the
  * vectors, rather than ldr's.
+ *
+ * Common stub entry macro:
+ *   Enter in IRQ mode, spsr = SVC/USR CPSR, lr = SVC/USR PC
  */
-		.align	5
+	.macro	vector_stub, name, sym, correction=0
+	.align	5
+
+vector_\name:
+	ldr	r13, .LCs\sym
+	.if \correction
+	sub	lr, lr, #\correction
+	.endif
+	str	lr, [r13]			@ save lr_IRQ
+	mrs	lr, spsr
+	str	lr, [r13, #4]			@ save spsr_IRQ
+	@
+	@ now branch to the relevant MODE handling routine
+	@
+	mrs	r13, cpsr
+	bic	r13, r13, #MODE_MASK
+	orr	r13, r13, #MODE_SVC
+	msr	spsr_cxsf, r13			@ switch to SVC_32 mode
+
+	and	lr, lr, #15
+	ldr	lr, [pc, lr, lsl #2]
+	movs	pc, lr				@ Changes mode and branches
+	.endm
+
 __stubs_start:
 /*
  * Interrupt dispatcher
- * Enter in IRQ mode, spsr = SVC/USR CPSR, lr = SVC/USR PC
  */
-vector_IRQ:	@
-		@ save mode specific registers
-		@
-		ldr	r13, .LCsirq
-		sub	lr, lr, #4
-		str	lr, [r13]			@ save lr_IRQ
-		mrs	lr, spsr
-		str	lr, [r13, #4]			@ save spsr_IRQ
-		@
-		@ now branch to the relevant MODE handling routine
-		@
-		mrs	r13, cpsr
-		bic	r13, r13, #MODE_MASK
-		orr	r13, r13, #MODE_SVC
-		msr	spsr_cxsf, r13			@ switch to SVC_32 mode
-
-		and	lr, lr, #15
-		ldr	lr, [pc, lr, lsl #2]
-		movs	pc, lr				@ Changes mode and branches
-
-.LCtab_irq:	.word	__irq_usr			@  0  (USR_26 / USR_32)
-		.word	__irq_invalid			@  1  (FIQ_26 / FIQ_32)
-		.word	__irq_invalid			@  2  (IRQ_26 / IRQ_32)
-		.word	__irq_svc			@  3  (SVC_26 / SVC_32)
-		.word	__irq_invalid			@  4
-		.word	__irq_invalid			@  5
-		.word	__irq_invalid			@  6
-		.word	__irq_invalid			@  7
-		.word	__irq_invalid			@  8
-		.word	__irq_invalid			@  9
-		.word	__irq_invalid			@  a
-		.word	__irq_invalid			@  b
-		.word	__irq_invalid			@  c
-		.word	__irq_invalid			@  d
-		.word	__irq_invalid			@  e
-		.word	__irq_invalid			@  f
-
-		.align	5
+	vector_stub	irq, irq, 4
+
+	.long	__irq_usr			@  0  (USR_26 / USR_32)
+	.long	__irq_invalid			@  1  (FIQ_26 / FIQ_32)
+	.long	__irq_invalid			@  2  (IRQ_26 / IRQ_32)
+	.long	__irq_svc			@  3  (SVC_26 / SVC_32)
+	.long	__irq_invalid			@  4
+	.long	__irq_invalid			@  5
+	.long	__irq_invalid			@  6
+	.long	__irq_invalid			@  7
+	.long	__irq_invalid			@  8
+	.long	__irq_invalid			@  9
+	.long	__irq_invalid			@  a
+	.long	__irq_invalid			@  b
+	.long	__irq_invalid			@  c
+	.long	__irq_invalid			@  d
+	.long	__irq_invalid			@  e
+	.long	__irq_invalid			@  f
 
 /*
- * Data abort dispatcher - dispatches it to the correct handler for the processor mode
+ * Data abort dispatcher
  * Enter in ABT mode, spsr = USR CPSR, lr = USR PC
  */
-vector_data:	@
-		@ save mode specific registers
-		@
-		ldr	r13, .LCsabt
-		sub	lr, lr, #8
-		str	lr, [r13]
-		mrs	lr, spsr
-		str	lr, [r13, #4]
-		@
-		@ now branch to the relevant MODE handling routine
-		@
-		mrs	r13, cpsr
-		bic	r13, r13, #MODE_MASK
-		orr	r13, r13, #MODE_SVC
-		msr	spsr_cxsf, r13			@ switch to SVC_32 mode
-
-		and	lr, lr, #15
-		ldr	lr, [pc, lr, lsl #2]
-		movs	pc, lr				@ Changes mode and branches
-
-.LCtab_dabt:	.word	__dabt_usr			@  0  (USR_26 / USR_32)
-		.word	__dabt_invalid			@  1  (FIQ_26 / FIQ_32)
-		.word	__dabt_invalid			@  2  (IRQ_26 / IRQ_32)
-		.word	__dabt_svc			@  3  (SVC_26 / SVC_32)
-		.word	__dabt_invalid			@  4
-		.word	__dabt_invalid			@  5
-		.word	__dabt_invalid			@  6
-		.word	__dabt_invalid			@  7
-		.word	__dabt_invalid			@  8
-		.word	__dabt_invalid			@  9
-		.word	__dabt_invalid			@  a
-		.word	__dabt_invalid			@  b
-		.word	__dabt_invalid			@  c
-		.word	__dabt_invalid			@  d
-		.word	__dabt_invalid			@  e
-		.word	__dabt_invalid			@  f
-
-		.align	5
+	vector_stub	dabt, abt, 8
+
+	.long	__dabt_usr			@  0  (USR_26 / USR_32)
+	.long	__dabt_invalid			@  1  (FIQ_26 / FIQ_32)
+	.long	__dabt_invalid			@  2  (IRQ_26 / IRQ_32)
+	.long	__dabt_svc			@  3  (SVC_26 / SVC_32)
+	.long	__dabt_invalid			@  4
+	.long	__dabt_invalid			@  5
+	.long	__dabt_invalid			@  6
+	.long	__dabt_invalid			@  7
+	.long	__dabt_invalid			@  8
+	.long	__dabt_invalid			@  9
+	.long	__dabt_invalid			@  a
+	.long	__dabt_invalid			@  b
+	.long	__dabt_invalid			@  c
+	.long	__dabt_invalid			@  d
+	.long	__dabt_invalid			@  e
+	.long	__dabt_invalid			@  f
 
 /*
- * Prefetch abort dispatcher - dispatches it to the correct handler for the processor mode
+ * Prefetch abort dispatcher
  * Enter in ABT mode, spsr = USR CPSR, lr = USR PC
  */
-vector_prefetch:
-		@
-		@ save mode specific registers
-		@
-		ldr	r13, .LCsabt
-		sub	lr, lr, #4
-		str	lr, [r13]			@ save lr_ABT
-		mrs	lr, spsr
-		str	lr, [r13, #4]			@ save spsr_ABT
-		@
-		@ now branch to the relevant MODE handling routine
-		@
-		mrs	r13, cpsr
-		bic	r13, r13, #MODE_MASK
-		orr	r13, r13, #MODE_SVC
-		msr	spsr_cxsf, r13			@ switch to SVC_32 mode
-
-		ands	lr, lr, #15
-		ldr	lr, [pc, lr, lsl #2]
-		movs	pc, lr
-
-.LCtab_pabt:	.word	__pabt_usr			@  0 (USR_26 / USR_32)
-		.word	__pabt_invalid			@  1 (FIQ_26 / FIQ_32)
-		.word	__pabt_invalid			@  2 (IRQ_26 / IRQ_32)
-		.word	__pabt_svc			@  3 (SVC_26 / SVC_32)
-		.word	__pabt_invalid			@  4
-		.word	__pabt_invalid			@  5
-		.word	__pabt_invalid			@  6
-		.word	__pabt_invalid			@  7
-		.word	__pabt_invalid			@  8
-		.word	__pabt_invalid			@  9
-		.word	__pabt_invalid			@  a
-		.word	__pabt_invalid			@  b
-		.word	__pabt_invalid			@  c
-		.word	__pabt_invalid			@  d
-		.word	__pabt_invalid			@  e
-		.word	__pabt_invalid			@  f
-
-		.align	5
+	vector_stub	pabt, abt, 4
+
+	.long	__pabt_usr			@  0 (USR_26 / USR_32)
+	.long	__pabt_invalid			@  1 (FIQ_26 / FIQ_32)
+	.long	__pabt_invalid			@  2 (IRQ_26 / IRQ_32)
+	.long	__pabt_svc			@  3 (SVC_26 / SVC_32)
+	.long	__pabt_invalid			@  4
+	.long	__pabt_invalid			@  5
+	.long	__pabt_invalid			@  6
+	.long	__pabt_invalid			@  7
+	.long	__pabt_invalid			@  8
+	.long	__pabt_invalid			@  9
+	.long	__pabt_invalid			@  a
+	.long	__pabt_invalid			@  b
+	.long	__pabt_invalid			@  c
+	.long	__pabt_invalid			@  d
+	.long	__pabt_invalid			@  e
+	.long	__pabt_invalid			@  f
 
 /*
- * Undef instr entry dispatcher - dispatches it to the correct handler for the processor mode
+ * Undef instr entry dispatcher
  * Enter in UND mode, spsr = SVC/USR CPSR, lr = SVC/USR PC
  */
-vector_undefinstr:
-		@
-		@ save mode specific registers
-		@
-		ldr	r13, .LCsund
-		str	lr, [r13]			@ save lr_UND
-		mrs	lr, spsr
-		str	lr, [r13, #4]			@ save spsr_UND
-		@
-		@ now branch to the relevant MODE handling routine
-		@
-		mrs	r13, cpsr
-		bic	r13, r13, #MODE_MASK
-		orr	r13, r13, #MODE_SVC
-		msr	spsr_cxsf, r13			@ switch to SVC_32 mode
-
-		and	lr, lr, #15
-		ldr	lr, [pc, lr, lsl #2]
-		movs	pc, lr				@ Changes mode and branches
-
-.LCtab_und:	.word	__und_usr			@  0 (USR_26 / USR_32)
-		.word	__und_invalid			@  1 (FIQ_26 / FIQ_32)
-		.word	__und_invalid			@  2 (IRQ_26 / IRQ_32)
-		.word	__und_svc			@  3 (SVC_26 / SVC_32)
-		.word	__und_invalid			@  4
-		.word	__und_invalid			@  5
-		.word	__und_invalid			@  6
-		.word	__und_invalid			@  7
-		.word	__und_invalid			@  8
-		.word	__und_invalid			@  9
-		.word	__und_invalid			@  a
-		.word	__und_invalid			@  b
-		.word	__und_invalid			@  c
-		.word	__und_invalid			@  d
-		.word	__und_invalid			@  e
-		.word	__und_invalid			@  f
-
-		.align	5
+	vector_stub	und, und
+
+	.long	__und_usr			@  0 (USR_26 / USR_32)
+	.long	__und_invalid			@  1 (FIQ_26 / FIQ_32)
+	.long	__und_invalid			@  2 (IRQ_26 / IRQ_32)
+	.long	__und_svc			@  3 (SVC_26 / SVC_32)
+	.long	__und_invalid			@  4
+	.long	__und_invalid			@  5
+	.long	__und_invalid			@  6
+	.long	__und_invalid			@  7
+	.long	__und_invalid			@  8
+	.long	__und_invalid			@  9
+	.long	__und_invalid			@  a
+	.long	__und_invalid			@  b
+	.long	__und_invalid			@  c
+	.long	__und_invalid			@  d
+	.long	__und_invalid			@  e
+	.long	__und_invalid			@  f
+
+	.align	5
 
 /*=============================================================================
  * Undefined FIQs
@@ -620,7 +565,7 @@ vector_undefinstr:
  * other mode than FIQ...  Ok you can switch to another mode, but you can't
  * get out of that mode without clobbering one register.
  */
-vector_FIQ:	disable_fiq
+vector_fiq:	disable_fiq
 		subs	pc, lr, #4
 
 /*=============================================================================
@@ -650,13 +595,13 @@ __stubs_end:
 		.equ	__real_stubs_start, .LCvectors + 0x200
 
 .LCvectors:	swi	SYS_ERROR0
-		b	__real_stubs_start + (vector_undefinstr - __stubs_start)
+		b	__real_stubs_start + (vector_und - __stubs_start)
 		ldr	pc, __real_stubs_start + (.LCvswi - __stubs_start)
-		b	__real_stubs_start + (vector_prefetch - __stubs_start)
-		b	__real_stubs_start + (vector_data - __stubs_start)
+		b	__real_stubs_start + (vector_pabt - __stubs_start)
+		b	__real_stubs_start + (vector_dabt - __stubs_start)
 		b	__real_stubs_start + (vector_addrexcptn - __stubs_start)
-		b	__real_stubs_start + (vector_IRQ - __stubs_start)
-		b	__real_stubs_start + (vector_FIQ - __stubs_start)
+		b	__real_stubs_start + (vector_irq - __stubs_start)
+		b	__real_stubs_start + (vector_fiq - __stubs_start)
 
 ENTRY(__trap_init)
 		stmfd	sp!, {r4 - r6, lr}

arch/arm/mach-pxa/mainstone.c

@@ -33,6 +33,7 @@
 
 #include <asm/arch/pxa-regs.h>
 #include <asm/arch/mainstone.h>
+#include <asm/arch/audio.h>
 #include <asm/arch/pxafb.h>
 #include <asm/arch/mmc.h>
 
@@ -120,6 +121,44 @@ static struct platform_device smc91x_device = {
 	.resource	= smc91x_resources,
 };
 
+static int mst_audio_startup(snd_pcm_substream_t *substream, void *priv)
+{
+	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
+		MST_MSCWR2 &= ~MST_MSCWR2_AC97_SPKROFF;
+	return 0;
+}
+
+static void mst_audio_shutdown(snd_pcm_substream_t *substream, void *priv)
+{
+	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
+		MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF;
+}
+
+static long mst_audio_suspend_mask;
+
+static void mst_audio_suspend(void *priv)
+{
+	mst_audio_suspend_mask = MST_MSCWR2;
+	MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF;
+}
+
+static void mst_audio_resume(void *priv)
+{
+	MST_MSCWR2 &= mst_audio_suspend_mask | ~MST_MSCWR2_AC97_SPKROFF;
+}
+
+static pxa2xx_audio_ops_t mst_audio_ops = {
+	.startup	= mst_audio_startup,
+	.shutdown	= mst_audio_shutdown,
+	.suspend	= mst_audio_suspend,
+	.resume		= mst_audio_resume,
+};
+
+static struct platform_device mst_audio_device = {
+	.name		= "pxa2xx-ac97",
+	.id		= -1,
+	.dev		= { .platform_data = &mst_audio_ops },
+};
 
 static void mainstone_backlight_power(int on)
 {
@@ -228,7 +267,14 @@ static struct pxamci_platform_data mainstone_mci_platform_data = {
 
 static void __init mainstone_init(void)
 {
+	/*
+	 * On Mainstone, we route AC97_SYSCLK via GPIO45 to
+	 * the audio daughter card
+	 */
+	pxa_gpio_mode(GPIO45_SYSCLK_AC97_MD);
+
 	platform_device_register(&smc91x_device);
+	platform_device_register(&mst_audio_device);
 
 	/* reading Mainstone's "Virtual Configuration Register"
 	   might be handy to select LCD type here */

include/asm-arm/arch-cl7500/debug-macro.S

@@ -3,7 +3,7 @@
  * Debugging macro include header
  *
  *  Copyright (C) 1994-1999 Russell King
- *  Moved from linux/arch/arm/kernel/debug-armv.S by Ben Dooks
+ *  Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as

include/asm-arm/arch-clps711x/debug-macro.S

@@ -3,7 +3,7 @@
  * Debugging macro include header
  *
  *  Copyright (C) 1994-1999 Russell King
- *  Moved from linux/arch/arm/kernel/debug-armv.S by Ben Dooks
+ *  Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as

include/asm-arm/arch-ebsa110/debug-macro.S

@@ -3,7 +3,7 @@
  * Debugging macro include header
  *
  *  Copyright (C) 1994-1999 Russell King
- *  Moved from linux/arch/arm/kernel/debug-armv.S by Ben Dooks
+ *  Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as

include/asm-arm/arch-ebsa285/debug-macro.S

@@ -3,7 +3,7 @@
  * Debugging macro include header
  *
  *  Copyright (C) 1994-1999 Russell King
- *  Moved from linux/arch/arm/kernel/debug-armv.S by Ben Dooks
+ *  Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as

include/asm-arm/arch-epxa10db/debug-macro.S

@@ -3,7 +3,7 @@
  * Debugging macro include header
  *
  *  Copyright (C) 1994-1999 Russell King
- *  Moved from linux/arch/arm/kernel/debug-armv.S by Ben Dooks
+ *  Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as

include/asm-arm/arch-h720x/debug-macro.S

@@ -3,7 +3,7 @@
  * Debugging macro include header
  *
  *  Copyright (C) 1994-1999 Russell King
- *  Moved from linux/arch/arm/kernel/debug-armv.S by Ben Dooks
+ *  Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as

include/asm-arm/arch-imx/debug-macro.S

@@ -3,7 +3,7 @@
  * Debugging macro include header
  *
  *  Copyright (C) 1994-1999 Russell King
- *  Moved from linux/arch/arm/kernel/debug-armv.S by Ben Dooks
+ *  Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as

include/asm-arm/arch-integrator/debug-macro.S

@@ -3,7 +3,7 @@
  * Debugging macro include header
  *
  *  Copyright (C) 1994-1999 Russell King
- *  Moved from linux/arch/arm/kernel/debug-armv.S by Ben Dooks
+ *  Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as

include/asm-arm/arch-iop3xx/debug-macro.S

@@ -3,7 +3,7 @@
  * Debugging macro include header
  *
  *  Copyright (C) 1994-1999 Russell King
- *  Moved from linux/arch/arm/kernel/debug-armv.S by Ben Dooks
+ *  Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as

include/asm-arm/arch-ixp2000/debug-macro.S

@@ -3,7 +3,7 @@
  * Debugging macro include header
  *
  *  Copyright (C) 1994-1999 Russell King
- *  Moved from linux/arch/arm/kernel/debug-armv.S by Ben Dooks
+ *  Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as

include/asm-arm/arch-ixp4xx/debug-macro.S

@@ -3,7 +3,7 @@
  * Debugging macro include header
  *
  *  Copyright (C) 1994-1999 Russell King
- *  Moved from linux/arch/arm/kernel/debug-armv.S by Ben Dooks
+ *  Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as

include/asm-arm/arch-ixp4xx/system.h

@@ -31,13 +31,12 @@ static inline void arch_reset(char mode)
 		/* set the "key" register to enable access to
 		 * "timer" and "enable" registers
 		 */
-		*IXP4XX_OSWK = 0x482e; 	    
+		*IXP4XX_OSWK = IXP4XX_WDT_KEY;
 
-		/* write 0 to the timer register for an immidiate reset */
+		/* write 0 to the timer register for an immediate reset */
 		*IXP4XX_OSWT = 0;
 
-		/* disable watchdog interrupt, enable reset, enable count */
-		*IXP4XX_OSWE = 0x3;
+		*IXP4XX_OSWE = IXP4XX_WDT_RESET_ENABLE | IXP4XX_WDT_COUNT_ENABLE;
 	}
 }
 

include/asm-arm/arch-l7200/debug-macro.S

@@ -3,7 +3,7 @@
  * Debugging macro include header
  *
  *  Copyright (C) 1994-1999 Russell King
- *  Moved from linux/arch/arm/kernel/debug-armv.S by Ben Dooks
+ *  Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as

include/asm-arm/arch-lh7a40x/debug-macro.S

@@ -3,7 +3,7 @@
  * Debugging macro include header
  *
  *  Copyright (C) 1994-1999 Russell King
- *  Moved from linux/arch/arm/kernel/debug-armv.S by Ben Dooks
+ *  Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as

include/asm-arm/arch-omap/debug-macro.S

@@ -3,7 +3,7 @@
  * Debugging macro include header
  *
  *  Copyright (C) 1994-1999 Russell King
- *  Moved from linux/arch/arm/kernel/debug-armv.S by Ben Dooks
+ *  Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as

include/asm-arm/arch-pxa/audio.h

+#ifndef __ASM_ARCH_AUDIO_H__
+#define __ASM_ARCH_AUDIO_H__
+
+#include <sound/driver.h>
+#include <sound/core.h>
+#include <sound/pcm.h>
+
+typedef struct {
+	int (*startup)(snd_pcm_substream_t *, void *);
+	void (*shutdown)(snd_pcm_substream_t *, void *);
+	void (*suspend)(void *);
+	void (*resume)(void *);
+	void *priv;
+} pxa2xx_audio_ops_t;
+
+#endif

include/asm-arm/arch-pxa/debug-macro.S

@@ -3,7 +3,7 @@
  * Debugging macro include header
  *
  *  Copyright (C) 1994-1999 Russell King
- *  Moved from linux/arch/arm/kernel/debug-armv.S by Ben Dooks
+ *  Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as

include/asm-arm/arch-rpc/debug-macro.S

@@ -3,7 +3,7 @@
  * Debugging macro include header
  *
  *  Copyright (C) 1994-1999 Russell King
- *  Moved from linux/arch/arm/kernel/debug-armv.S by Ben Dooks
+ *  Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as

include/asm-arm/arch-s3c2410/debug-macro.S

@@ -5,7 +5,7 @@
  *  Copyright (C) 1994-1999 Russell King
  *  Copyright (C) 2005 Simtec Electronics
  *
- *  Moved from linux/arch/arm/kernel/debug-armv.S by Ben Dooks
+ *  Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as

include/asm-arm/arch-sa1100/debug-macro.S

@@ -3,7 +3,7 @@
  * Debugging macro include header
  *
  *  Copyright (C) 1994-1999 Russell King
- *  Moved from linux/arch/arm/kernel/debug-armv.S by Ben Dooks
+ *  Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as

include/asm-arm/arch-shark/debug-macro.S

@@ -3,7 +3,7 @@
  * Debugging macro include header
  *
  *  Copyright (C) 1994-1999 Russell King
- *  Moved from linux/arch/arm/kernel/debug-armv.S by Ben Dooks
+ *  Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as

include/asm-arm/arch-versatile/debug-macro.S

@@ -3,7 +3,7 @@
  * Debugging macro include header
  *
  *  Copyright (C) 1994-1999 Russell King
- *  Moved from linux/arch/arm/kernel/debug-armv.S by Ben Dooks
+ *  Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as

include/asm-arm/bitops.h

@@ -224,8 +224,8 @@ extern void _change_bit_be(int nr, volatile unsigned long * p);
 extern int _test_and_set_bit_be(int nr, volatile unsigned long * p);
 extern int _test_and_clear_bit_be(int nr, volatile unsigned long * p);
 extern int _test_and_change_bit_be(int nr, volatile unsigned long * p);
-extern int _find_first_zero_bit_be(void * p, unsigned size);
-extern int _find_next_zero_bit_be(void * p, int size, int offset);
+extern int _find_first_zero_bit_be(const void * p, unsigned size);
+extern int _find_next_zero_bit_be(const void * p, int size, int offset);
 extern int _find_first_bit_be(const unsigned long *p, unsigned size);
 extern int _find_next_bit_be(const unsigned long *p, int size, int offset);